| 601e2d43 | 10-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/warnings" into integration
* changes: docs: describe the new warning levels build: add -Wunused-const-variable=2 to W=2 build: include -Wextra in generic builds
Merge changes from topic "bk/warnings" into integration
* changes: docs: describe the new warning levels build: add -Wunused-const-variable=2 to W=2 build: include -Wextra in generic builds docs(porting-guide): update a reference fix(st-usb): replace redundant checks with asserts fix(brcm): add braces around bodies of conditionals fix(renesas): align incompatible function pointers fix(zynqmp): remove redundant api_version check fix: remove old-style declarations fix: unify fallthrough annotations
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| 39fffe55 | 30-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): enable wake interrupt during client suspend
Wakeup interrupt should be set during power down sequence to wake processor. So enable wakeup interrupt during power down sequence.
Sign
fix(versal-net): enable wake interrupt during client suspend
Wakeup interrupt should be set during power down sequence to wake processor. So enable wakeup interrupt during power down sequence.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I1154495c25e0468496f6e112996fd182aa516d88
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| e663f09b | 30-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): disable wakeup interrupt during client wakeup
Clear and disable wakeup interrupt during client wakeup to avoid multiple wakeup events.
Signed-off-by: Jay Buddhabhatti <jay.buddhabh
fix(versal-net): disable wakeup interrupt during client wakeup
Clear and disable wakeup interrupt during client wakeup to avoid multiple wakeup events.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Iebc644ae582da03001830b96e3190fce10dbac42
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| 5f0f7e47 | 30-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): clear power down bit during wakeup
Power down bit and power down interrupt needs to be cleared once core is wakeup to avoid unnecessary power down events. So disable power down inte
fix(versal-net): clear power down bit during wakeup
Power down bit and power down interrupt needs to be cleared once core is wakeup to avoid unnecessary power down events. So disable power down interrupt and clear power down bit during client wakeup.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I3445991692c441831e4ea8dae112e23b19f185a9
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| 1f79bdfd | 30-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): fix setting power down state
Versal NET is supporting max power state to AFF_LVL_2 so set power state for all affinity level instead of setting for only AFF_LVL_0.
Signed-off-by: J
fix(versal-net): fix setting power down state
Versal NET is supporting max power state to AFF_LVL_2 so set power state for all affinity level instead of setting for only AFF_LVL_0.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I55a91e798b7566d2f34d7cb1fe28ca25993a7d8e
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| 2d056db4 | 30-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): clear power down interrupt status before enable
Currently power down interrupt status is set by default before its getting enabled. Because of that Linux is getting crashed since it
fix(versal-net): clear power down interrupt status before enable
Currently power down interrupt status is set by default before its getting enabled. Because of that Linux is getting crashed since its triggering interrupt before core goes to WFI state. So clear interrupt status before enabling power down interrupt.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Ia8d047b6078a49ab3dbe3e0bf24422357f0138c2
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| 21d1966a | 09-Jan-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): resolve misra rule 20.7 warnings
Fix below MISRA violation from versal_net_def.h: - MISRA Violation: MISRA-C:2012 R.10.6: - Macro parameter expands into an expression without be
fix(versal-net): resolve misra rule 20.7 warnings
Fix below MISRA violation from versal_net_def.h: - MISRA Violation: MISRA-C:2012 R.10.6: - Macro parameter expands into an expression without being wrapped by parentheses.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Ie365d24c02bb38163005a3c073642d5c96412e2d
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| 8c23775e | 09-Jan-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): resolve misra 10.6 warnings
Fix below MISRA violation from versal_net_def.h: - MISRA Violation: MISRA-C:2012 R.10.6 - The value of a composite expression shall not be assigned to
fix(versal-net): resolve misra 10.6 warnings
Fix below MISRA violation from versal_net_def.h: - MISRA Violation: MISRA-C:2012 R.10.6 - The value of a composite expression shall not be assigned to an object with wider essential type
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I74f8e5d63523f33d245a21f8e4f04d30e40b05e7
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| 4e46db40 | 15-Dec-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(xilinx): resolve integer handling issue
OEN Number 48 to 63 is for Trusted App and OS. GET_SMC_OEN limits the return value of OEN number to 63 by bitwise AND operation with 0x3F. Thus the upper
fix(xilinx): resolve integer handling issue
OEN Number 48 to 63 is for Trusted App and OS. GET_SMC_OEN limits the return value of OEN number to 63 by bitwise AND operation with 0x3F. Thus the upper limit check for OEN value returned by GET_SMC_OEN is not required. Removing the upper limit check for the OEN value returned by GET_SMC_OEN resolves integer handling issue CONSTANT_EXPRESSION_RESULT
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Change-Id: Ie04a4e2fb7cc85ec6055a5662736a805a89f7085
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| 0ee07d79 | 12-Dec-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Change-Id: I7cf1f76a5358ffc297c914f41c437469f5a42411
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| d0b58c8a | 22-Nov-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(zynqmp): remove redundant api_version check
The api_version is checked in pm_setup() and an error is returned. The smc handlers will not be registered on error so doing the check again is redund
fix(zynqmp): remove redundant api_version check
The api_version is checked in pm_setup() and an error is returned. The smc handlers will not be registered on error so doing the check again is redundant. This also silences a warning when compiling with -Wextra.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I09395e6a20e3f6eb22a1f81ec2f6bdf034eeb4bf
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| f4b8470f | 22-Nov-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix: remove old-style declarations
TF-A wants to eventually enable -Wold-style-definition globally. Convert the rare few instances where this is still the case.
Signed-off-by: Boyan Karatotev <boya
fix: remove old-style declarations
TF-A wants to eventually enable -Wold-style-definition globally. Convert the rare few instances where this is still the case.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I9c450fc875cf097e6de2ed577ea3b085821c9f5e
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| e65584a0 | 01-Dec-2022 |
Naman Patel <naman.patel@amd.com> |
fix(zynqmp): initialize uint32 with value 0U in pm code
MISRA Violation: MISRA C-2012 Rule 7.2 - Initialize the unsigned int with value 0u in pm_service component.
Current misra warning detection t
fix(zynqmp): initialize uint32 with value 0U in pm code
MISRA Violation: MISRA C-2012 Rule 7.2 - Initialize the unsigned int with value 0u in pm_service component.
Current misra warning detection tool is not reporting this as warning. It reports only when the initialized value exceeds the range of data type based on compiler used.
But, this change is added as a part of precaution as some other misra checker tool may report it as violation of rule 7.2.
Signed-off-by: Naman Patel <naman.patel@amd.com> Change-Id: I50a5cee2a077fe157e79757d959ce33064225af3
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| 4ccbdd86 | 25-Nov-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(zynqmp): check return status of pm_get_api_version" into integration |
| c92ad369 | 22-Nov-2022 |
Naman Patel <naman.patel@amd.com> |
fix(zynqmp): check return status of pm_get_api_version
MISRA Violation: MISRA C-2012 Rule 17.7 - Check the return status of function pm_get_api_version and return error in case of failure.
Signed-o
fix(zynqmp): check return status of pm_get_api_version
MISRA Violation: MISRA C-2012 Rule 17.7 - Check the return status of function pm_get_api_version and return error in case of failure.
Signed-off-by: Naman Patel <naman.patel@amd.com> Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252
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| cd73d62b | 16-Nov-2022 |
Naman Patel <naman.patel@amd.com> |
fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized with value 0.
MISRA Violation: MISRA C-2012 Rule 9.1 - Initialize the array/
fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized with value 0.
MISRA Violation: MISRA C-2012 Rule 9.1 - Initialize the array/variable with a value 0 to resolve the misra warnings in pm_service component.
Signed-off-by: Naman Patel <naman.patel@amd.com> Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd
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| 590519a8 | 07-Oct-2022 |
HariBabu Gattem <haribabu.gattem@amd.com> |
fix(zynqmp): resolve coverity warnings
Fix for coverity issues in pm_service component. Fixed compilation error for versal platform.
Change-Id: I948f01807e67ad1e41021557e040dcbfb7b3a39e Signed-off-
fix(zynqmp): resolve coverity warnings
Fix for coverity issues in pm_service component. Fixed compilation error for versal platform.
Change-Id: I948f01807e67ad1e41021557e040dcbfb7b3a39e Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com> Signed-off-by: Naman Patel <naman.patel@amd.com>
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| faa22d48 | 05-Nov-2022 |
Michal Simek <michal.simek@amd.com> |
fix(versal-net): add default values for silicon
Add missing default value for silicon.
Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: Iac7d4db17a29a148298e9e3bd3eb3f74cafe7bc1 |
| bcc6e4a0 | 11-Oct-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(versal_net): Enable a78 errata workarounds
TF-A is reporting that erratum are missing to be enabled.
Enable the Following errata workaround to Cortex-A78 AE CPU for versal_net ERRATA_A78_AE_194
fix(versal_net): Enable a78 errata workarounds
TF-A is reporting that erratum are missing to be enabled.
Enable the Following errata workaround to Cortex-A78 AE CPU for versal_net ERRATA_A78_AE_1941500 ERRATA_A78_AE_1951502 ERRATA_A78_AE_2376748 ERRATA_A78_AE_2395408
For further information refer to https://developer.arm.com/documentation/SDEN1707912/1300/
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com> Change-Id: Ib7fc16e035feab1dfbd88c1f8ce128b057eee86d
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| 769446a6 | 07-Oct-2022 |
Michal Simek <michal.simek@amd.com> |
fix(versal): enable a72 erratum 859971 and 1319367
TF-A is reporting that above two erratum are missing to be enabled that's why enable them by default.
For futher information please refer to https
fix(versal): enable a72 erratum 859971 and 1319367
TF-A is reporting that above two erratum are missing to be enabled that's why enable them by default.
For futher information please refer to https://developer.arm.com/documentation/epm012079/11/
where 859971 is "Speculative instruction prefetch to Execute-never (XN) memory could cause deadlock or data integrity issue" and 1319367 is "Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation".
Change-Id: I408706713a169e53db63ac5657751b0b003e646d Signed-off-by: Michal Simek <michal.simek@amd.com>
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| b0eb6d12 | 03-Oct-2022 |
Michal Simek <michal.simek@amd.com> |
fix(versal-net): use api_id directly without FUNCID_MASK
The purpose of this code is to extract api_id from smc_fid but this masking is done already in the code with using generic mask from smccc.h
fix(versal-net): use api_id directly without FUNCID_MASK
The purpose of this code is to extract api_id from smc_fid but this masking is done already in the code with using generic mask from smccc.h (FUNCID_NUM_MASK). That's why remove FUNCID_MASK is which not needed and actually also equal to already used FUNCID_NUM_MASK.
Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I1113825baa5d9d58d9d7c5d9d5855fecf62e8d45
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| c8890883 | 30-Sep-2022 |
HariBabu Gattem <haribabu.gattem@amd.com> |
fix(zynqmp): resolve MISRA-C:2012 R.10.1 warnings
MISRA Violation: MISRA-C: 2012 R.10.1 - The operand to the operator does not have an essentially unsigned type.
Signed-off-by: HariBabu Gattem <har
fix(zynqmp): resolve MISRA-C:2012 R.10.1 warnings
MISRA Violation: MISRA-C: 2012 R.10.1 - The operand to the operator does not have an essentially unsigned type.
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com> Change-Id: I0f974e9d6f63dddfab55d55c952a57645d931e40
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| cdb62114 | 22-Sep-2022 |
HariBabu Gattem <haribabu.gattem@amd.com> |
fix(zynqmp): resolve misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information.
Signed-off-by: Hari
fix(zynqmp): resolve misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information.
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com> Change-Id: I3779f7b6e074e33cb66ace3bef2117029badce1e
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| 885e2683 | 12-Sep-2022 |
Claus Pedersen <claustbp@google.com> |
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules. - Replacing panicking with actual error handling. - Debug macros are included indirectly from assert
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules. - Replacing panicking with actual error handling. - Debug macros are included indirectly from assert.h. Removing "platform_def.h" from assert.h and adding "common/debug.h" where the macros are used. - Removing hack for fixing PLAT_LOG_LEVEL_ASSERT to 40. Instead removing assert with expression, as this does not provide additional information.
Signed-off-by: Claus Pedersen <claustbp@google.com> Change-Id: Icc201ea7b63c1277e423c1cfd13fd6816c2bc568
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| 6a079efd | 08-Sep-2022 |
Sai Pavan Boddu <sai.pavan.boddu@amd.com> |
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim extensions, so just switching platform_id to QEMU if QEMU_COSIM is detected.
Si
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim extensions, so just switching platform_id to QEMU if QEMU_COSIM is detected.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I922d10b1605c7f900158fa7fbe82571d3b9d4792
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