feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU

feat(xilinx): request cpu power down from reset

Send subsystem restart notification to firmware when TF-A receives
system reset PSCI call. On receiving subsystem restart call, firmware
will send CPU idle callback to TF-A for powering down all cores. Wait
for CPU idle callback from firmware and raise power down request to
all cores after it receives CPU idle callback to power down core.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I50f417ae228017f38b648740dc90b2e8f1872620

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feat(xilinx): power down all cores on receiving cpu pwrdwn req

On receiving CPU power down request from firmware, TF-A raises SGI
interrupt to all active cores for entering in power down state. So a

feat(xilinx): power down all cores on receiving cpu pwrdwn req

On receiving CPU power down request from firmware, TF-A raises SGI
interrupt to all active cores for entering in power down state. So add support
for power down core on receiving CPU power down request. PWRDWN_WAIT_TIMEOUT
is the timeout value in milliseconds for the other cores to transition to
power down state.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I29760a2098852c546fa5a1324262a62c3d75b391

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feat(xilinx): add handler for power down req sgi irq

On receiving CPU power down callback, TF-A raises SGI interrupt to all active
cores to power down each active cores. Add handler for this SGI IRQ

feat(xilinx): add handler for power down req sgi irq

On receiving CPU power down callback, TF-A raises SGI interrupt to all active
cores to power down each active cores. Add handler for this SGI IRQ.

By default TF-A uses SGI 6 for CPU power down request. This can be
configurable through CPU_PWRDWN_SGI build flag.

e.g., If user wants to use SGI 7 instead of SGI 6 then provide build
flag CPU_PWRDWN_SGI=7

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd

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feat(xilinx): add wrapper to handle cpu power down req

Firmware sends CPU power down request to TF-A through NOTIFY_CB
callback. It indicates CPU needs to power down.

Add wrapper to handle CPU powe

feat(xilinx): add wrapper to handle cpu power down req

Firmware sends CPU power down request to TF-A through NOTIFY_CB
callback. It indicates CPU needs to power down.

Add wrapper to handle CPU power down request from firmware
through IPI callback.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ic4aff874dd29da057c5ffde1899c7f0e5cdf6733

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fix(xilinx): rename macros to align with ARM

Use generic macro name as per common ARM GIC macro name for Versal
and Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id:

fix(xilinx): rename macros to align with ARM

Use generic macro name as per common ARM GIC macro name for Versal
and Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2987ff2f612993fc80979f0179c04d316259ed1d

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fix(versal-net): add redundant call to avoid glitches

Add redundant macro call to increase security by making
code glitch immune as security operations might be
called with the IPI command.

Signed-

fix(versal-net): add redundant call to avoid glitches

Add redundant macro call to increase security by making
code glitch immune as security operations might be
called with the IPI command.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I84d84cca258b7cd981f62816c51032341e19095c

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fix(versal-net): change flag to increase security

Currently security flag is set to SECURE by default and
is changed to NON_SECURE if NS system is detected. In this
case NS system may access secure

fix(versal-net): change flag to increase security

Currently security flag is set to SECURE by default and
is changed to NON_SECURE if NS system is detected. In this
case NS system may access secure system if condition check
gets skipped due to glitches.

So, initialize security_flag to NON_SECURE_FLAG and switch
to SECURE_FLAG if the TrustZone bit is detected to be
in more secure state.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I7af54465bd8744ba97a58c02607631ee23619d47

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chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rear

chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rearranged to ensure a consistent and
organized structure in the codebase, facilitating better
readability and maintainability.

https: //trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#headers-and-inclusion
https://git.trustedfirmware.org/ci/tf-a-ci-scripts.git/tree/script/static-checks/

For example, to run header check:
/tf-a-ci-scripts/script/static-checks/check-include-order.py --tree ${PWD} > Includefileorder.txt

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ia5802722e69859596b94f31ec40755adbf7d865b

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chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for th

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for the functional
documentation to make sure AMD-xilinx documentation is align with
actual code.

For example use kernel-doc from linux to call:
<linux>/scripts/kernel-doc -man -v 1 >/dev/null file...

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Idcc9def408b6c8da35b36f67ef82fc00890e998c

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Merge "chore(xilinx): replace ATF with TFA" into integration

chore(xilinx): replace ATF with TFA

Since the Arm Trusted Firmware(ATF) has been renamed to Trusted
Firmware-A (TF-A), replace all the instances of ATF from code comments,
macros, variables and func

chore(xilinx): replace ATF with TFA

Since the Arm Trusted Firmware(ATF) has been renamed to Trusted
Firmware-A (TF-A), replace all the instances of ATF from code comments,
macros, variables and functions to TF-A.

Change-Id: Iab448d96158612a3effb4e49943f8d6cb43aaad5
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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feat(xilinx): add support to get chipid

Add support for PM API SYS to get the chip ID from the target.
The API calls the IPI command to read the Chip idcode and revision.

Change-Id: Id4d7d812cbf77c

feat(xilinx): add support to get chipid

Add support for PM API SYS to get the chip ID from the target.
The API calls the IPI command to read the Chip idcode and revision.

Change-Id: Id4d7d812cbf77c5e2fc7785b8afb379214f8dd19
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce13

fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce1335bbb61aa2e69a3a196865fd504

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fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.b

fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ia046e1188fdf6e024a146d3f4dd3d8f87a285e7f

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refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatt

refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ib82c5f85a0a27bc47940f6796f1cf68b2c38a908

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refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id

refactor(xilinx): move versal files to common place

Moved necessary files to common place so that it can be used for
Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I611fa849207b082e6599acfb65c55d27b9c99435

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fix(versal-net): use spin_lock instead of bakery_lock

In ARM v8.2 the cache will turn off automatically when cpu power down.
Therefore use the spin_lock instead of bakery_lock for the platform in
wh

fix(versal-net): use spin_lock instead of bakery_lock

In ARM v8.2 the cache will turn off automatically when cpu power down.
Therefore use the spin_lock instead of bakery_lock for the platform in
which HW_ASSISTED_COHERENCY is enabled.

In Versal NET platform HW_ASSISTED_COHERENCY is enabled so it will use
spin lock. In ZynqMP and Versal HW_ASSISTED_COHERENCY is not enabled so
it will use bakery_lock.

Also remove bakery_lock_init() because it is empty.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I18ff939b51f16d7d3484d8564d6ee6c586f363d8

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fix(xilinx): handle CRC failure in IPI callback

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read_callb() logs error message but don't return
error code to upper layers.

fix(xilinx): handle CRC failure in IPI callback

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read_callb() logs error message but don't return
error code to upper layers.

Added CRC failure specific error code which will be returned by
pm_ipi_buff_read_callb() if CRC validation fails.

Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Change-Id: I2eaca073e2bf325a8c86b1820bdd7cca487b783e

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fix(xilinx): handle CRC failure in IPI

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read() logs error message but don't return error
code to upper layers.

Added CRC fail

fix(xilinx): handle CRC failure in IPI

Currently, if CRC validation fails during IPI communication,
pm_ipi_buff_read() logs error message but don't return error
code to upper layers.

Added CRC failure specific error code which will be returned by
pm_ipi_buff_read() if CRC validation fails.

Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com>
Change-Id: I33be330f276973471f4ce4115d1e1609ed8fb754

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docs(xilinx): correct function description

Inside pm_ipi.c file, corrected the function description of
pm_ipi_buff_read_callb() and removed the return type as this is a void
function.

Signed-off-by

docs(xilinx): correct function description

Inside pm_ipi.c file, corrected the function description of
pm_ipi_buff_read_callb() and removed the return type as this is a void
function.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I6257894337ef64497afb3e80d70af91a20357d5f

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fix(zynqmp): resolve coverity warnings

Fix for coverity issues in pm_service component.
Fixed compilation error for versal platform.

Change-Id: I948f01807e67ad1e41021557e040dcbfb7b3a39e
Signed-off-

fix(zynqmp): resolve coverity warnings

Fix for coverity issues in pm_service component.
Fixed compilation error for versal platform.

Change-Id: I948f01807e67ad1e41021557e040dcbfb7b3a39e
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
Signed-off-by: Naman Patel <naman.patel@amd.com>

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