xref: /rk3399_ARM-atf/plat/xilinx/versal_net/plat_psci_pm.c (revision 88ee0816a7429689890659f69b895ac84e48f141)
1 /*
2  * Copyright (c) 2022, Xilinx, Inc. All rights reserved.
3  * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <assert.h>
9 
10 #include <common/debug.h>
11 #include <lib/mmio.h>
12 #include <lib/psci/psci.h>
13 #include <plat/arm/common/plat_arm.h>
14 #include <plat/common/platform.h>
15 #include <plat_arm.h>
16 
17 #include <drivers/delay_timer.h>
18 #include <plat_private.h>
19 #include "pm_api_sys.h"
20 #include "pm_client.h"
21 #include <pm_common.h>
22 #include "pm_ipi.h"
23 #include "pm_svc_main.h"
24 #include "versal_net_def.h"
25 
26 static uintptr_t versal_net_sec_entry;
27 
28 static int32_t versal_net_pwr_domain_on(u_register_t mpidr)
29 {
30 	uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
31 	const struct pm_proc *proc;
32 
33 	VERBOSE("%s: mpidr: 0x%lx, cpuid: %x\n",
34 		__func__, mpidr, cpu_id);
35 
36 	if (cpu_id == -1) {
37 		return PSCI_E_INTERN_FAIL;
38 	}
39 
40 	proc = pm_get_proc(cpu_id);
41 	if (!proc) {
42 		return PSCI_E_INTERN_FAIL;
43 	}
44 
45 	pm_req_wakeup(proc->node_id, (versal_net_sec_entry & 0xFFFFFFFFU) | 0x1U,
46 		      versal_net_sec_entry >> 32, 0, 0);
47 
48 	/* Clear power down request */
49 	pm_client_wakeup(proc);
50 
51 	return PSCI_E_SUCCESS;
52 }
53 
54 /**
55  * versal_net_pwr_domain_off() - This function performs actions to turn off
56  *                               core.
57  * @target_state: Targeted state.
58  *
59  */
60 static void versal_net_pwr_domain_off(const psci_power_state_t *target_state)
61 {
62 	uint32_t cpu_id = plat_my_core_pos();
63 	const struct pm_proc *proc = pm_get_proc(cpu_id);
64 
65 	for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
66 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
67 			__func__, i, target_state->pwr_domain_state[i]);
68 	}
69 
70 	/* Prevent interrupts from spuriously waking up this cpu */
71 	plat_arm_gic_cpuif_disable();
72 
73 	/*
74 	 * Send request to PMC to power down the appropriate APU CPU
75 	 * core.
76 	 * According to PSCI specification, CPU_off function does not
77 	 * have resume address and CPU core can only be woken up
78 	 * invoking CPU_on function, during which resume address will
79 	 * be set.
80 	 */
81 	pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
82 			SECURE_FLAG);
83 }
84 
85 /**
86  * versal_net_system_reset() - This function sends the reset request to firmware
87  *                             for the system to reset. This function does not
88  *                             return.
89  *
90  */
91 static void __dead2 versal_net_system_reset(void)
92 {
93 	uint32_t ret, timeout = 10000U;
94 
95 	request_cpu_pwrdwn();
96 
97 	/*
98 	 * Send the system reset request to the firmware if power down request
99 	 * is not received from firmware.
100 	 */
101 	if (!pwrdwn_req_received) {
102 		(void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
103 					 pm_get_shutdown_scope(), SECURE_FLAG);
104 
105 		/*
106 		 * Wait for system shutdown request completed and idle callback
107 		 * not received.
108 		 */
109 		do {
110 			ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id,
111 						    primary_proc->ipi->remote_ipi_id);
112 			udelay(100);
113 			timeout--;
114 		} while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U));
115 	}
116 
117 	(void)psci_cpu_off();
118 
119 	while (1) {
120 		wfi();
121 	}
122 }
123 
124 /**
125  * versal_net_pwr_domain_suspend() - This function sends request to PMC to suspend
126  *                                   core.
127  * @target_state: Targeted state.
128  *
129  */
130 static void versal_net_pwr_domain_suspend(const psci_power_state_t *target_state)
131 {
132 	uint32_t state;
133 	uint32_t cpu_id = plat_my_core_pos();
134 	const struct pm_proc *proc = pm_get_proc(cpu_id);
135 
136 	for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
137 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
138 			__func__, i, target_state->pwr_domain_state[i]);
139 	}
140 
141 	plat_arm_gic_cpuif_disable();
142 
143 	if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
144 		plat_arm_gic_save();
145 	}
146 
147 	state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
148 		PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
149 
150 	/* Send request to PMC to suspend this core */
151 	pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_net_sec_entry,
152 			SECURE_FLAG);
153 
154 	/* TODO: disable coherency */
155 }
156 
157 static void versal_net_pwr_domain_on_finish(const psci_power_state_t *target_state)
158 {
159 	(void)target_state;
160 
161 	/* Enable the gic cpu interface */
162 	plat_arm_gic_pcpu_init();
163 
164 	/* Program the gic per-cpu distributor or re-distributor interface */
165 	plat_arm_gic_cpuif_enable();
166 }
167 
168 /**
169  * versal_net_pwr_domain_suspend_finish() - This function performs actions to finish
170  *                                          suspend procedure.
171  * @target_state: Targeted state.
172  *
173  */
174 static void versal_net_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
175 {
176 	uint32_t cpu_id = plat_my_core_pos();
177 	const struct pm_proc *proc = pm_get_proc(cpu_id);
178 
179 	for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
180 		VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
181 			__func__, i, target_state->pwr_domain_state[i]);
182 
183 	/* Clear the APU power control register for this cpu */
184 	pm_client_wakeup(proc);
185 
186 	/* TODO: enable coherency */
187 
188 	/* APU was turned off, so restore GIC context */
189 	if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
190 		plat_arm_gic_resume();
191 	}
192 
193 	plat_arm_gic_cpuif_enable();
194 }
195 
196 /**
197  * versal_net_system_off() - This function sends the system off request
198  *                           to firmware. This function does not return.
199  *
200  */
201 static void __dead2 versal_net_system_off(void)
202 {
203 	/* Send the power down request to the PMC */
204 	pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
205 			  pm_get_shutdown_scope(), SECURE_FLAG);
206 
207 	while (1) {
208 		wfi();
209 	}
210 }
211 
212 /**
213  * versal_net_validate_power_state() - This function ensures that the power state
214  *                                     parameter in request is valid.
215  * @power_state: Power state of core.
216  * @req_state: Requested state.
217  *
218  * Return: Returns status, either PSCI_E_SUCCESS or reason.
219  *
220  */
221 static int32_t versal_net_validate_power_state(unsigned int power_state,
222 					       psci_power_state_t *req_state)
223 {
224 	VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
225 
226 	int32_t pstate = psci_get_pstate_type(power_state);
227 
228 	assert(req_state);
229 
230 	/* Sanity check the requested state */
231 	if (pstate == PSTATE_TYPE_STANDBY) {
232 		req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
233 	} else {
234 		req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
235 	}
236 
237 	/* We expect the 'state id' to be zero */
238 	if (psci_get_pstate_id(power_state)) {
239 		return PSCI_E_INVALID_PARAMS;
240 	}
241 
242 	return PSCI_E_SUCCESS;
243 }
244 
245 /**
246  * versal_net_get_sys_suspend_power_state() - Get power state for system
247  *                                            suspend.
248  * @req_state: Requested state.
249  *
250  */
251 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state)
252 {
253 	uint64_t i;
254 
255 	for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++)
256 		req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
257 }
258 
259 static const struct plat_psci_ops versal_net_nopmc_psci_ops = {
260 	.pwr_domain_on                  = versal_net_pwr_domain_on,
261 	.pwr_domain_off                 = versal_net_pwr_domain_off,
262 	.pwr_domain_on_finish           = versal_net_pwr_domain_on_finish,
263 	.pwr_domain_suspend             = versal_net_pwr_domain_suspend,
264 	.pwr_domain_suspend_finish      = versal_net_pwr_domain_suspend_finish,
265 	.system_off                     = versal_net_system_off,
266 	.system_reset                   = versal_net_system_reset,
267 	.validate_power_state           = versal_net_validate_power_state,
268 	.get_sys_suspend_power_state    = versal_net_get_sys_suspend_power_state,
269 };
270 
271 /*******************************************************************************
272  * Export the platform specific power ops.
273  ******************************************************************************/
274 int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint,
275 			    const struct plat_psci_ops **psci_ops)
276 {
277 	versal_net_sec_entry = sec_entrypoint;
278 
279 	VERBOSE("Setting up entry point %lx\n", versal_net_sec_entry);
280 
281 	*psci_ops = &versal_net_nopmc_psci_ops;
282 
283 	return 0;
284 }
285 
286 int32_t sip_svc_setup_init(void)
287 {
288 	return pm_setup();
289 }
290 
291 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4,
292 		     void *cookie, void *handle, uint64_t flags)
293 {
294 	return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
295 }
296