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24cdbb22 |
| 25-Jun-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "stm32mp1: use last page of SYSRAM as SCMI shared memory" into integration
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| #
0754143a |
| 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: use last page of SYSRAM as SCMI shared memory
SCMI shared memory is used to exchange message payloads between secure SCMI services and non-secure SCMI agents. It is mapped uncached (device
stm32mp1: use last page of SYSRAM as SCMI shared memory
SCMI shared memory is used to exchange message payloads between secure SCMI services and non-secure SCMI agents. It is mapped uncached (device) mainly to conform to existing support in the Linux kernel. Note that executive messages are mostly short (few 32bit words) hence not using cache will not penalize much performances.
Platform stm32mp1 shall configure ETZPC to harden properly the secure and non-secure areas of the SYSRAM address space, that before CPU accesses the shared memory when mapped non-secure.
This change defines STM32MP_SEC_SYSRAM_BASE/STM32MP_SEC_SYSRAM_SIZE and STM32MP_NS_SYSRAM_BASE/STM32MP_NS_SYSRAM_SIZE.
Change-Id: I71ff02a359b9668ae1c5a71b5f102cf3d310f289 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| #
dff9fe92 |
| 27-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/stm32mp1: fdt helpers for secure aware gpio bank" into integration
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| #
6bc95379 |
| 27-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/st: move GPIO bank helper function to platform source files" into integration
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| #
ccc199ed |
| 25-Apr-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat/stm32mp1: fdt helpers for secure aware gpio bank
New helper functions to get GPIO banks configuration from the FDT.
stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to differentiate
plat/stm32mp1: fdt helpers for secure aware gpio bank
New helper functions to get GPIO banks configuration from the FDT.
stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to differentiate specific GPIO banks when these are defined with a specific path in the FDT.
fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank as it depends on the SoC variant.
Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| #
c0ea3b1b |
| 02-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
plat/st: move GPIO bank helper function to platform source files
Relation between GPIO banks and their base address and offset address if platform dependent. This change moves helper functions stm32
plat/st: move GPIO bank helper function to platform source files
Relation between GPIO banks and their base address and offset address if platform dependent. This change moves helper functions stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from plat/st/common to plat/st/stm32mp1/.
Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| #
de8f9cd4 |
| 30-Mar-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ddr_map" into integration
* changes: stm32mp1: use stm32mp_get_ddr_ns_size() function stm32mp1: set XN attribute for some areas in BL2 stm32mp1: dynamically map DDR l
Merge changes from topic "ddr_map" into integration
* changes: stm32mp1: use stm32mp_get_ddr_ns_size() function stm32mp1: set XN attribute for some areas in BL2 stm32mp1: dynamically map DDR later and non-cacheable during its test stm32mp1: add a function to get non-secure DDR size
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| #
e6cc3ccf |
| 26-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add a function to get non-secure DDR size
This function gets the DDR size from DT, and withdraws (if defined) the sizes of secure DDR and shared memory areas. This function also checks DT
stm32mp1: add a function to get non-secure DDR size
This function gets the DDR size from DT, and withdraws (if defined) the sizes of secure DDR and shared memory areas. This function also checks DT values fits the default DDR range. This non-secure memory is available for BL33 and non-secure OS.
Change-Id: I162ae5e990a0f9b6b7d07e539de029f1d61a391b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
ace23683 |
| 27-Sep-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "ld/stm32-authentication" into integration
* changes: stm32mp1: add authentication support for stm32image bsec: move bsec_mode_is_closed_device() service to platform c
Merge changes from topic "ld/stm32-authentication" into integration
* changes: stm32mp1: add authentication support for stm32image bsec: move bsec_mode_is_closed_device() service to platform crypto: stm32_hash: Add HASH driver
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| #
f700423c |
| 16-Sep-2019 |
Lionel Debieve <lionel.debieve@st.com> |
bsec: move bsec_mode_is_closed_device() service to platform
This BSEC service is a platform specific service. Implementation moved to the platform part.
Signed-off-by: Lionel Debieve <lionel.debiev
bsec: move bsec_mode_is_closed_device() service to platform
This BSEC service is a platform specific service. Implementation moved to the platform part.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I1f70ed48a446860498ed111acce01187568538c9
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| #
0289ab9e |
| 10-Sep-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "yg/stm32mp1_wdg_updates" into integration
* changes: mmc: stm32_sdmmc2: correctly manage block size mmc: stm32_sdmmc2: manage max-frequency property from DT stm32mp1:
Merge changes from topic "yg/stm32mp1_wdg_updates" into integration
* changes: mmc: stm32_sdmmc2: correctly manage block size mmc: stm32_sdmmc2: manage max-frequency property from DT stm32mp1: move check_header() to common code stm32mp1: keep console during runtime stm32mp1: sp_min: initialize MMU and cache earlier stm32mp1: add support for LpDDR3 stm32mp1: use a common function to check spinlock is available clk: stm32mp: enable RTCAPB clock for dual-core chips stm32mp1: check if the SoC is single core stm32mp1: print information about board stm32mp1: print information about SoC stm32mp1: add watchdog support
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b2182cde |
| 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM3
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single Cortex-A7.
Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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10e7a9e9 |
| 13-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb0483436
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb048343680faac8dc577b75c67ac106f5b Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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| #
dec286dd |
| 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: print information about SoC
This information is located in DBGMCU registers.
Change-Id: I480aa046fed9992e3d9665b1f0520bc4b6cfdf30 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
73680c23 |
| 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add watchdog support
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is
stm32mp1: add watchdog support
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is not started by default. It can be started after an HW reset if the dedicated OTP is fused.
The watchdog also needs to be frozen if a debugger is attached. This is done by configuring the correct bits in DBGMCU. This configuration is allowed by checking BSEC properties.
An increase of BL2 size is also required when adding this new code.
Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| #
fc3c382f |
| 19-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes: fdts: stm32mp1: realign device tree files with internal devs stm32mp1: increase device tree size to 20kB stm32mp1: make
Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes: fdts: stm32mp1: realign device tree files with internal devs stm32mp1: increase device tree size to 20kB stm32mp1: make dt_get_stdout_node_offset() static stm32mp1: use unsigned values for SDMMC defines stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES stm32mp1: update doc for U-Boot compilation stm32mp1: add general SYSCFG management stm32mp1: move stm32_get_gpio_bank_clock() to private file clk: stm32mp1: correctly handle Clock Spreading Generator clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array clk: stm32mp1: move oscillator functions to generic file arch: add some defines for generic timer registers
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| #
8f282dae |
| 07-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: move stm32_get_gpio_bank_clock() to private file
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source file
stm32mp1: move stm32_get_gpio_bank_clock() to private file
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source files to platform private stm32mp1_private.c source file.
Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
37cdad2a |
| 18-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1821 from Yann-lms/stm32mp1_2019-02-14
Series of new patches for STM32MP1
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3f9c9784 |
| 14-Feb-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms.
Change-Id: I22
stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms.
Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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c9d75b3c |
| 14-Feb-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts.
stm
stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts.
stm32mp_common.h is a common API aggregate.
Remove some casts where applicable. Fix some types where applicable. Remove also some platform includes that are already in stm32mp1_def.h.
Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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