History log of /rk3399_ARM-atf/plat/st/stm32mp1/stm32mp1_def.h (Results 51 – 75 of 157)
Revision Date Author Comments
# ef0b8a6c 25-Aug-2021 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13

On STM32MP13, the chip revision Z is 0x1001, contrary to STM32MP15,
for which it was 0x2001.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Cha

feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13

On STM32MP13, the chip revision Z is 0x1001, contrary to STM32MP15,
for which it was 0x2001.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If65482e824b169282abb5e26ca91e16ef7640b52

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# 111a384c 12-Feb-2020 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): remove unsupported features on STM32MP13

* GPIO: On STM32MP13, there are no banks GPIOJ, GPIOK and GPIOZ.
* STM32MP13 is a single Cortex-A7 CPU: remove reset from MPU1
and reset fr

feat(stm32mp1): remove unsupported features on STM32MP13

* GPIO: On STM32MP13, there are no banks GPIOJ, GPIOK and GPIOZ.
* STM32MP13 is a single Cortex-A7 CPU: remove reset from MPU1
and reset from MCU traces
* There is no MCU on STM32MP13. Put MCU security management
under STM32MP15 flag.
* The authentication feature is not supported yet on STM32MP13,
put the code under SPM32MP15 flag.
* On STM32MP13, the monotonic counter is managed in ROM code, keep
the monotonic counter update just for STM32MP15.
* SYSCFG: put registers not present on STM32MP13 under STM32MP15
flag, as the code that manages them.
* PMIC: use ldo3 during DDR configuration only for STM32MP15
* Reset UART pins on USB boot is no more required.

Change-Id: Iceba59484a9bb02828fe7e99f3ecafe69c837bc7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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# 48ede661 03-Feb-2020 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): update memory mapping for STM32MP13

SYSRAM is only 128KB and starts at 0x2FFE0000.
SRAMs are added.
BL2 code and DTB sizes are also reduced to fit in 128KB.

Change-Id: I25da99ef5c08

feat(stm32mp1): update memory mapping for STM32MP13

SYSRAM is only 128KB and starts at 0x2FFE0000.
SRAMs are added.
BL2 code and DTB sizes are also reduced to fit in 128KB.

Change-Id: I25da99ef5c08f8008ff00d38248d61b6045adad4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 8dec6481 06-Mar-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-uart-baudrate" into integration

* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling

Merge changes from topic "st-uart-baudrate" into integration

* changes:
refactor(st): configure UART baudrate
docs(stm32mp1): document some compilation flags
feat(st-uart): manage oversampling by 8
fix(st-uart): correctly fill BRR register

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# 99887cb9 02-Mar-2022 Yann Gautier <yann.gautier@foss.st.com>

refactor(st): configure UART baudrate

Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 11520

refactor(st): configure UART baudrate

Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243

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# 92bebd83 11-Feb-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "refactor(stm32mp1): update tamp_bkpr return type" into integration


# c870188d 09-Feb-2022 Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>

refactor(stm32mp1): update tamp_bkpr return type

tamp_bkpr() returns a register address. So use uintptr_t instead of
uin32_t.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Chan

refactor(stm32mp1): update tamp_bkpr return type

tamp_bkpr() returns a register address. So use uintptr_t instead of
uin32_t.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I5eddfa525465313dadfec18d128248a968ba74e2

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# 0e38ff2a 04-Feb-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "feat(st): update the security based on new compatible" into integration


# 812daf91 15-Dec-2020 Lionel Debieve <lionel.debieve@st.com>

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7f0a62f22bfcca638ddaefc9563df00f89f01653

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# 884a6506 31-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-nvmem" into integration

* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes

Merge changes from topic "st-nvmem" into integration

* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
refactor(st-drivers): improve BSEC driver
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
feat(stm32mp1): add NVMEM layout compatibility definition

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# f5a3688b 17-Apr-2019 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): manage monotonic counter

The monotonic counter is stored in an OTP fuse.
A check is done in TF-A.
If the TF-A version is incremented, then the counter will be updated
in the correspo

feat(stm32mp1): manage monotonic counter

The monotonic counter is stored in an OTP fuse.
A check is done in TF-A.
If the TF-A version is incremented, then the counter will be updated
in the corresponding OTP.

Change-Id: I6e7831300ca9efbb35b4c87706f2dcab35affacb
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>

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# ae3ce8b2 04-Nov-2019 Lionel Debieve <lionel.debieve@st.com>

feat(stm32mp1): new way to access platform OTP

Use dt_find_otp_name() to retrieve platform OTP information
from device tree, directly or through stm32_get_otp_index() and
stm32_get_otp_value() platf

feat(stm32mp1): new way to access platform OTP

Use dt_find_otp_name() to retrieve platform OTP information
from device tree, directly or through stm32_get_otp_index() and
stm32_get_otp_value() platform services.
String definitions replace hard-coded values, they are used to call
this new function.

Change-Id: I81213e4a9ad08fddadc2c97b064ae057a4c79561
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# dfbdbd06 10-Sep-2019 Nicolas Le Bayon <nicolas.le.bayon@st.com>

feat(stm32mp1): add NVMEM layout compatibility definition

Used by driver parsing this node to get information.

Change-Id: I50623a497157adf7b9da6fafe8d79f6ff58c0ebc
Signed-off-by: Nicolas Le Bayon <

feat(stm32mp1): add NVMEM layout compatibility definition

Used by driver parsing this node to get information.

Change-Id: I50623a497157adf7b9da6fafe8d79f6ff58c0ebc
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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# e672698c 27-Jan-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st-clk-updates" into integration

* changes:
refactor(st-clock): update STGEN management
feat(st-clock): assign clocks to the correct BL
feat(st-clock): do not refcoun

Merge changes from topic "st-clk-updates" into integration

* changes:
refactor(st-clock): update STGEN management
feat(st-clock): assign clocks to the correct BL
feat(st-clock): do not refcount on non-secure clocks in bl32
feat(st-clock): define secure and non-secure gate clocks
refactor(stm32mp1): remove unused refcount helper functions
fix(stm32mp1): add missing debug.h
refactor(st-clock): use refcnt instead of secure status

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# e1bfbf8a 19-Jan-2022 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): remove unused refcount helper functions

Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(),
stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused.
The file is then

refactor(stm32mp1): remove unused refcount helper functions

Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(),
stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused.
The file is then just removed.

Change-Id: I09ee23c02317df5d8f71cbc355d3ed4a67ce2749
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# d6854cd1 27-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "refactor(stm32mp1): use a macro for header size" into integration


# 8be574bf 17-Sep-2020 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-

refactor(stm32mp1): use a macro for header size

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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# 97c91147 13-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st_mapping_update" into integration

* changes:
feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections
refactor(stm32mp1): reduce MMU memory regions and spl

Merge changes from topic "st_mapping_update" into integration

* changes:
feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections
refactor(stm32mp1): reduce MMU memory regions and split XLAT by context
feat(st): map 2MB for ROM code
fix(stm32mp1): restrict DEVICE2 mapping in BL2

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# ac1b24d5 16-Jan-2020 Yann Gautier <yann.gautier@st.com>

refactor(stm32mp1): reduce MMU memory regions and split XLAT by context

Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do n

refactor(stm32mp1): reduce MMU memory regions and split XLAT by context

Simplify the BL2 MMU mapping and reduce the memory regions
number. Split the XLAT define between BL2 and BL32 as binaries
do not share the same tables anymore.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iaf09e72b4cc29acbe376f6f1cd2a8116c793ba26

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# 1697ad8c 15-Sep-2021 Yann Gautier <yann.gautier@foss.st.com>

feat(st): map 2MB for ROM code

This allows reducing MMU tables, and as there is nothing after ROM code
in memory mapping, this has no impact.

Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3
Si

feat(st): map 2MB for ROM code

This allows reducing MMU tables, and as there is nothing after ROM code
in memory mapping, this has no impact.

Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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# f7a92518 07-Jan-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "st_ddr_updates" into integration

* changes:
refactor(st-ddr): move basic tests in a dedicated file
refactor(st-ddr): reorganize generic and specific elements
feat(stm

Merge changes from topic "st_ddr_updates" into integration

* changes:
refactor(st-ddr): move basic tests in a dedicated file
refactor(st-ddr): reorganize generic and specific elements
feat(stm32mp1): allow configuration of DDR AXI ports number
refactor(st-ddr): update parameter array initialization
feat(st-ddr): add read valid training support
refactor(stm32mp1): remove the support of calibration result
fix(st-ddr): correct DDR warnings

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# 06e55dc8 18-May-2021 Nicolas Le Bayon <nicolas.le.bayon@st.com>

refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32

refactor(st-ddr): reorganize generic and specific elements

stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.

stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.

Adapt driver with this new classification.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997

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# 93b153b5 23-Dec-2021 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st_regulator" into integration

* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulat

Merge changes from topic "st_regulator" into integration

* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulator driver
refactor(st): update CPU and VDD voltage get
refactor(stm32mp1-fdts): update regulator description
refactor(st-pmic): use regulator framework for DDR init
feat(st-pmic): register the PMIC to regulator framework
refactor(st-pmic): split initialize_pmic()
feat(stm32mp1): add regulator framework compilation
feat(regulator): add a regulator framework
feat(stpmic1): add new services
feat(stpmic1): add USB OTG regulators
refactor(st-pmic): improve driver usage
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
refactor(stm32mp1): re-order drivers init

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# 967a8e63 29-Jan-2021 Pascal Paillet <p.paillet@st.com>

feat(stm32mp1): register fixed regulator

Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann G

feat(stm32mp1): register fixed regulator

Register fixed regulator in BL2.

Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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# bba9fdee 15-Dec-2021 Yann Gautier <yann.gautier@st.com>

feat(stm32mp1): add regulator framework compilation

Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d4

feat(stm32mp1): add regulator framework compilation

Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.

Change-Id: I9dc7a0a4c4f5a23d9bedda368d407612c9cd21cd
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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