| ddbf946f | 20-Mar-2017 |
Stefan Kristiansson <stefank@nvidia.com> |
Tegra194: Fix TEGRA186_SMMU_CTX_SIZE
TEGRA186_SMMU_CTX_SIZE should match the numbe of elements in smmu_ctx_regs, which is defined in smmu_plat_config.h. The current number of elements are 0x490.
Ch
Tegra194: Fix TEGRA186_SMMU_CTX_SIZE
TEGRA186_SMMU_CTX_SIZE should match the numbe of elements in smmu_ctx_regs, which is defined in smmu_plat_config.h. The current number of elements are 0x490.
Change-Id: If0614ea8ef8b6a8f5da1a3279abaf9255eb76420 Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
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| 4fb71eae | 03-Mar-2017 |
Rohit Khanna <rokhanna@nvidia.com> |
Tegra194: Dont run MCE firmware on Emulation
Dont run MCE firmware on pre-silicon emulation platforms
Change-Id: I2a8d653e46f494621580ca92271a18e62f648859 Signed-off-by: Rohit Khanna <rokhanna@nvid
Tegra194: Dont run MCE firmware on Emulation
Dont run MCE firmware on pre-silicon emulation platforms
Change-Id: I2a8d653e46f494621580ca92271a18e62f648859 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
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| e9bb627d | 13-Feb-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: remove GPU, MPCORE and PTC registers from streamid list
GPU, MPCORE and PTC clients are changed and not going through SMMU. Removing it from streamid list.
Change-Id: I14b450a11f02ad6c1a9
Tegra194: remove GPU, MPCORE and PTC registers from streamid list
GPU, MPCORE and PTC clients are changed and not going through SMMU. Removing it from streamid list.
Change-Id: I14b450a11f02ad6c1a97e67e487d6d624911d019 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| 7e4ffcd9 | 22-Feb-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra194: Support SMC64 encoding for MCE calls
This patch uses SMC64 encoding for all MCE SMC calls originating from the linux kernel.
Change-Id: Ic4633de5c638566012db033bbaf8c9d9343acdc0 Signed-of
Tegra194: Support SMC64 encoding for MCE calls
This patch uses SMC64 encoding for all MCE SMC calls originating from the linux kernel.
Change-Id: Ic4633de5c638566012db033bbaf8c9d9343acdc0 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 2ac8cb7e | 02-Jan-2017 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra194: add SMMU and mc_sid support
Define mc sid and txn override regs and sec cfgs. Create array for mc sid override regs and sec config that is used to initialize mc. Add smmu ctx regs array to
Tegra194: add SMMU and mc_sid support
Define mc sid and txn override regs and sec cfgs. Create array for mc sid override regs and sec config that is used to initialize mc. Add smmu ctx regs array to hold register values during suspend.
Change-Id: I7b265710a9ec2be7dea050058bce65c614772c78 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| d11c793b | 23-Dec-2016 |
Steven Kao <skao@nvidia.com> |
Tegra194: psci: support for 64-bit TZDRAM base
This patch fixes the variable width to store the TZDRAM base address used to resume from System Suspend.
Change-Id: I3c18eb844963f39f91b5ac45e3709f335
Tegra194: psci: support for 64-bit TZDRAM base
This patch fixes the variable width to store the TZDRAM base address used to resume from System Suspend.
Change-Id: I3c18eb844963f39f91b5ac45e3709f3354bcda0c Signed-off-by: Steven Kao <skao@nvidia.com>
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| 5e2fe3a3 | 11-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with the __BL31_END__ symbol.
Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73 Signed-of
Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with the __BL31_END__ symbol.
Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 9c2eda01 | 21-Dec-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to fix a circular depoendency between them.
This means platform_def.h now has to defi
Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to fix a circular depoendency between them.
This means platform_def.h now has to define the linker macros: * PLATFORM_LINKER_FORMAT * PLATFORM_LINKER_ARCH
Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 9a861d0f | 25-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only within the Tegra186 files and all derived platforms keep the macro enabled.
Change-Id:
Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only within the Tegra186 files and all derived platforms keep the macro enabled.
Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 15440c52 | 03-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image
spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image.
On Tegra platforms, this means we have to increase the mappings to accomodate the new memmap entry.
Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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