build(intel): define a macro for SIMICS build

SIMICS builds have different UART configurations compared
to hardware build. Hence, this patch defines a macro to
differentiate between both.

Signed-of

build(intel): define a macro for SIMICS build

SIMICS builds have different UART configurations compared
to hardware build. Hence, this patch defines a macro to
differentiate between both.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Iadecd5445e06611486ac3c6a214a6d0dc8ccd27b

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build(intel): add N5X as a new Intel platform

This commit adds a new Intel platform called N5X.
This preliminary patch only have Bl31 support.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muh

build(intel): add N5X as a new Intel platform

This commit adds a new Intel platform called N5X.
This preliminary patch only have Bl31 support.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib31f9c4a5a0dabdce81c1d5b0d4776188add7195

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build(intel): initial commit for crypto driver

This patch adds driver for Intel FPGA's Crypto Services.
These services are provided by Intel platform
Secure Device Manager(SDM) and are made accessib

build(intel): initial commit for crypto driver

This patch adds driver for Intel FPGA's Crypto Services.
These services are provided by Intel platform
Secure Device Manager(SDM) and are made accessible by
processor components (ie ATF).
Below is the list of enabled features:
- Send SDM certificates
- Efuse provision data dump
- Encryption/decryption service
- Hardware IP random number generator

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: If7604cd1cacf27a38a9a29ec6b85b07385e1ea26

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Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration

Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration

* changes:
fix(intel): null pointer handling for resp_len
fix(intel): define macros to handle buffer entries

Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration

* changes:
fix(intel): null pointer handling for resp_len
fix(intel): define macros to handle buffer entries
fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
fix(intel): always set doorbell to SDM after sending command
fix(intel): fix bit masking issue in intel_secure_reg_update
fix(intel): fix ddr address range checker
build(changelog): add new scope for Intel platform

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fix(intel): null pointer handling for resp_len

Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case

fix(intel): null pointer handling for resp_len

Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case resp_len is a null pointer. Resp_len with value 0 are also
changed to NULL to match the type change.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490

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fix(intel): define macros to handle buffer entries

This patch defines a macro to handle Secure Device Manager's (SDM)
pointer to command & response buffer entries and convert them to the
correct phy

fix(intel): define macros to handle buffer entries

This patch defines a macro to handle Secure Device Manager's (SDM)
pointer to command & response buffer entries and convert them to the
correct physical address.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4cf9f1d90e0d5ae4e1a2ce84165864b48c2862e7

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fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD

'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD

'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868

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fix(intel): always set doorbell to SDM after sending command

This patch fixes the mailbox stall issue when sending mailbox command
that is larger than mailbox command FIFO size.

Large mailbox comma

fix(intel): always set doorbell to SDM after sending command

This patch fixes the mailbox stall issue when sending mailbox command
that is larger than mailbox command FIFO size.

Large mailbox command will be sent to SDM in multiple chunks. HPS will
set doorbell to SDM when command FIFO full (is_doorbell_triggered will
be set to 1) to notify SDM to read the command data from FIFO, so that
HPS can continue to send the next chunk of command data.

However, HPS will not set the doorbell to SDM at the end if the doorbell
have been set earlier due to FIFO full. This will cause SDM mailbox
service stall because it is still waiting for last chunk of command data.

This patch fixes the code to always set the doorbell to SDM at the end
to get rid of stall issue.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: Idbe62410a00d92a30c7aeaa26d53d79a910cac0a

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fix(intel): fix bit masking issue in intel_secure_reg_update

intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin

fix(intel): fix bit masking issue in intel_secure_reg_update

intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b

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fix(intel): fix ddr address range checker

This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address i

fix(intel): fix ddr address range checker

This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address if the SMC call doesn't need to pass any address buffer.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I7e492c562a311ba989570c4ed465f845333ec865

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fix(intel): assert if bl_mem_params is NULL pointer

This patch fixes the code issue detected by Klocwork scan. Pointer
'bl_mem_params' returned from call to function 'get_bl_mem_params_node'
may be

fix(intel): assert if bl_mem_params is NULL pointer

This patch fixes the code issue detected by Klocwork scan. Pointer
'bl_mem_params' returned from call to function 'get_bl_mem_params_node'
may be NULL and the NULL pointer may be caused the system crash. Update
the code to assert if unexpected NULL pointer is returned.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I00f3132a6104618cadce26aa303c0b46b5921d5b

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fix(intel): enable HPS QSPI access by default

Request ownership and direct access to QSPI by default in BL2.
Previously, this is only done on QSPI boot mode.

Signed-off-by: Abdul Halim, Muhammad Ha

fix(intel): enable HPS QSPI access by default

Request ownership and direct access to QSPI by default in BL2.
Previously, this is only done on QSPI boot mode.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ie222bbf9d719f2f70f89d4739c285efe6df4c955

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