1# 2# Copyright (c) 2020-2022, Intel Corporation. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_INCLUDES := \ 8 -Iplat/intel/soc/n5x/include/ \ 9 -Iplat/intel/soc/common/drivers/ \ 10 -Iplat/intel/soc/common/include/ 11 12# Include GICv2 driver files 13include drivers/arm/gic/v2/gicv2.mk 14DM_GICv2_SOURCES := \ 15 ${GICV2_SOURCES} \ 16 plat/common/plat_gicv2.c 17 18 19PLAT_BL_COMMON_SOURCES := \ 20 ${DM_GICv2_SOURCES} \ 21 drivers/delay_timer/delay_timer.c \ 22 drivers/delay_timer/generic_delay_timer.c \ 23 drivers/ti/uart/aarch64/16550_console.S \ 24 lib/xlat_tables/aarch64/xlat_tables.c \ 25 lib/xlat_tables/xlat_tables_common.c \ 26 plat/intel/soc/common/aarch64/platform_common.c \ 27 plat/intel/soc/common/aarch64/plat_helpers.S \ 28 plat/intel/soc/common/socfpga_delay_timer.c 29 30BL2_SOURCES += 31 32BL31_SOURCES += \ 33 drivers/arm/cci/cci.c \ 34 lib/cpus/aarch64/aem_generic.S \ 35 lib/cpus/aarch64/cortex_a53.S \ 36 plat/common/plat_psci_common.c \ 37 plat/intel/soc/n5x/bl31_plat_setup.c \ 38 plat/intel/soc/common/socfpga_psci.c \ 39 plat/intel/soc/common/socfpga_sip_svc.c \ 40 plat/intel/soc/common/socfpga_topology.c \ 41 plat/intel/soc/common/sip/socfpga_sip_fcs.c \ 42 plat/intel/soc/common/soc/socfpga_mailbox.c \ 43 plat/intel/soc/common/soc/socfpga_reset_manager.c 44 45PROGRAMMABLE_RESET_ADDRESS := 0 46BL2_AT_EL3 := 1 47BL2_INV_DCACHE := 0 48MULTI_CONSOLE_API := 1 49SIMICS_BUILD := 0 50USE_COHERENT_MEM := 1 51