| bd3d7b4a | 16-Aug-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: override weak implementation of plat_arm_get_cpu_pe_count
To support platforms which are based on multi-threaded CPUs, override the weak implementation of plat_arm_get_cpu_pe_count fun
plat/arm/sgi: override weak implementation of plat_arm_get_cpu_pe_count
To support platforms which are based on multi-threaded CPUs, override the weak implementation of plat_arm_get_cpu_pe_count function to return the number of threads supported by the CPU used in the platform.
Change-Id: Ia680773f1277b17e2d3d2414d87943dcece33e89 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| eff2f444 | 16-Oct-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/css: allow platforms to define the system power domain level
The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain level is fixed at ARM_PWR_LVL2 for all CSS platforms. However,
plat/css: allow platforms to define the system power domain level
The CSS_SYSTEM_PWR_DMN_LVL macro that defines the system power domain level is fixed at ARM_PWR_LVL2 for all CSS platforms. However, the system power domain level can be different for CSS platforms that use multi-threaded CPUs.
So, in preparation towards adding support for platforms that use multi-threaded CPUs, refactor the definition of CSS_SYSTEM_PWR_DMN_LVL such that CSS_SYSTEM_PWR_DMN_LVL is uniquely defined for each of the CSS platform.
Change-Id: Ia837b13f6865e71da01780993c048b45b7f36d85 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 85397ec4 | 26-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1697 from antonio-nino-diaz-arm/an/arch
Synchronise arch.h and arch_helpers.h with TF-A-Tests |
| 932b3ae2 | 22-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Synchronise arch.h and arch_helpers.h with TF-A-Tests
The headers forked at some point in the past and have diverged a lot. In order to make it easier to share code between TF-A-Tests and TF-A, this
Synchronise arch.h and arch_helpers.h with TF-A-Tests
The headers forked at some point in the past and have diverged a lot. In order to make it easier to share code between TF-A-Tests and TF-A, this patch synchronises most of the definitions in the mentioned headers.
This is not a complete sync, it has to be followed by more cleanup.
This patch also removes the read helpers for the AArch32 instructions ats1cpr and ats1hr (they are write-only).
Change-Id: Id13ecd7aeb83bd2318cd47156d71a42f1c9f6ba2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| afa5cfea | 02-Nov-2018 |
Sathees Balya <sathees.balya@arm.com> |
juno: Add romlib support
This patch adds support to build a combined BL1 and ROMLIB binary file with the right page alignment in Juno. When USE_ROMLIB=1 is set for Juno, it generates the combined fi
juno: Add romlib support
This patch adds support to build a combined BL1 and ROMLIB binary file with the right page alignment in Juno. When USE_ROMLIB=1 is set for Juno, it generates the combined file bl1_romlib.bin which needs to be used instead of bl1.bin
Change-Id: I407efbe48d3e522fa6ef855538a9587193cb1919 Signed-off-by: Sathees Balya <sathees.balya@arm.com>
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| 9427c745 | 25-Oct-2018 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
plat/arm/sgi: add secure memory support for sgi575 and sgiclarka
Remove the platform common plat_arm_security_setup function to allow platform specific implementations of the security setup function
plat/arm/sgi: add secure memory support for sgi575 and sgiclarka
Remove the platform common plat_arm_security_setup function to allow platform specific implementations of the security setup function implemented in the board directory of the platform.
For use by secure software, configure region0 of DMC-620 trustzone controller to protect the upper 16MB of memory of the first DRAM block from non-secure accesses.
Change-Id: I9a8c19656702c4fa4f6917b3655b692d443bb568 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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| 5681b292 | 14-Nov-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
SPM: Register Secure Partition priority level with ehf module
Register a priority level, PLAT_SP_PRI, for secure partition with EL3 exception handling framework(ehf) module.
The secure partition ma
SPM: Register Secure Partition priority level with ehf module
Register a priority level, PLAT_SP_PRI, for secure partition with EL3 exception handling framework(ehf) module.
The secure partition manager(SPM) would raise the core's priority to PLAT_SP_PRI before entering the secure partition, to protect the core from getting interrupted while in secure partition.
Change-Id: I686897f052a4371e0efa9b929c07d3ad77249e95 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| c3cf06f1 | 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| cb2a9b62 | 07-Nov-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1670 from antonio-nino-diaz-arm/an/misra-arm
plat/arm: Fix MISRA defects in common code |
| 583e0791 | 06-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix MISRA defects in common code
Change-Id: I2419416fadfcdf64da8b7690a348007591c4edf3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| ed2c4f4a | 02-Nov-2018 |
Manish Pandey <manish.pandey2@arm.com> |
plat/arm: Support direct Linux kernel boot in AArch32
This option allows the Trusted Firmware to directly jump to Linux kernel for aarch32 without the need of an intermediate loader such as U-Boot.
plat/arm: Support direct Linux kernel boot in AArch32
This option allows the Trusted Firmware to directly jump to Linux kernel for aarch32 without the need of an intermediate loader such as U-Boot.
Similar to AArch64 ARM_LINUX_KERNEL_AS_BL33 only available with RESET_TO_SP_MIN=1 as well as BL33 and DTB are preloaded in memory.
Change-Id: I908bc1633696be1caad0ce2f099c34215c8e0633 Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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| dd756c98 | 02-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1663 from sudeep-holla/scpi_build_fix
plat: juno: fix build for !CSS_USE_SCMI_DRIVER |
| 8db71e37 | 01-Nov-2018 |
Sudeep Holla <sudeep.holla@arm.com> |
plat: juno: fix build for !CSS_USE_SCMI_DRIVER
When CSS_USE_SCMI_DRIVER is not defined or set to 0, we get the following build error.
plat/arm/board/juno/juno_topology.c:16:19: error: ‘CSS_SCMI_PAY
plat: juno: fix build for !CSS_USE_SCMI_DRIVER
When CSS_USE_SCMI_DRIVER is not defined or set to 0, we get the following build error.
plat/arm/board/juno/juno_topology.c:16:19: error: ‘CSS_SCMI_PAYLOAD_BASE’ undeclared here (not in a function) .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, ^~~~~~~~~~~~~~~~~~~~~ plat/arm/board/juno/juno_topology.c:17:38: error: ‘CSS_SCMI_MHU_DB_REG_OFF’ undeclared here (not in a function) .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, ^~~~~~~~~~~~~~~~~~~~~~~ CSS_CPU_PWR_STATE_OFF
Fix the error in order to get function legacy SCPI support functional.
Change-Id: I00cb80db9968aa0be546e33a3a682a2db87719be Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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| b8a02d53 | 30-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix MISRA defects in dyn config
Change-Id: Iae6758ca6395560131d1e1a69a1ecfe50ca8bf83 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| f21c6321 | 30-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix types of constants in headers
Change-Id: I33eaee8e7c983b3042635a448cb8d689ea4e3a12 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| a0fee747 | 31-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
context_mgmt: Fix MISRA defects
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented().
Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: An
context_mgmt: Fix MISRA defects
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented().
Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| d03823d4 | 31-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1650 from chandnich/sgiclark-ares-support
Sgiclark ares support |
| b3f7c42d | 31-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1655 from deepan02/deepak-arm/introduce-n1sdp
plat/arm: Introduce the N1SDP. |
| 15b94cc1 | 25-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Fix MISRA defects in SiP SVC handler
No functional changes.
Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 80d37c28 | 08-Aug-2018 |
Deepak Pandey <Deepak.Pandey@arm.com> |
plat/arm: Introduce the N1SDP.
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later.
The por
plat/arm: Introduce the N1SDP.
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later.
The port includes only BL31 support as the System Control Processor (SCP) is expected to take the role of primary boatloader
Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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| fc922ca8 | 14-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create a dynamic relocation entry in .rela.dyn and hence will be fixed up by dynamic linker at runtime. Also, we disable RECLAIM_INIT_CODE when PIE is enabled as the init section overlay creates some static relocations which cannot be handled by the dynamic linker currently.
Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| bd83b396 | 12-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbd
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 6a7b3005 | 12-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Add helper to return reference to a symbol
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference
Add helper to return reference to a symbol
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference and this utility is used to override this compiler generated to code and use `ldr` instruction.
This is needed for Position Independent Executable when it needs to reference a symbol which is constant and does not depend on the execute address of the binary.
For example, on the FVP, the GICv3 register context is stored in a secure carveout (arm_el3_tzc_dram) within DDR and does not relocate with the BL image. Now if BL31 is executing at a different address other than the compiled address, using adrp/adr instructions to reference this memory will not work as they generate an address that is PC relative. The way to get around this problem is to reference it as non-PC relative (i.e non-relocatable location) via `ldr` instruction.
Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 0916c38d | 19-Oct-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 03987d01 | 19-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platf
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms.
This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header.
The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2.
This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround).
Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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