| 9e119a40 | 25-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
sgi: sgm: Migrate to new interfaces
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0.
Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f Tested-by: Nariman Poush
sgi: sgm: Migrate to new interfaces
- Remove references to removed build options. - Remove support for LOAD_IMAGE_V2=0.
Change-Id: I296385ef2ebf829446c76a54400d73f963ed265f Tested-by: Nariman Poushin <nariman.poushin@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 60e19f57 | 25-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Migrate to new interfaces
- Remove references to removed build options. - Remove support for legacy GIC driver. - Remove support for LOAD_IMAGE_V2=0.
Change-Id: I72f8c05620bdf4a682765e6e5
plat/arm: Migrate to new interfaces
- Remove references to removed build options. - Remove support for legacy GIC driver. - Remove support for LOAD_IMAGE_V2=0.
Change-Id: I72f8c05620bdf4a682765e6e53e2c04ca749a3d5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 7401edf2 | 28-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Revert "sgm: increase SCP_BL2 maximum size" |
| fa06b744 | 16-Aug-2018 |
John Tsichritzis <john.tsichritzis@arm.com> |
Fix static analysis defects
Fixed a Coverity defect by adding a runtime check to avoid potential NULL pointer dereference.
Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d Signed-off-by: John T
Fix static analysis defects
Fixed a Coverity defect by adding a runtime check to avoid potential NULL pointer dereference.
Change-Id: I9a0aa0efd27334131ac835b43348658b436c657d Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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| 3a8667b9 | 24-Sep-2018 |
Elieva Pignat <Elieva.Pignat@arm.com> |
sgm: increase SCP_BL2 maximum size
For sgm775 the SCP_BL2 build in debug mode is around 94KiB which is higher than the maximum size for SCP_BL2.
This patch increase the maximum allowed size for SCP
sgm: increase SCP_BL2 maximum size
For sgm775 the SCP_BL2 build in debug mode is around 94KiB which is higher than the maximum size for SCP_BL2.
This patch increase the maximum allowed size for SCP_BL2 to 96KiB.
Change-Id: Ibca0daadba41429301c651ae21cbba87e45ccddf Signed-off-by: Elieva Pignat <Elieva.Pignat@arm.com>
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| 441b1e8d | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1569 from soby-mathew/sm/cov_fix_scmi
CSS: Fix overrun if system power level is not available |
| d4ee9aa6 | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
CSS: Fix overrun if system power level is not available
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.cove
CSS: Fix overrun if system power level is not available
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.coverity.com/projects/arm-software-arm-trusted-firmware
CID 308492
Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 2431d00f | 25-May-2017 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
ARM Platforms:Enable non-secure access to UART1
Adds an undocumented build option that enables non-secure access to the PL011 UART1. This allows a custom build where the UART can be used as a serial
ARM Platforms:Enable non-secure access to UART1
Adds an undocumented build option that enables non-secure access to the PL011 UART1. This allows a custom build where the UART can be used as a serial debug port for WinDbg (or other debugger) connection.
This option is not documented in the user guide, as it is provided as a convenience for Windows debugging, and not intended for general use. In particular, enabling non-secure access to the UART might allow a denial of service attack!
Change-Id: I4cd7d59c2cac897cc654ab5e1188ff031114ed3c Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
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| 2a579540 | 22-Aug-2018 |
John Tsichritzis <john.tsichritzis@arm.com> |
Support shared Mbed TLS heap for SGM
Change-Id: Ibbfedb6601feff51dfb82c1d94850716c5a36d24 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| 7cdb4347 | 22-Aug-2018 |
John Tsichritzis <john.tsichritzis@arm.com> |
Support shared Mbed TLS heap for SGI
Change-Id: Iac454c745543842bfeed004aee7a3f4fb94d37e1 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| 93c78ed2 | 16-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb03
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 354596f6 | 07-Mar-2018 |
Nariman Poushin <nariman.poushin@linaro.org> |
plat/arm: Add support for SGM775
Add support for System Guidance for Mobile platform SGM775
Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653 Signed-off-by: Nariman Poushin <nariman.poushin@lina
plat/arm: Add support for SGM775
Add support for System Guidance for Mobile platform SGM775
Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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| 5b2a7813 | 10-Oct-2017 |
Deepak Pandey <Deepak.Pandey@arm.com> |
css_pm_scmi: optimise cpu suspend to remove redundant scmi call
In css platforms where the cpu/cluster management is done by the hardware, software does need to issue certain scmi requests.
This pa
css_pm_scmi: optimise cpu suspend to remove redundant scmi call
In css platforms where the cpu/cluster management is done by the hardware, software does need to issue certain scmi requests.
This patch wraps those scmi calls around the HW_ASSISTED_COHERENCY build option to remove them on platforms that have this hardware support.
Change-Id: Ie818e234484ef18549aa7f977aef5c3f0fc26c27 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
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| 58192800 | 25-Jun-2018 |
Nariman Poushin <nariman.poushin@linaro.org> |
plat/arm: css: Set MT bit in incoming mpidr arugments
Change-Id: I278d6876508800abff7aa2480910306a24de5378 Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org> |
| a41d1b2c | 01-Aug-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/sgi: switch to using scmi
The Arm SGI platforms can switch to using SCMI. So enable support for SCMI and remove portions of code that would be unused after switching to SCMI.
Change-Id: Ifd9e1
plat/sgi: switch to using scmi
The Arm SGI platforms can switch to using SCMI. So enable support for SCMI and remove portions of code that would be unused after switching to SCMI.
Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 8e1cc449 | 02-Aug-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
sgi: disable CPU power down bit in reset handler
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it for hotplug and idle to function correc
sgi: disable CPU power down bit in reset handler
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it for hotplug and idle to function correctly. The reset value of this bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN in the platform specific reset handler function.
Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| f29d1828 | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
RAS: SGI: Add flags needed to build components for RAS feature
Add the various flags that are required to build the components needed to enable the RAS feature on SGI575 platform. By default, all fl
RAS: SGI: Add flags needed to build components for RAS feature
Add the various flags that are required to build the components needed to enable the RAS feature on SGI575 platform. By default, all flags are set to 0, disabling building of all corresponding components.
Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| 167dae4d | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
RAS: SGI575: Add platform specific RAS changes
Add platform specific changes needed to add support for the RAS feature on SGI575 platform, including adding a mapping for the CPER buffer being used o
RAS: SGI575: Add platform specific RAS changes
Add platform specific changes needed to add support for the RAS feature on SGI575 platform, including adding a mapping for the CPER buffer being used on SGI575 platform.
Change-Id: I01a982e283609b5c48661307906346fa2738a43b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| 485fc954 | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
RAS: SGI: Add platform handler for RAS interrupts
Add a platform specific handler for RAS interrupts and configure the platform RAS interrupts for EL3 handling. The interrupt handler passes control
RAS: SGI: Add platform handler for RAS interrupts
Add a platform specific handler for RAS interrupts and configure the platform RAS interrupts for EL3 handling. The interrupt handler passes control to StandaloneMM code executing in S-EL0, which populates the CPER buffer with relevant error information. The handler subsequently invokes the SDEI client which processes the information in the error information in the CPER buffer. The helper functions plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be defined for sgi platforms in the subsequent patch, which adds sgi575 specific RAS changes.
Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| d9523919 | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
SPM: SGI: Map memory allocated for secure partitions
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication
SPM: SGI: Map memory allocated for secure partitions
The secure partition manager reserves chunks of memory which are used for the S-EL0 StandaloneMM image and the buffers required for communication between the Non-Secure world with the StandaloneMM image. Add the memory chunks to relevant arrays for mapping the regions of memory with corresponding attributes.
Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| 2e4a509d | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
ARM platforms: Allow board specific definition of SP stack base
The SGI platforms need to allocate memory for CPER buffers. These platform buffers would be placed between the shared reserved memory
ARM platforms: Allow board specific definition of SP stack base
The SGI platforms need to allocate memory for CPER buffers. These platform buffers would be placed between the shared reserved memory and the per cpu stack memory, thus the need to redefine stack base pointer for these platforms. This patch allows each board in ARM platform to define the PLAT_SP_IMAGE_STACK_BASE.
Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| d9cc9372 | 16-May-2018 |
Sughosh Ganu <sughosh.ganu@arm.com> |
SGI: Include arm_spm_def.h in platform_def.h
Include arm_spm_def.h in the platform_def.h file. Without this inclusion, we get build errors like
In file included from services/std_svc/spm/sp_setup.c
SGI: Include arm_spm_def.h in platform_def.h
Include arm_spm_def.h in the platform_def.h file. Without this inclusion, we get build errors like
In file included from services/std_svc/spm/sp_setup.c:12:0: services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup': services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE' undeclared (first use in this function) write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE);
Now that the platform_def.h includes arm_spm_def.h, remove inclusion of platform_def.h in arm_spm_def.h to remove the circular dependency.
Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17 Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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| 1083b2b3 | 20-Jul-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
PSCI: Fix types of definitions
Also change header guards to fix defects of MISRA C-2012 Rule 21.1.
Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org>
PSCI: Fix types of definitions
Also change header guards to fix defects of MISRA C-2012 Rule 21.1.
Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57 Acked-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 2a246d2e | 18-Jun-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
CSS: Use SCMI AP core protocol to set the warm boot entrypoint
Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> |
| bfe3c449 | 03-Apr-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Add support for SCMI AP core configuration protocol v1.0
Change-Id: If07000b6b19011e960336a305a784dd643301b97 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> |