feat(fvp): add Dualroot CoT in DTB support

Adding support for Dualroot CoT in DTB. This makes it possible for BL2
to retrieve its chain of trust description from a configuration file in
DTB format.

feat(fvp): add Dualroot CoT in DTB support

Adding support for Dualroot CoT in DTB. This makes it possible for BL2
to retrieve its chain of trust description from a configuration file in
DTB format. With this, the CoT description may be updated without
rebuilding BL2 image.

This feature can be enabled by building BL2 with COT_DESC_IN_DTB=1 and
COT=dualroot. The default behavior remains to embed the CoT description
into BL2 image.

Change-Id: I343931b145aa8a53b0a5d4b8aefb273ffb5a9163
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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refactor(tc): append binding for SMMU-700

The usage for SMMU-700 is not consistent across TC platforms:

SMMU-700 on TC2:

| FVP | FPGA
--------+-------+------
Display | Used | Us

refactor(tc): append binding for SMMU-700

The usage for SMMU-700 is not consistent across TC platforms:

SMMU-700 on TC2:

| FVP | FPGA
--------+-------+------
Display | Used | Used
GPU | Used | Used

SMMU-700 on TC3:

| FVP | FPGA
--------+-------+------
Display | No | No
GPU | Used | No

This commit changes to use append mode for SMMU-700 to bind it on TC2
and TC3 separately. As a result, the TC_IOMMU_EN configuration is not
used, remove it.

Change-Id: Ic4152eb4c8ef97bf27b8a97c3c6cb86e32a2e8eb
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): configure MCN rdalloc and wralloc mode

SLC WRALLOCMODE and RDALLOCMODE are configured by default to 0b01
(always alloc), configure both to mode 0b10 (use bus signal attribute
from interfac

feat(tc): configure MCN rdalloc and wralloc mode

SLC WRALLOCMODE and RDALLOCMODE are configured by default to 0b01
(always alloc), configure both to mode 0b10 (use bus signal attribute
from interface).

Change-Id: Ic8cd3ee988dd0772cfb9b639dea0cc335ab70539
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): add dts entries for MCN PMU nodes

TC3 has 4 MCN instances, each of them have PMU registers to count
different MCN cache access events, add entries for MCN PMU so that Linux
MCN PMU perf dr

feat(tc): add dts entries for MCN PMU nodes

TC3 has 4 MCN instances, each of them have PMU registers to count
different MCN cache access events, add entries for MCN PMU so that Linux
MCN PMU perf driver can be used with perf.

Change-Id: I7e0ac5025231c3f19d5291292d4cae186accc544
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): enable MCN non-secure access to pmu counters on TC3

MCN PMU counters are by default non-accesible from non-secure world, so
enable the non-secure access to those PMU counters so that linux

feat(tc): enable MCN non-secure access to pmu counters on TC3

MCN PMU counters are by default non-accesible from non-secure world, so
enable the non-secure access to those PMU counters so that linux perf
driver can read them. FVP has a different address space size.

Change-Id: I2a3758faca5f7cab6d3146a1beb7b289eec0294d
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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Merge "feat(tc): support full-HD resolution for the FVP model" into integration

Merge changes from topic "us_mhuv3" into integration

* changes:
feat(tc): add MHUv3 addresses between RSS and AP
feat(tc): specify MHU version based on platform
feat(tc): bind SCMI over MHUv3

Merge changes from topic "us_mhuv3" into integration

* changes:
feat(tc): add MHUv3 addresses between RSS and AP
feat(tc): specify MHU version based on platform
feat(tc): bind SCMI over MHUv3 for TC3
feat(tc): add MHUv3 DT binding for TC3
feat(tc): add MHUv3 doorbell support on TC3
refactor(tc): change tc_scmi_plat_info to single structure

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chore: rename Blackhawk to Cortex-X925

Rename Blackhawk to Cortex-X925.

Change-Id: I51e40a7bc6b8871c53c40d1f341853b1fd7fdf71
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename Chaberton to Cortex-A725

Rename Chaberton to Cortex-A725.

Change-Id: I981b22d3b37f1aa6e25ff1f35aa156fff9c30076
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

feat(tc): support full-HD resolution for the FVP model

Enable full-HD resolution (1920x1080p60) for the FVP model, and add
checking for the passed resolution parameter.

Change-Id: I5e37ae79b5ceac08

feat(tc): support full-HD resolution for the FVP model

Enable full-HD resolution (1920x1080p60) for the FVP model, and add
checking for the passed resolution parameter.

Change-Id: I5e37ae79b5ceac088a18d5acf00ff4a557bb56aa
Signed-off-by: Sergio Alves <sergio.dasilvalves@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): add MHUv3 addresses between RSS and AP

TC3 is upgraded to MHUv3. This patch adds the address of the MHU
channel to be used by TF-A for communications with the RSS.

Change-Id: I1bf5d72dc92

feat(tc): add MHUv3 addresses between RSS and AP

TC3 is upgraded to MHUv3. This patch adds the address of the MHU
channel to be used by TF-A for communications with the RSS.

Change-Id: I1bf5d72dc92bcd9d0509ba806095b24293875e85
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): specify MHU version based on platform

Platforms older than TC2 contain MHUv2 well as newer platforms contain
MHUv3. Set the Makefile variable accordingly.

Change-Id: I00b83a34908cdbf7d1d9

feat(tc): specify MHU version based on platform

Platforms older than TC2 contain MHUv2 well as newer platforms contain
MHUv3. Set the Makefile variable accordingly.

Change-Id: I00b83a34908cdbf7d1d9ac39728e3fa6ef449d2c
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(tc): add MHUv3 doorbell support on TC3

Enables the doorbell channels in MHUv3 for TC3.

Change-Id: Ib4f47df3e54f9182939ea6c1d8bc1a66a3c03094
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.

feat(tc): add MHUv3 doorbell support on TC3

Enables the doorbell channels in MHUv3 for TC3.

Change-Id: Ib4f47df3e54f9182939ea6c1d8bc1a66a3c03094
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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refactor(tc): change tc_scmi_plat_info to single structure

Currently, as the Total Compute system uses a single channel for MHU,
it's useless to define the structure 'tc_scmi_plat_info' as an array.

refactor(tc): change tc_scmi_plat_info to single structure

Currently, as the Total Compute system uses a single channel for MHU,
it's useless to define the structure 'tc_scmi_plat_info' as an array.
Change it as a single structure.

Change-Id: Iaa7c853327e7f5e67ccc14d12c5f0ef68d75dfd7
Signed-off-by: Leo Yan <leo.yan@arm.com>

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feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_

feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_MAX_BLOCK
build parameter and takes values 0, 2, 32 and 512 and
by default set to 2 in make_helpers/defaults.mk.
Setting RME_GPT_MAX_BLOCK value to 0 disables use of
Contiguous descriptors.
Function gpt_tlbi_by_pa_ll() and its declaration
are removed from lib/aarch64/misc_helpers.S and
include/arch/aarch64/arch_helpers.h, because the
GPT library now uses tlbirpalos_xxx() functions.

Change-Id: Ia9a59bde1741c5666b4ca1de9324e6dfd6f734eb
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>

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fix(fvp): added ranges for linux

This extends the SPM's NS ranges for linux to do
the RXTX map.

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I99b4f2c0355edb88be2484b445b97701e166cbfd

Merge changes from topic "ar/pmuSaveRestore" into integration

* changes:
feat(tc): add save/restore DSU PMU register support
feat(dsu): save/restore DSU PMU register
feat(plat): add platform A

Merge changes from topic "ar/pmuSaveRestore" into integration

* changes:
feat(tc): add save/restore DSU PMU register support
feat(dsu): save/restore DSU PMU register
feat(plat): add platform API that gets cluster ID

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feat(mbedtls): update config for 3.6.0

Further, remove reliance of mbedtls_md_psa_alg_from_type on
the actual values of the PSA_ALG_... defines.

And work around a prior bug that would try to import

feat(mbedtls): update config for 3.6.0

Further, remove reliance of mbedtls_md_psa_alg_from_type on
the actual values of the PSA_ALG_... defines.

And work around a prior bug that would try to import a
SubjectPublicKeyInfo into a PSA key. Instead, we import the
SubjectPublicKey itself.

Change-Id: Ib345b0bd4f2994f366629ed162d18814fd05aa2b
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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feat(tc): add save/restore DSU PMU register support

This patch adds support for preserving DSU PMU registers
over a power cycle in TC platform.

These PMU registers need to be manually saved/restore

feat(tc): add save/restore DSU PMU register support

This patch adds support for preserving DSU PMU registers
over a power cycle in TC platform.

These PMU registers need to be manually saved/restored
because they are part of cluster power domain and OS
doesn't know when DSU is powered OFF.

Change-Id: Ife9573f205d99d092039cb95674e7434bb5f9239
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>

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feat(plat): add platform API that gets cluster ID

This patch adds an API(plat_cluster_id_by_mpidr)
that retrieves the cluster ID by looking at
the MPIDR_EL1 for platforms that have ARM_PLAT_MT set

feat(plat): add platform API that gets cluster ID

This patch adds an API(plat_cluster_id_by_mpidr)
that retrieves the cluster ID by looking at
the MPIDR_EL1 for platforms that have ARM_PLAT_MT set

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I0266f2e49a3114d169a7708d7ddbd4f6229a7a41

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Merge changes from topic "tc_refactor_dt_binding" into integration

* changes:
refactor(tc): move SCMI nodes into the 'firmware' node
refactor(tc): move MHUv2 property to tc2.dts
refactor(tc):

Merge changes from topic "tc_refactor_dt_binding" into integration

* changes:
refactor(tc): move SCMI nodes into the 'firmware' node
refactor(tc): move MHUv2 property to tc2.dts
refactor(tc): drop the 'mhu-protocol' property in DT binding
refactor(tc): append properties in DT bindings
refactor(tc): move SCMI clock DT binding into tc-base.dtsi
refactor(tc): introduce a new file tc-fpga.dtsi
refactor(tc): move out platform specific DT binding from tc-base.dtsi
refactor(tc): move out platform specific code from tc_vers.dtsi
refactor(tc): add platform specific DT files
refactor(tc): rename 'tc_fvp.dtsi' to 'tc-fvp.dtsi'
refactor(tc): introduce a new macro ADDRESSIFY()

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Merge "chore: rename hermes to neoverse-n3" into integration

Merge changes from topic "makefile-cleanup" into integration

* changes:
build: improve diagnostics for unrecognized toolchain tools
build(rzg): separate BL2 and BL31 SREC generation
build(rcar

Merge changes from topic "makefile-cleanup" into integration

* changes:
build: improve diagnostics for unrecognized toolchain tools
build(rzg): separate BL2 and BL31 SREC generation
build(rcar): separate BL2 and BL31 SREC generation
build: separate preprocessing from DTB compilation
build: remove `MAKE_BUILD_STRINGS` function

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chore: rename hermes to neoverse-n3

Rename hermes cpu to Neoverse-N3

Change-Id: I912d4c824c5004a8c1909c68fef77f1f5e202b8a
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(tc): enable FEAT_MTE2" into integration