1 /* 2 * Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NRD_VARIANT_H 8 #define NRD_VARIANT_H 9 10 /* SSC_VERSION values for SGI575 */ 11 #define SGI575_SSC_VER_PART_NUM 0x0783 12 13 /* SID Version values for RD-N1E1-Edge */ 14 #define RD_N1E1_EDGE_SID_VER_PART_NUM 0x0786 15 #define RD_E1_EDGE_CONFIG_ID 0x2 16 17 /* SID Version values for RD-V1 */ 18 #define RD_V1_SID_VER_PART_NUM 0x078a 19 20 /* SID Version values for RD-N2 */ 21 #define RD_N2_SID_VER_PART_NUM 0x07B7 22 23 /* SID Version values for RD-N2 variants */ 24 #define RD_N2_CFG1_SID_VER_PART_NUM 0x07B6 25 #define RD_N2_CFG3_SID_VER_PART_NUM 0x07F1 26 27 /* SID Version values for RD-V2 */ 28 #define RD_V2_SID_VER_PART_NUM 0x07F2 29 #define RD_V2_CONFIG_ID 0x1 30 31 /* SID Version values for RD-Fremont */ 32 #define RD_FREMONT_SID_VER_PART_NUM 0x07EE 33 #define RD_FREMONT_CONFIG_ID 0x0 34 35 /* Structure containing Neoverse RD platform variant information */ 36 typedef struct nrd_platform_info { 37 unsigned int platform_id; /* Part Number of the platform */ 38 unsigned int config_id; /* Config Id of the platform */ 39 unsigned int chip_id; /* Chip Id or Node number */ 40 unsigned int multi_chip_mode; /* Multi-chip mode availability */ 41 } nrd_platform_info_t; 42 43 extern nrd_platform_info_t nrd_plat_info; 44 45 /* returns the part number of the platform*/ 46 unsigned int plat_arm_nrd_get_platform_id(void); 47 48 /* returns the configuration id of the platform */ 49 unsigned int plat_arm_nrd_get_config_id(void); 50 51 /* returns true if operating in multi-chip configuration */ 52 unsigned int plat_arm_nrd_get_multi_chip_mode(void); 53 54 #endif /* NRD_VARIANT_H */ 55