xref: /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_plat3.c (revision 0876c74285377857d34701f9279cc15b60f6ac50)
1 /*
2  * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <drivers/arm/css/sds.h>
10 #include <drivers/arm/sbsa.h>
11 #include <lib/utils_def.h>
12 #include <plat/arm/common/plat_arm.h>
13 #include <plat/common/platform.h>
14 
15 #include <platform_def.h>
16 
17 /*
18  * Table of regions for different BL stages to map using the MMU.
19  */
20 #if IMAGE_BL1
21 const mmap_region_t plat_arm_mmap[] = {
22 	NRD_CSS_SHARED_RAM_MMAP(0),
23 	NRD_ROS_FLASH0_RO_MMAP,
24 	NRD_CSS_PERIPH_MMAP(0),
25 	NRD_ROS_PLATFORM_PERIPH_MMAP,
26 	NRD_ROS_SYSTEM_PERIPH_MMAP,
27 	{0}
28 };
29 #endif /* IMAGE_BL3 */
30 
31 #if IMAGE_BL2
32 const mmap_region_t plat_arm_mmap[] = {
33 	NRD_CSS_SHARED_RAM_MMAP(0),
34 	NRD_ROS_FLASH0_RO_MMAP,
35 #ifdef PLAT_ARM_MEM_PROT_ADDR
36 	NRD_ROS_V2M_MEM_PROTECT_MMAP,
37 #endif
38 	NRD_CSS_PERIPH_MMAP(0),
39 	NRD_ROS_PLATFORM_PERIPH_MMAP,
40 	NRD_ROS_SYSTEM_PERIPH_MMAP,
41 	NRD_CSS_NS_DRAM1_MMAP,
42 #if TRUSTED_BOARD_BOOT && !RESET_TO_BL2
43 	NRD_CSS_BL1_RW_MMAP,
44 #endif
45 	NRD_CSS_GPT_L1_DRAM_MMAP,
46 	NRD_CSS_RMM_REGION_MMAP,
47 	{0}
48 };
49 #endif /* IMAGE_BL2 */
50 
51 #if IMAGE_BL31
52 const mmap_region_t plat_arm_mmap[] = {
53 	NRD_CSS_SHARED_RAM_MMAP(0),
54 #ifdef PLAT_ARM_MEM_PROT_ADDR
55 	NRD_ROS_V2M_MEM_PROTECT_MMAP,
56 #endif
57 	NRD_CSS_PERIPH_MMAP(0),
58 	NRD_ROS_PLATFORM_PERIPH_MMAP,
59 	NRD_ROS_SYSTEM_PERIPH_MMAP,
60 	NRD_CSS_GPT_L1_DRAM_MMAP,
61 	NRD_CSS_EL3_RMM_SHARED_MEM_MMAP,
62 	{0}
63 };
64 #endif /* IMAGE_BL31 */
65 
66 ARM_CASSERT_MMAP
67 
68 #if TRUSTED_BOARD_BOOT
69 int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
70 {
71 	assert(heap_addr != NULL);
72 	assert(heap_size != NULL);
73 
74 	return arm_get_mbedtls_heap(heap_addr, heap_size);
75 }
76 #endif
77 
78 void plat_arm_secure_wdt_start(void)
79 {
80 	sbsa_wdog_start(NRD_CSS_AP_SECURE_WDOG_BASE,
81 			NRD_CSS_AP_SECURE_WDOG_TIMEOUT);
82 }
83 
84 void plat_arm_secure_wdt_stop(void)
85 {
86 	sbsa_wdog_stop(NRD_CSS_AP_SECURE_WDOG_BASE);
87 }
88 
89 static sds_region_desc_t nrd_sds_regions[] = {
90 	{ .base = PLAT_ARM_SDS_MEM_BASE },
91 };
92 
93 sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count)
94 {
95 	*region_count = ARRAY_SIZE(nrd_sds_regions);
96 
97 	return nrd_sds_regions;
98 }
99