| #
9bb15ab5 |
| 03-Nov-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "morello/firmware-revision" into integration
* changes:
feat(morello): add TF-A version string to NT_FW_CONFIG
feat(morello): set NT_FW_CONFIG properties for MCC, PCC an
Merge changes from topic "morello/firmware-revision" into integration
* changes:
feat(morello): add TF-A version string to NT_FW_CONFIG
feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version
show more ...
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| #
10fd85d8 |
| 17-Aug-2023 |
Werner Lewis <werner.lewis@arm.com> |
feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version
SDS firmware version structure is added with MCC, PCC and SCP firmware
version members. These are set in NT_FW_CONFIG to provi
feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version
SDS firmware version structure is added with MCC, PCC and SCP firmware
version members. These are set in NT_FW_CONFIG to provide access to
firmware version information in UEFI.
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: Ib0c476e54ef428fb7904f0de5c6f4df6a5fbd7db
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| #
33b4041d |
| 25-Apr-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(morello): remove duplication of platform information struct" into integration
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| #
468a6016 |
| 22-Mar-2023 |
Werner Lewis <werner.lewis@arm.com> |
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition
is moved to a header file to avoid duplication.
Signed-of
refactor(morello): remove duplication of platform information struct
morello_plat_info is defined identically in multiple files, definition
is moved to a header file to avoid duplication.
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I607354902c55f5c31f0732de9db60604b82aef97
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|
| #
3e8b6f43 |
| 15-Mar-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): implement methods to retrieve soc-id information" into integration
|
| #
cc266bcd |
| 16-Feb-2023 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information
f
feat(morello): implement methods to retrieve soc-id information
Added silicon revision in the platform information SDS structure.
Implemented platform functions to retrieve the soc-id information
for the morello SoC platform. SoC revision, which is same as
silicon revision, is fetched from the morello_plat_info structure
and SoC version is populated with the part number from SSC_VERSION
register, and is reflected in bits[0:15] of soc-id.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: I8e0c5b2bc21e393e6d638858cc2ea9f4638f04b9
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| #
1d996e56 |
| 17-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add sup
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add support for nt_fw_config
feat(morello): split platform_info sds struct
feat(morello): add changes to enable TBBR boot
feat(morello): add DTS for Morello SoC platform
feat(morello): configure DMC-Bing mode
feat(morello): zero out the DDR memory space
feat(morello): add TARGET_PLATFORM flag
fix(morello): fix SoC reference clock frequency
fix(arm): use PLAT instead of TARGET_PLATFORM
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| #
4a7a9daf |
| 02-Dec-2021 |
sah01 <sahil@arm.com> |
feat(morello): split platform_info sds struct
Different platform_info sds struct definition will be used
for fvp and soc.
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I92f0e1b2d0d755ad0405ceebfe
feat(morello): split platform_info sds struct
Different platform_info sds struct definition will be used
for fvp and soc.
Signed-off-by: sahil <sahil@arm.com>
Change-Id: I92f0e1b2d0d755ad0405ceebfeb78d6e4c67013d
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| #
4af53977 |
| 10-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ib8f7f326790b13082cbe8db21a980e048e3db88c
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| #
9b8c431e |
| 30-Nov-2021 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
feat(morello): configure DMC-Bing mode
Based on the SCC configuration value obtained from the SDS
platform information structure configure DMC-Bing Server or
Client mode after zeroing out the memory
feat(morello): configure DMC-Bing mode
Based on the SCC configuration value obtained from the SDS
platform information structure configure DMC-Bing Server or
Client mode after zeroing out the memory.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: I0555fa06c9c1906264848f4e32ca413b4742cdee
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| #
2d39b397 |
| 26-Aug-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs
which require the entire DDR memory space to be zeroed
out before it can be accessed.
Change-Id: I
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs
which require the entire DDR memory space to be zeroed
out before it can be accessed.
Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| #
edbe490b |
| 11-Feb-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "morello: Modify morello_plat_info structure" into integration
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| #
42ea8d67 |
| 20-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
morello: Modify morello_plat_info structure
The structure has been modified to specify the memory
size in bytes instead of Gigabytes.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by
morello: Modify morello_plat_info structure
The structure has been modified to specify the memory
size in bytes instead of Gigabytes.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: I3384677d79af4f3cf55d3c353b6c20bb827b5ae7
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| #
609115a6 |
| 29-Sep-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration
* changes:
plat/arm: Add platform support for Morello
fdts: add device tree sources for morello platform
lib/cpus: add support for
Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration
* changes:
plat/arm: Add platform support for Morello
fdts: add device tree sources for morello platform
lib/cpus: add support for Morello Rainier CPUs
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| #
dfd5bfb0 |
| 22-Sep-2020 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm: Add platform support for Morello
This patch adds support for Morello platform.
It is an initial port which includes only BL31 support
as the System Control Processor (SCP) is expected to t
plat/arm: Add platform support for Morello
This patch adds support for Morello platform.
It is an initial port which includes only BL31 support
as the System Control Processor (SCP) is expected to take
the role of primary bootloader.
Change-Id: I1ecbe5a14a2d487b2ecea3c1ca227f08473ed2dd
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Anurag Koul <anurag.koul@arm.com>
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