feat(versal2): support alternate core as primary (non-cpu0)

Primary core was hardcoded to CPU0, causing a panic when another
core booted first.
Update logic to allow any booting core to become the p

feat(versal2): support alternate core as primary (non-cpu0)

Primary core was hardcoded to CPU0, causing a panic when another
core booted first.
Update logic to allow any booting core to become the primary and
gate secondary core startup inline to existing implementation for
secondary cores.

Change-Id: I6a5d76f23d4d4c4139d95bbaf55edf1244f2dbfe
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): align comment about invalid console selection

Error message should be aligned actual symbol used for console section
which has been changed by commit 2333ab4cd214 ("fix(versal2): renam

fix(versal2): align comment about invalid console selection

Error message should be aligned actual symbol used for console section
which has been changed by commit 2333ab4cd214 ("fix(versal2): rename
console build arg to generic").

Change-Id: I230892875a6343ca8ffc55e0fac251f6586cf3f4
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE acr

feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE across all AMD-Xilinx platforms.

Change-Id: I95465e29ac8a9370da135c2113203c3206ecfec0
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory m

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: I40281acf2dc48be43471b8642e2ab1a93b1cf8f6
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management

refactor(versal2): add tfa_no_pm flag for scmi

Added the TFA_NO_PM flag in the SCMI file and guarded SCMI
functionality with if conditions. When TFA_NO_PM is set to 0
(default), Platform Management is enabled. When set to 1, Platform
Management is disabled. This allows the generic SCMI driver to be
used in non-PM scenarios while maintaining compatibility with
conforming power management interfaces.

Change-Id: I4f6483e2c8a322ecb41e523bc03a351af4a2cb6b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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fix(versal2): align IOU_SCNTR base address macro name with other platforms

Renamed the IOU_SCNTR base address macro to match the naming
convention used in Versal and Versal NET. This ensures
consist

fix(versal2): align IOU_SCNTR base address macro name with other platforms

Renamed the IOU_SCNTR base address macro to match the naming
convention used in Versal and Versal NET. This ensures
consistency across platforms and enables the use of a common
function for getting and setting the system counter-timer
frequency.

Change-Id: I257a1086d77350858d63859b0fbe6e2b47deb9e5
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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feat(versal2): add bufferless IPI Support

Versal Gen 2 SOC has same IPI mapping as Versal NET SOC.

Ports the bufferless Versal NET IPI mapping to
Versal Gen 2.

Change-Id: I1dc11c8473c390a517fdd3a9

feat(versal2): add bufferless IPI Support

Versal Gen 2 SOC has same IPI mapping as Versal NET SOC.

Ports the bufferless Versal NET IPI mapping to
Versal Gen 2.

Change-Id: I1dc11c8473c390a517fdd3a9e4fc35dc5563792b
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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chore(versal2): use BIT_32() macro

Use BIT_32() macro for readability for Versal Gen 2 IPI Bit positions.

Change-Id: I69718b22de890519e906be185f593b4fd9df1be5
Signed-off-by: Ben Levinsky <ben.levin

chore(versal2): use BIT_32() macro

Use BIT_32() macro for readability for Versal Gen 2 IPI Bit positions.

Change-Id: I69718b22de890519e906be185f593b4fd9df1be5
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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feat(versal2): is OCM configured as coherent

Warn users about disabled OCM coherency which is not enabled by
default in designs. If it is not enabled and TF-A is running out
of OCM,TF-A won't work p

feat(versal2): is OCM configured as coherent

Warn users about disabled OCM coherency which is not enabled by
default in designs. If it is not enabled and TF-A is running out
of OCM,TF-A won't work properly.
This check is done only in Debug mode and isolation disabled.

Change-Id: I7661e0183503b71085c57fa35014341d14522203
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901

fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901234
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(versal2): add support for platform management

Add support for PM functionality through EEMI interface for
Versal Gen 2. Add support of PM APIs in PSCI ops. Add
TFA_NO_PM flag to disable PM func

feat(versal2): add support for platform management

Add support for PM functionality through EEMI interface for
Versal Gen 2. Add support of PM APIs in PSCI ops. Add
TFA_NO_PM flag to disable PM functionality. Enable wakeup for
new peripherals

Change-Id: I1bf67dc46af91ee113c627d32ae6ecc1dad386c2
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>

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feat(versal2): add dependency macro for PM

The pm_api_sys.c file has dependency on the PLAT_ARM_GICR_BASE macro.
Add the macro to fix compilation error when PM is enabled.

Change-Id: Ibd77dd38b4a2a

feat(versal2): add dependency macro for PM

The pm_api_sys.c file has dependency on the PLAT_ARM_GICR_BASE macro.
Add the macro to fix compilation error when PM is enabled.

Change-Id: Ibd77dd38b4a2a55614064c4ed0b1096acc658a5c
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>

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Merge "fix(versal2): update DDR address map" into integration

feat(versal2): update platform version to versal2

Extend board detection with saving information about PS,
PMC and RTL versions. Variables can be use to cover
different behavior based on version and

feat(versal2): update platform version to versal2

Extend board detection with saving information about PS,
PMC and RTL versions. Variables can be use to cover
different behavior based on version and version
information is also printed for chip identification.

Change-Id: Ia37418f6a31426a5763fb89fc76fef91d09df155
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(versal2): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store t

fix(versal2): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ib152831e84f5ead5b57fd713ebfedb1f3340a727
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): update DDR address map

Update DDR address map of BL32, BL33 and transfer list to support
AMD Versal Gen 2 platform's new memory map.

Change-Id: I757b2f67270034c8a3140e4bb0ac4d7e88b5d0

fix(versal2): update DDR address map

Update DDR address map of BL32, BL33 and transfer list to support
AMD Versal Gen 2 platform's new memory map.

Change-Id: I757b2f67270034c8a3140e4bb0ac4d7e88b5d055
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have th

fix(versal2): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: Ia352e3cf261b52777c1c431701e1e6c3be9cd279
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id:

fix(versal2): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id: I75c8e6a23ec192417f0e09c226f53c922a43f33c
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal2): update check for TRANSFER_LIST macro

Replace #if defined(TRANSFER_LIST) by #if TRANSFER_LIST.
By default TRANSFER_LIST macro is defined with value 0 in Makefile.
So checking if the mac

fix(versal2): update check for TRANSFER_LIST macro

Replace #if defined(TRANSFER_LIST) by #if TRANSFER_LIST.
By default TRANSFER_LIST macro is defined with value 0 in Makefile.
So checking if the macro is defined will always be true and instead
need to check the value of the macro to add the conditional code.

Change-Id: I90b06f378326d5e03ad576377ad173e81b100f56
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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