refactor(cpus): convert the Cortex-X1 to use cpu helpers

Change-Id: I0b62fa613eab4a7545408c0da0c05f88f5f28838
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): convert the Cortex-X1 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building

refactor(cpus): convert the Cortex-X1 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Change-Id: Ie3909ef51c28a24728752a08ddf96a48d87d3cd7
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(cpus): reorder Cortex-X1 errata by ascending order

Change-Id: I1e580dd330b545370b23d4b9704d899f6a679250
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): use cpu errata wrappers Cortex-A12 aarch32 cpu

Adapt to use errata frame-work cpu macro helpers for Cortex-A12
aarch32 cpu.

Testing:
- Manual comparison of disassembly with and with

refactor(cpus): use cpu errata wrappers Cortex-A12 aarch32 cpu

Adapt to use errata frame-work cpu macro helpers for Cortex-A12
aarch32 cpu.

Testing:
- Manual comparison of disassembly with and without the patch.
- Compile testing.

Change-Id: I9bad7f1e3d87419c0451b5d46edf0c406d31a84d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

Adapt to use errata frame-work cpu macro helpers for following cpu's:

- Cortex-A7
- Cortex-A9

Testing:
- Manual comparison of

refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

Adapt to use errata frame-work cpu macro helpers for following cpu's:

- Cortex-A7
- Cortex-A9

Testing:
- Manual comparison of disassembly with and without the patch.
- Compile testing.

Change-Id: I88eb90d7fd0e82fc4bfc9d1aee947f0c820e1222
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge changes from topic "jc/errata_refactor" into integration

* changes:
refactor(cpus): convert Cortex-A72 to use cpu helpers
refactor(cpus): convert the Cortex-A72 to use the errata framework

Merge changes from topic "jc/errata_refactor" into integration

* changes:
refactor(cpus): convert Cortex-A72 to use cpu helpers
refactor(cpus): convert the Cortex-A72 to use the errata framework
refactor(cpus): reorder Cortex-A72 errata by ascending order

show more ...

refactor(cpus): convert Cortex-A72 to use cpu helpers

Change-Id: Ic327389e610bff0f71939cb57d661ea84ddef3f6
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): convert the Cortex-A72 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cp

refactor(cpus): convert the Cortex-A72 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:
* Building for release with all errata flags enabled and running
script in change 19136 to compare output of objdump for each errata.

* Testing via script was not complete, as it directed to verify the
check and the workaround functions of few erratas manually.

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Manual comparison of disassembly of both both files(bl31.elf)
ensured,the ported changes were identical and hence verified.

* Build for release with all errata flags enabled and run default tftf
tests.

CROSS_COMPILE=aarch64-none-elf- \
make PLAT=fvp \
ARCH=aarch64 \
DEBUG=0 \
HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 \
CTX_INCLUDE_AARCH32_REGS=0 \
ERRATA_A72_859971=1 \
ERRATA_A72_1319367=1 \
WORKAROUND_CVE_2017_5715=1 \
WORKAROUND_CVE_2018_3639=1 \
WORKAROUND_CVE_2022_23960=1 \
BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
fip all -j12

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure that if Errata are applicable then the workaround
functions are entered precisely.

Change-Id: I8ee5288f395b0391a242506e7effdb65ab4c4de7
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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refactor(cpus): reorder Cortex-A72 errata by ascending order

Change-Id: I8fa7886a47b37d9e7bd580549971cd59ac3d5606
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus

Adapt to use errata frame-work cpu macro helpers for following cpus:

- cortex-a520
- cortex-a720
- cortex-x4
- cortex-chaberton

refactor(cpus): use cpu errata wrappers for aarch64 hunter based cpus

Adapt to use errata frame-work cpu macro helpers for following cpus:

- cortex-a520
- cortex-a720
- cortex-x4
- cortex-chaberton
- cortex-blackhawk

- Use sysreg_bit_set helper macro for enabling of any system register
bit field.
- Use errata_report_shim macro for reporting errata.
- Use cpu_reset_func_start/end helpers for adding cpu reset functions.

Testing:

- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with erratas and stepping through from ArmDS and running tftf.

Change-Id: I954fb603aa3746e02f2288656b98148d9cfd7843
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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fix(cpus): fix minor issue seen with a9 cpu

fix typo in a9_794073 report errata.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: Iace9f7fd18af529823488b6b6cb79e6bc13b9d4d

Merge "refactor(cpus): convert Cortex-A715 to the errata framework" into integration

Merge changes from topic "hm/errata-fw" into integration

* changes:
refactor(cpus): add Cortex-A17 errata framework information
fix(fvp): resolve broken workaround reference

Merge changes from topics "hm/errata-refactor", "jc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-x2 to use cpu helpers
refactor(cpus): convert the Cortex-x2 to

Merge changes from topics "hm/errata-refactor", "jc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-x2 to use cpu helpers
refactor(cpus): convert the Cortex-x2 to use the errata framework
refactor(cpus): reorder Cortex-x2 errata by ascending order
refactor(cpus): convert the Cortex-A65AE to use the errata framework
refactor(cpus): convert the Cortex-A510 to use cpu helpers
refactor(cpus): convert the Cortex-A510 to use the errata framework
refactor(cpus): reorder Cortex-A510 errata by ascending order
chore(fvp): add Aarch32 Cortex-A53 to the build
refactor(cpus): add Cortex-A53 errata framework information
feat(cpus): add errata framework helpers
chore(brcm): include cpu_helpers.S for bl2 build

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Merge changes from topic "lw/errata_refactor" into integration

* changes:
refactor(cpus): convert Neoverse-N1 to use helpers
refactor(cpus): convert Neoverse-N1 to framework
refactor(cpus): re

Merge changes from topic "lw/errata_refactor" into integration

* changes:
refactor(cpus): convert Neoverse-N1 to use helpers
refactor(cpus): convert Neoverse-N1 to framework
refactor(cpus): reorder Neoverse-N1 .S file
refactor(cpus): convert Neoverse-E1 to framework

show more ...

refactor(cpus): convert the Cortex-x2 to use cpu helpers

Change-Id: Ic1016eb8598dbba08cdfc3bdaa24f90411d83a7c
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): convert the Cortex-x2 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu

refactor(cpus): convert the Cortex-x2 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:
* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata.

* Testing via script was not complete, as it directed to verify the
check and the workaround functions of few erratas manually.

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Manual comparison of disassembly of both both files(bl31.elf)
ensured,the ported changes were identical and hence verified.

* Build for release with all errata flags enabled and run default tftf
tests.

CROSS_COMPILE=aarch64-none-elf- \
make PLAT=fvp \
ARCH=aarch64 \
DEBUG=0 \
HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 \
CTX_INCLUDE_AARCH32_REGS=0 \
ERRATA_X2_2002765=1 \
ERRATA_X2_2017096=1 \
ERRATA_X2_2058056=1 \
ERRATA_X2_2081180=1 \
ERRATA_X2_2083908=1 \
ERRATA_X2_2147715=1 \
ERRATA_X2_2216384=1 \
ERRATA_X2_2282622=1 \
ERRATA_X2_2371105=1 \
ERRATA_X2_2768515=1 \
WORKAROUND_CVE_2022_23960=1 \
ERRATA_DSU_2313941=1 \
BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
fip all -j12

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure that if Errata are applicable then the workaround
functions are entered precisely.

Change-Id: Icd2268cdf27f41240c92e3df23b5ad22f3ce3124
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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refactor(cpus): reorder Cortex-x2 errata by ascending order

Change-Id: Ic1b2c73f468db6bb434b5b23f345bfc37d2a7833
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): convert the Cortex-A65AE to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <

refactor(cpus): convert the Cortex-A65AE to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive
* This core has only errata related to DSU, which is defined under
another file dsu_helpers.s but gets applied to A65AE as well.
Hence symbolic names have been added to get them registered under
errata framework.

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:
* Building for release with all errata flags enabled and running
script in change 19136 to compare output of objdump for each errata.

* Testing via script was not complete, as it directed to verify the
check and the workaround functions of few erratas manually.

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Manual comparison of disassembly of both both files(bl31.elf)
ensured, the ported changes were identical and hence verified.

* Build for release with all errata flags enabled and run default
tftf tests.

CROSS_COMPILE=aarch64-none-elf- \
make PLAT=fvp \
ARCH=aarch64 \
DEBUG=0 \
HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 \
CTX_INCLUDE_AARCH32_REGS=0 \
ERRATA_DSU_936184=1 \
BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
fip all -j12

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure that if Errata are applicable then the workaround
functions are entered precisely. In this case, errata is not
applied as DSU does not has the ACP interface and hence the
check_errata_dsu_936184 returns 0.

* In summary, porting work for this CPU, does not adds any new changes
as we are just creating macros via .equ, henceforth code remains
identical.

Change-Id: Iab37295319b5ccd69428185b2d22af0ca9c07a5e
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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refactor(cpus): convert the Cortex-A510 to use cpu helpers

Change-Id: I6d26092525c2d5255a741515071ee7ed873aa52d
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): convert the Cortex-A510 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <c

refactor(cpus): convert the Cortex-A510 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Note: cortex_a510.S is applicable and being used only by arm_fpga platform.

However, to test the ported changes, below steps were carried out on the
fvp and the obtained results has been verified.

Testing was conducted by:
* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata.

* Testing via script was not complete, as it directed to verify the
check and the workaround functions of few erratas manually.

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Manual comparison of disassembly of both both files(bl31.elf)
ensured, the ported changes were identical and hence verified.

* Build for release with all errata flags enabled and run default
tftf tests.

CROSS_COMPILE=aarch64-none-elf- \
make PLAT=fvp \
ARCH=aarch64 \
DEBUG=0 \
HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 \
CTX_INCLUDE_AARCH32_REGS=0 \
ERRATA_A510_1922240=1 \
ERRATA_A510_2288014=1 \
ERRATA_A510_2042739=1 \
ERRATA_A510_2041909=1 \
ERRATA_A510_2250311=1 \
ERRATA_A510_2218950=1 \
ERRATA_A510_2172148=1 \
ERRATA_A510_2347730=1 \
ERRATA_A510_2371937=1 \
ERRATA_A510_2666669=1 \
ERRATA_A510_2684597=1 \
ERRATA_DSU_2313941=1 \
BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \
fip all -j12

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure that if Errata are applicable then the
workaround functions are entered precisely.

Change-Id: Icf7aa25c0b3b30f5e2ad6db83953f7f4f0b201d9
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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refactor(cpus): reorder Cortex-A510 errata by ascending order

Change-Id: Id6b4ae42d413f2c501c8200305cdb8068219912b
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): add Cortex-A53 errata framework information

Change-Id: I3518847728fa17baa423cfef66694895a39ee888
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cpus): convert Neoverse-N1 to use helpers

Conversion to use CPU helpers for Neoverse-N1 testing done with
framework adaptation patch.

Change-Id: I2103f6e64daf0ee4c7b756083e5bf485f15c0e21
S

refactor(cpus): convert Neoverse-N1 to use helpers

Conversion to use CPU helpers for Neoverse-N1 testing done with
framework adaptation patch.

Change-Id: I2103f6e64daf0ee4c7b756083e5bf485f15c0e21
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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refactor(cpus): convert Neoverse-N1 to framework

For N1, this involves replacing:
- The reset_func with the standard cpu_reset_func_{start,end}
to apply errata automatically
- The <cpu>_erra

refactor(cpus): convert Neoverse-N1 to framework

For N1, this involves replacing:
- The reset_func with the standard cpu_reset_func_{start,end}
to apply errata automatically
- The <cpu>_errata_report with the errata_report_shim to
report errata automatically
And for each erratum:
- The prologue with the workaround_<type>_start to do the checks and
framework registration automatically at reset or runtime
- The epilogue with the workaround_<type>_end
- The checker function with the check_erratum_<type> to check whether
the erratum applies on the revision of the CPU.

Testing was conducted by:
- Manual comparison of disassembly of converted functions with non-
converted functions:

aarch64-none-elf-objdump -D
<trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D
<trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

- Build for debug with all errata enabled and step through ArmDS
to ensure all functions are entered and the path remains the same
as before conversion to the new framework.

Change-Id: I2ea612d4c197dd73835fadda81f59732c19534f8
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...