| 7e080842 | 31-May-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
drivers: add designware ufs driver
Initialized the designware UFS PHY.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| eb5073f4 | 31-May-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
drivers: add ufs stack
If UFS device is initialized, we could just make it out of hibernation by UFS_FLAGS_SKIPINIT. And vendor's dirver is always focus on PHY setting. We could use UFS driver direc
drivers: add ufs stack
If UFS device is initialized, we could just make it out of hibernation by UFS_FLAGS_SKIPINIT. And vendor's dirver is always focus on PHY setting. We could use UFS driver directly if it exits from hibernation.
There're eight LUNs in UFS device. The UFS driver only provides the read/write API with LUN. User could define his own read/write since user may want to access different LUNs.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 572e1413 | 30-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memory
Reduce code size when building with Trusted Board Boot enabled |
| cfac68af | 24-May-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
Cortex-A53: add some bit definitions
Add some bit definitions of CPUACTLR register in Cortex-A53 CPU library.
Change-Id: I142fd8ac4b06dd651a32e22951e71cdebbea123a Signed-off-by: Haojian Zhuang <hao
Cortex-A53: add some bit definitions
Add some bit definitions of CPUACTLR register in Cortex-A53 CPU library.
Change-Id: I142fd8ac4b06dd651a32e22951e71cdebbea123a Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Dan Handley <dan.handley@arm.com>
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| d5461857 | 02-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
build: Introduce clang support
Only the compiler is switched to clang. The assembler and linker are provided by the GCC toolchain.
clang is used to build TF when the base name of the path assigned
build: Introduce clang support
Only the compiler is switched to clang. The assembler and linker are provided by the GCC toolchain.
clang is used to build TF when the base name of the path assigned to `CC` contains the string 'clang'.
`CROSS_COMPILE` is still needed and should point to the appropriate GCC toolchain.
Tested with clang 3.9.x and 4.0.x.
Change-Id: I53236d64e3c83ad27fc843bae5fcdae30f2e325e Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| e715e676 | 24-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #938 from masahir0y/tools_share
Collect headers shared between TF and host-tools into include/tools_share |
| ab1794f5 | 19-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
mbedtls: Use `tf_snprintf` instead of `snprintf`
The Trusted Firmware uses a subset of the APIs provided by mbed TLS. This subset internally uses `snprintf`, but the only format specifier used is '%
mbedtls: Use `tf_snprintf` instead of `snprintf`
The Trusted Firmware uses a subset of the APIs provided by mbed TLS. This subset internally uses `snprintf`, but the only format specifier used is '%d', which is supported by `tf_snprintf`.
This patch makes mbed TLS use `tf_snprintf` instead of `snprintf`, saving 3 KB in both debug and release builds when TBBR is enabled.
Change-Id: I7f992a21015930d7c0f4660e7a28ceefd60b9597 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| da5241cb | 17-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Introduce `tf_snprintf`
This is a reduced version of `snprintf` that only supports formats '%d', '%i' and '%u'. It can be used when the full `snprintf` is not needed in order to save memory. If it f
Introduce `tf_snprintf`
This is a reduced version of `snprintf` that only supports formats '%d', '%i' and '%u'. It can be used when the full `snprintf` is not needed in order to save memory. If it finds an unknown format specifier, it prints an error message and panics.
Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| bb41eb7a | 22-May-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cert: move platform_oid.h to include/tools_share for all platforms
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide a
cert: move platform_oid.h to include/tools_share for all platforms
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically).
For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files.
The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h
Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility.
For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 2a6c1a8f | 08-May-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fip: move headers shared between TF and fiptool to include/tools_share
Some header files need to be shared between TF and host programs. For fiptool, two headers are copied to the tools/fiptool dire
fip: move headers shared between TF and fiptool to include/tools_share
Some header files need to be shared between TF and host programs. For fiptool, two headers are copied to the tools/fiptool directory, but it looks clumsy.
This commit introduces a new directory, include/tools_share, which collects headers that should be shared between TF and host programs.
This will clarify the interface exposed to host tools. We should add new headers to this directory only when we really need to do so.
For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 81602a97 | 22-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #939 from dp-arm/dp/AArch32_tbbr
Add TBBR and FWU support for AArch32 |
| 727a68b8 | 19-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #936 from antonio-nino-diaz-arm/an/assert-mem
Simplify assert() to reduce memory usage |
| f0019fcc | 16-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #935 from davidcunado-arm/dc/mbed_api
mbedtls: Namespace update for TF specific macros |
| 0da2fe7e | 16-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Simplify assert() to reduce memory usage
The behaviour of assert() now depends on the value of the new optional platform define `PLAT_LOG_LEVEL_ASSERT`. This defaults to `LOG_LEVEL` if not defined b
Simplify assert() to reduce memory usage
The behaviour of assert() now depends on the value of the new optional platform define `PLAT_LOG_LEVEL_ASSERT`. This defaults to `LOG_LEVEL` if not defined by the platform.
- If `PLAT_LOG_LEVEL_ASSERT` >= `LOG_LEVEL_VERBOSE`, it prints the file name, line and asserted expression. - If `PLAT_LOG_LEVEL_ASSERT` >= `LOG_LEVEL_INFO`, it prints the file name and line. - If not, it doesn't print anything.
Note the old behaviour was to print the function name whereas now it prints the file name. This reduces memory usage because the file name is shared between all assert calls in a given file. Also, the default behaviour in debug builds is to no longer print the asserted expression, greatly reducing the string usage.
For FVP debug builds this change saves approximately:
No TBBR TBBR BL1 1.6 KB 2.2 KB BL2 1.7 KB 2.1 KB BL31 2.6 KB 3.3 KB
Change-Id: I2947569d593df0b25611dc3c7a6096f42155c115 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 1bd61d0a | 22-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I1ca8078214eaf86b46463edd14740120af930aec Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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| a4409008 | 15-Feb-2017 |
dp-arm <dimitris.papastamos@arm.com> |
AArch32: Add `TRUSTED_BOARD_BOOT` support
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode.
To build this patch the "mbedtls/include/mbedtls/bignum.h" needs to be modified to remove `#
AArch32: Add `TRUSTED_BOARD_BOOT` support
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode.
To build this patch the "mbedtls/include/mbedtls/bignum.h" needs to be modified to remove `#define MBEDTLS_HAVE_UDBL` when `MBEDTLS_HAVE_INT32` is defined. This is a workaround for "https://github.com/ARMmbed/mbedtls/issues/708"
NOTE: TBBR support on Juno AArch32 is not currently supported.
Change-Id: I86d80e30b9139adc4d9663f112801ece42deafcf Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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| 823cc7a9 | 12-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #930 from antonio-nino-diaz-arm/an/fixes-xlat-v2
Minor fixes to the xlat tables lib v2 |
| b1883510 | 10-May-2017 |
David Cunado <david.cunado@arm.com> |
mbedtls: Namespace for TF specific macros
An earlier patch (arm-trusted-firmware#874) migrated MBEDTLS_ suffixed macros to have a TBBR_ suffix to avoid any potential clash with future mbedtls macros
mbedtls: Namespace for TF specific macros
An earlier patch (arm-trusted-firmware#874) migrated MBEDTLS_ suffixed macros to have a TBBR_ suffix to avoid any potential clash with future mbedtls macros.
But on reflection the TBBR_ suffix could be confusing as the macros are used to drive TF-specific configuration of mbedtls. As such this patch migrates these macros from TBBR_suffix to TF_MBEDTLS_ suffix which more accurately conveys their use.
Change-Id: Ic87642b653ceeaa03d62f724976abd5e12e867d4 Signed-off-by: David Cunado <david.cunado@arm.com>
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| b6285d64 | 30-Mar-2017 |
Soby Mathew <soby.mathew@arm.com> |
AArch32: Rework SMC context save and restore mechanism
The current SMC context data structure `smc_ctx_t` and related helpers are optimized for case when SMC call does not result in world switch. Th
AArch32: Rework SMC context save and restore mechanism
The current SMC context data structure `smc_ctx_t` and related helpers are optimized for case when SMC call does not result in world switch. This was the case for SP_MIN and BL1 cold boot flow. But the firmware update usecase requires world switch as a result of SMC and the current SMC context helpers were not helping very much in this regard. Therefore this patch does the following changes to improve this:
1. Add monitor stack pointer, `spmon` to `smc_ctx_t`
The C Runtime stack pointer in monitor mode, `sp_mon` is added to the SMC context, and the `smc_ctx_t` pointer is cached in `sp_mon` prior to exit from Monitor mode. This makes is easier to retrieve the context when the next SMC call happens. As a result of this change, the SMC context helpers no longer depend on the stack to save and restore the register.
This aligns it with the context save and restore mechanism in AArch64.
2. Add SCR in `smc_ctx_t`
Adding the SCR register to `smc_ctx_t` makes it easier to manage this register state when switching between non secure and secure world as a result of an SMC call.
Change-Id: I5e12a7056107c1701b457b8f7363fdbf892230bf Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| d6104f5a | 11-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #927 from jeenu-arm/state-switch
Execution state switch |
| e769db3e | 08-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Minor fixes to the xlat tables lib v2
- Fix some comments. - Remove duplicated definition. - Make xlat_arch_get_max_supported_pa() private in aarch64.
Change-Id: I629237209cfb2ce7b0c4bd539d63dd81d4
Minor fixes to the xlat tables lib v2
- Fix some comments. - Remove duplicated definition. - Make xlat_arch_get_max_supported_pa() private in aarch64.
Change-Id: I629237209cfb2ce7b0c4bd539d63dd81d45b2edd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 07f40001 | 08-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #922 from davidcunado-arm/dc/smc_yielding_spds
Migrate secure payload dispatchers to new SMC terminology |
| 5e623277 | 05-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #924 from antonio-nino-diaz-arm/an/fix-xn-bit
Fix execute-never permissions in xlat tables libs |
| bbbbcdae | 16-Apr-2017 |
David Cunado <david.cunado@arm.com> |
Migrate secure payload dispatchers to new SMC terminology
Since Issue B (November 2016) of the SMC Calling Convention document standard SMC calls are renamed to yielding SMC calls to help avoid conf
Migrate secure payload dispatchers to new SMC terminology
Since Issue B (November 2016) of the SMC Calling Convention document standard SMC calls are renamed to yielding SMC calls to help avoid confusion with the standard service SMC range, which remains unchanged.
http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pd
A previous patch introduced a new define for yielding SMC call type. This patch updates the secure payload dispatchers (except the TSPD) to use this new define and also migrates the code to use the new terminology.
Change-Id: I3d2437c04e3b21fdbd32019f55c066c87679a5bf Signed-off-by: David Cunado <david.cunado@arm.com>
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| f132b4a0 | 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers |