| #
72e8f245 |
| 08-Aug-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "chore: update to use Arm word across TF-A" into integration
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| #
4c700c15 |
| 01-Aug-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
chore: update to use Arm word across TF-A
Align entire TF-A to use Arm in copyright header.
Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244
Signed-off-by: Govindraj Raja <govindraj.raja@arm.co
chore: update to use Arm word across TF-A
Align entire TF-A to use Arm in copyright header.
Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| #
3e310f30 |
| 12-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1812 from antonio-nino-diaz-arm/an/fix-cortex
Fix CPU headers' definitions
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| #
1a74e4a8 |
| 11-Feb-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
cpus: Add casts to all definitions in CPU headers
There are some incorrect casts and some missing casts in the headers.
This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
adds cas
cpus: Add casts to all definitions in CPU headers
There are some incorrect casts and some missing casts in the headers.
This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
adds casts where they were missing.
Note that none of the changes of the patch actually changes the values
of the definitions. This patch is just for correctness.
Change-Id: Iad6458021bad521922ce4f91bafff38b116b49eb
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
a69817ed |
| 11-Feb-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
cpus: Fix some incorrect definitions in CPU headers
There are some values that should be 64-bit immediates but that resolve
to 0 because the type of the value is 32-bit wide. This patch casts the
ex
cpus: Fix some incorrect definitions in CPU headers
There are some values that should be 64-bit immediates but that resolve
to 0 because the type of the value is 32-bit wide. This patch casts the
expressions to 64-bit before the shift so that the definition has the
correct value.
The definitions are only used in assembly so far, so the code is not
actually affected by this bug. The assembler treats all values as 64-bit
values, so there are no overflows.
Change-Id: I965e4be631c1d28787c0913661d224c82a6b9155
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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| #
c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
3ccfcd6e |
| 02-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated
Remove deprecated interfaces for all platforms
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| #
fe199e3b |
| 25-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove all other deprecated interfaces and files
Change-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
1b05282a |
| 30-Aug-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1062 from jeenu-arm/cpu-fixes
Cpu macro fixes
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| #
80bcf981 |
| 09-Aug-2017 |
Eleanor Bonnici <Eleanor.bonnici@arm.com> |
CPU: Correct names of implementation-defined aux regs
At present, various CPU register macros that refer to CPUACTLR are named
ACTLR. This patch fixes that.
The previous register names are retained
CPU: Correct names of implementation-defined aux regs
At present, various CPU register macros that refer to CPUACTLR are named
ACTLR. This patch fixes that.
The previous register names are retained, but guarded by the
ERROR_DEPRECATED macro, so as not to break platforms that continue using
the old names.
Change-Id: Ia872196d81803f8f390b887d149e0fd054df519b
Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>
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| #
e036660a |
| 20-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #983 from dp-arm/dp/aarch32-errata
aarch32: Implement errata workarounds for Cortex A53 and A57
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| #
3749d853 |
| 05-Jun-2017 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
aarch32: Implement errata workarounds for Cortex A53
This brings the implementation on par with the software
errata workarounds for AArch64.
Change-Id: Id103602e35b1c0ad3705a5b2b7cdb34dd8a8c5e2
Sig
aarch32: Implement errata workarounds for Cortex A53
This brings the implementation on par with the software
errata workarounds for AArch64.
Change-Id: Id103602e35b1c0ad3705a5b2b7cdb34dd8a8c5e2
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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| #
6de8b24f |
| 16-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #953 from vwadekar/tegra-misra-fixes-v1
Tegra misra fixes v1
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| #
fb7d32e5 |
| 05-Jun-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Unique names for defines in the CPU libraries
This patch makes all the defines in the CPU libraries unique,
by prefixing them with the CPU name.
NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDA
Unique names for defines in the CPU libraries
This patch makes all the defines in the CPU libraries unique,
by prefixing them with the CPU name.
NOTE: PLATFORMS USING THESE MACROS WILL HAVE TO UPDATE THEIR CODE
TO START USING THE UPDATED NAMES
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| #
f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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| #
82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| #
0f22bef3 |
| 29-Apr-2017 |
Scott Branden <sbranden@users.noreply.github.com> |
Merge branch 'integration' into tf_issue_461
|
| #
484acce3 |
| 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
Add AArch32 support for Juno
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| #
dc787588 |
| 10-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
This patch adds AArch32 state support for ARM Cortex-A53,
Cortex-A57 and Cortex-A72 MPCore Processor in the CPU specific
operations fra
AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor
This patch adds AArch32 state support for ARM Cortex-A53,
Cortex-A57 and Cortex-A72 MPCore Processor in the CPU specific
operations framework.
NOTE: CPU errata handling code is not present in this patch.
Change-Id: I01eb3e028e40dde37565707ebc99e06e7a0c113d
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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