| 5f324444 | 18-Nov-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(measured-boot): accept metadata as a function's argument
Updated the event log driver's function to accept metadata as an
argument, to remove the platform function usage from the event log
refactor(measured-boot): accept metadata as a function's argument
Updated the event log driver's function to accept metadata as an
argument, to remove the platform function usage from the event log
driver to make it a standalone driver.
Change-Id: I512cf693d51dc3c0b9d2c1bfde4f89414e273049
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 981b9dcb | 14-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.
Change-Id: I04452453ed84567b0de39e900594a81526562
refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
The code managing legacy boot (without FIP) that was under
STM32MP_USE_STM32IMAGE flag is remove.
Change-Id: I04452453ed84567b0de39e900594a81526562259
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| af8dee20 | 18-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(st-crypto): add STM32 RNG driver
This driver manages the STM32 Random Number Generator
peripheral.
Change-Id: I4403ebb2dbdaa8df993a4413f1ef48eeba00427c
Signed-off-by: Yann Gautier <yann.gautie
feat(st-crypto): add STM32 RNG driver
This driver manages the STM32 Random Number Generator
peripheral.
Change-Id: I4403ebb2dbdaa8df993a4413f1ef48eeba00427c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
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| 4bb4e836 | 18-Sep-2020 |
Nicolas Toromanoff <nicolas.toromanoff@st.com> |
feat(st-crypto): add AES decrypt/auth by SAES IP
Add code to be able to use STMicroelectronics SAES IP. This driver
can manage many AES algorithms (CBC, ECB, CCM, GCM). It will be used
by the authen
feat(st-crypto): add AES decrypt/auth by SAES IP
Add code to be able to use STMicroelectronics SAES IP. This driver
can manage many AES algorithms (CBC, ECB, CCM, GCM). It will be used
by the authenticated decryption framework (AES-GCM only).
Change-Id: Ibd4030719fb12877dcecd5d2c395d13b4b15c260
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
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| b0fbc02a | 30-Sep-2020 |
Nicolas Toromanoff <nicolas.toromanoff@st.com> |
feat(st-crypto): add ECDSA signature check with PKA
Add code to be able to use STMicroelectronics PKA peripheral
in the authentication framework.
Change-Id: Ifeafe84c68db483cd18674f2280576cc065f92e
feat(st-crypto): add ECDSA signature check with PKA
Add code to be able to use STMicroelectronics PKA peripheral
in the authentication framework.
Change-Id: Ifeafe84c68db483cd18674f2280576cc065f92ee
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
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| 68039f2d | 22-Dec-2020 |
Nicolas Toromanoff <nicolas.toromanoff@st.com> |
feat(st-crypto): update HASH for new hardware version used in STM32MP13
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_
feat(st-crypto): update HASH for new hardware version used in STM32MP13
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.
For STM32_HASH_V2: no change.
Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
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| 4e7983b7 | 20-Oct-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(ethos-n)!: add support for SMMU streams" into integration |
| c45d2feb | 12-Oct-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(ufs): retry commands on unit attention" into integration |
| b9b17508 | 15-Jun-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(measured-boot): split out a few Event Log driver functions
Reorganized a few Event Log functions into multiple functions so that
they can be used for the upcoming DRTM feature. This change
refactor(measured-boot): split out a few Event Log driver functions
Reorganized a few Event Log functions into multiple functions so that
they can be used for the upcoming DRTM feature. This change mainly
implements below new functions -
1. event_log_buf_init - called by 'event_log_init' to initialise Event
Log buffer
2. event_log_write_specid_event - called by 'event_log_fixed_header' to
write specification id event to Event Log buffer
3. event_log_measure and event_log_record - called by
'event_log_measure_and_record' to measure and record the measurement
to the Event Log buffer
Change-Id: I1aabb57f79bead726fcf36d59839702cd6a3521d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| ff1e42e2 | 03-Mar-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
feat(drtm): add PCR entries for DRTM
Added PCR entries for the measurement performed by the
DCE and D-CRTM in DRTM implementation
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-I
feat(drtm): add PCR entries for DRTM
Added PCR entries for the measurement performed by the
DCE and D-CRTM in DRTM implementation
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: Ib9bfafe7fa2efa1cc36d7ff138468d648235dcf1
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| 2bf4f27f | 20-Jun-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(crypto): change CRYPTO_SUPPORT flag to numeric
Updated CRYPTO_SUPPORT flag to numeric to provide below
supports -
1. CRYPTO_SUPPORT = 1 -> Authentication verification only
2. CRYPTO_SUPPORT
refactor(crypto): change CRYPTO_SUPPORT flag to numeric
Updated CRYPTO_SUPPORT flag to numeric to provide below
supports -
1. CRYPTO_SUPPORT = 1 -> Authentication verification only
2. CRYPTO_SUPPORT = 2 -> Hash calculation only
3. CRYPTO_SUPPORT = 3 -> Authentication verification and
hash calculation
Change-Id: Ib34f31457a6c87d2356d736ad2d048dc787da56f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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|
| e43caf38 | 25-Feb-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
feat(crypto): update crypto module for DRTM support
Updated crypto module to include crypto calls necessary for a
DRTM supported build.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Ch
feat(crypto): update crypto module for DRTM support
Updated crypto module to include crypto calls necessary for a
DRTM supported build.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I4f945997824393f46864b7fb7fd380308a025452
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|
| b139f1cf | 15-Aug-2022 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n)!: add support for SMMU streams
The Arm(R) Ethos(TM)-N NPU driver now supports configuring the SMMU
streams that the NPU shall use and will therefore no longer delegate
access to these
feat(ethos-n)!: add support for SMMU streams
The Arm(R) Ethos(TM)-N NPU driver now supports configuring the SMMU
streams that the NPU shall use and will therefore no longer delegate
access to these registers to the non-secure world. In order for the
driver to support this, the device tree parsing has been updated to
support parsing the allocators used by the NPU and what SMMU stream that
is associated with each allocator.
To keep track of what NPU device each allocator is associated with, the
resulting config from the device tree parsing will now group the NPU
cores and allocators into their respective NPU device.
The SMC API has been changed to allow the caller to specify what
allocator the NPU shall be configured to use and the API version has
been bumped to indicate this change.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I6ac43819133138614e3f55a014e93466fe3d5277
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|
| e8f4ec1a | 03-Oct-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_uart_updates" into integration
* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFI
Merge changes from topic "st_uart_updates" into integration
* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
feat(st): add trace for early console
fix(stm32mp1): enable crash console in FIQ handler
feat(st-uart): add initialization with the device tree
refactor(stm32mp1): move DT_UART_COMPAT in include file
feat(stm32mp1): configure the serial boot load address
fix(stm32mp1): update the FIP load address for serial boot
refactor(st): configure baudrate for UART programmer
refactor(st-uart): compute the over sampling dynamically
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| 3d309556 | 28-Sep-2022 |
Anand Saminathan <anans@google.com> |
fix(ufs): retry commands on unit attention
Unit Attention Condition (UAC) gets set on a warm reset. Sending any
command (other than INQUIRY and REPORT LUNs) clears UAC, so its good to
add some retri
fix(ufs): retry commands on unit attention
Unit Attention Condition (UAC) gets set on a warm reset. Sending any
command (other than INQUIRY and REPORT LUNs) clears UAC, so its good to
add some retries when UAC is encountered
Signed-off-by: Anand Saminathan <anans@google.com>
Change-Id: Ia03b916d68565d0f3d25086b7f6d8c51d557b64f
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|
| 31259019 | 15-Jun-2022 |
Raef Coles <raef.coles@arm.com> |
feat(rss): add new comms protocols
The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and
feat(rss): add new comms protocols
The current comms protocol (where arguments and return data is embedded
into the MHU message) is now protocol v0. Protocol v1 embeds pointers
into the message, and has the RSS retrieve the data via DMA.
Change-Id: I08d7f09c4eaea673769fde9eee194447a99f1b78
Signed-off-by: Raef Coles <raef.coles@arm.com>
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|
| 12581895 | 02-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(st-uart): compute the over sampling dynamically
The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and t
refactor(st-uart): compute the over sampling dynamically
The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and the requested baudrate.
Oversampling by 8 is allowed only for higher speed
(up to clock_rate / 8) to reduce the maximum receiver tolerance
to clock deviation.
This patch update the driver, the serial init struct and the
only user, the stm32cubeprogrammer over uart support.
Change-Id: I422731089730a288defeb7fa49886db65d0902b2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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|
| b86cbe10 | 16-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "provencore-spd" into integration
* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL
Merge changes from topic "provencore-spd" into integration
* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL1 SGIs
show more ...
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| e689048e | 01-Aug-2022 |
Pranav Madhu <pranav.madhu@arm.com> |
fix(gicv3): update the affinity mask to 8 bit
The GIC ICC_SGI0R_EL1 register's affinity fields are 8bit wide for GIC
v3 and v4. Fix the SGIR_AFF_MASK variable accordingly.
Change-Id: I09f3fdd006708
fix(gicv3): update the affinity mask to 8 bit
The GIC ICC_SGI0R_EL1 register's affinity fields are 8bit wide for GIC
v3 and v4. Fix the SGIR_AFF_MASK variable accordingly.
Change-Id: I09f3fdd006708b40162776620f82abcfc6c3f782
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
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| dcb31ff7 | 08-Sep-2021 |
Florian Lugou <florian.lugou@provenrun.com> |
feat(gic): add APIs to raise NS and S-EL1 SGIs
This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI
Signed-off-by: Florian
feat(gic): add APIs to raise NS and S-EL1 SGIs
This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI
Signed-off-by: Florian Lugou <florian.lugou@provenrun.com>
Change-Id: I6f262dd1da1d77fec3f850eb74189e726b8e24da
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| f462c124 | 01-Sep-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(mmc): get boot partition size
The boot partition size of an eMMC is given in ext_csd register, at
offset 226 (BOOT_SIZE_MULT), which has to be multiplied by 128kB.
Add a helper function mmc_boo
feat(mmc): get boot partition size
The boot partition size of an eMMC is given in ext_csd register, at
offset 226 (BOOT_SIZE_MULT), which has to be multiplied by 128kB.
Add a helper function mmc_boot_part_size() to get this eMMC boot
partition size.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0e8e0fc9632f147fa1b1b3374accb78439025403
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| f29c0702 | 13-Apr-2021 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(mtd): add platform function to allow using external buffer
The scratch buffer could be large. The new function allows
platform to defined its own external buffer or use the default
one.
Signed
feat(mtd): add platform function to allow using external buffer
The scratch buffer could be large. The new function allows
platform to defined its own external buffer or use the default
one.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ib7ab8ff19fa0a9cb06e364f058b91af58c3c471a
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| e5b267bb | 12-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(mmc): manage SD Switch Function for high speed mode
On SD-cards, Switch Function Command (CMD6) is used to switch
functions, like setting High Speed mode. It is useful for high capacity
cards t
feat(mmc): manage SD Switch Function for high speed mode
On SD-cards, Switch Function Command (CMD6) is used to switch
functions, like setting High Speed mode. It is useful for high capacity
cards to double frequency (from 25MHz by default to 50MHz).
If the SD-card is High Capacity, a CMD6 is issued after filling the
device information. If High Speed mode is supported and the switch is
OK, then the max_bus_freq can be set to 50MHz. The driver set_ios()
function should then be called to update peripheral configuration,
especially clock prescaler.
Change-Id: I2d6807aa7f9440d2b2f907a747cd3b47a2ba1545
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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|
| c1522768 | 01-Aug-2022 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "st_fip_uuid" into integration
* changes:
feat(stm32mp1): retrieve FIP partition by type UUID
feat(guid-partition): allow to find partition by type UUID
refactor(stm32
Merge changes from topic "st_fip_uuid" into integration
* changes:
feat(stm32mp1): retrieve FIP partition by type UUID
feat(guid-partition): allow to find partition by type UUID
refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES
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| 28645ebd | 02-Jul-2022 |
Rohit Ner <rohitner@google.com> |
fix(ufs): add retries to ufs_read_capacity
This change replaces the polling loop with fixed number of retries,
returns error values and handles them in ufs_enum.
Signed-off-by: Rohit Ner <rohitner@
fix(ufs): add retries to ufs_read_capacity
This change replaces the polling loop with fixed number of retries,
returns error values and handles them in ufs_enum.
Signed-off-by: Rohit Ner <rohitner@google.com>
Change-Id: Ia769ef26703c7525091e55ff46aaae4637db933c
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