refactor(nxp-mmc): check multi block transfer

Extract the multiblock check into a dedicated function. This function
returns true for multiblock reads and writes.

Change-Id: I6c4ea62977781a4f43d6a20

refactor(nxp-mmc): check multi block transfer

Extract the multiblock check into a dedicated function. This function
returns true for multiblock reads and writes.

Change-Id: I6c4ea62977781a4f43d6a20513147b99b3baa1b2
Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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refactor(nxp-mmc): set MIXCTRL_DTDSEL

According to the reference manual, the MIX_CTRL.DTDSEL should be set for
commands involving a transfer from the card to the host. Therefore, it
should be disabl

refactor(nxp-mmc): set MIXCTRL_DTDSEL

According to the reference manual, the MIX_CTRL.DTDSEL should be set for
commands involving a transfer from the card to the host. Therefore, it
should be disabled for write commands, specifically for single and
multi-block writes.

Change-Id: I97a08291c6ee134e1d5c7e072a06e1b060d5da14
Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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refactor(nxp-mmc): populate command transfer type

The CMD_XFR_TYP register description in the reference manual includes a
table where the response type, index check, and CRC check are populated
base

refactor(nxp-mmc): populate command transfer type

The CMD_XFR_TYP register description in the reference manual includes a
table where the response type, index check, and CRC check are populated
based on the CMD's response type. Therefore, replace the CMD_XFR_TYP set
based on the command ID with the mechanism mentioned in the reference
manual.

Change-Id: Ibe6e04d1682e258ae2377dd7a1d0abb6c7b3f164
Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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fix(nxp-mmc): fix clk_rate and bus_width type

Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params'
are defined as integers, while their usages are unsigned int.
Therefore, change t

fix(nxp-mmc): fix clk_rate and bus_width type

Both 'clk_rate' and bus_width members of the 'struct imx_usdhc_params'
are defined as integers, while their usages are unsigned int.
Therefore, change the type to unsigned int. This also helps to avoid
MISRA C-2012 Rule 10.3 violations when unsigned values are assigned to
signed variables.

Change-Id: If52e15a164732b68286f5303c4acbeb4ff993081
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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fix(nxp-mmc): correct the usage of BIT and GENMASK

The uSDHC register definitions use BIT and GENMASK macros, which are
implicitly expanded to their 64-bit versions. This is incorrect from a
hardwar

fix(nxp-mmc): correct the usage of BIT and GENMASK

The uSDHC register definitions use BIT and GENMASK macros, which are
implicitly expanded to their 64-bit versions. This is incorrect from a
hardware perspective, as the registers are 32-bit wide. Therefore,
BIT_32 and GENMASK_32 macros are used instead. Similarly, the register
offset must use an unsigned int offset instead of signed numbers.

Change-Id: I3a3379ba9fa538226f958b68aac702752ea9a62a
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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Merge changes from topic "psa_key_id_mgmt" into integration

* changes:
feat(auth): extend REGISTER_CRYPTO_LIB calls
feat(bl): adding psa crypto - crypto_mod_finish()
feat(fvp): increase BL1 RW

Merge changes from topic "psa_key_id_mgmt" into integration

* changes:
feat(auth): extend REGISTER_CRYPTO_LIB calls
feat(bl): adding psa crypto - crypto_mod_finish()
feat(fvp): increase BL1 RW for PSA Crypto
feat(auth): mbedtls psa key id mgmt
feat(auth): add crypto_mod_finish() function
feat(auth): add update of current_pk_oid in auth
feat(auth): add util file for current pk_oid
feat(auth): increase mbedtls heap for PSA RSA
feat(auth): introducing auth.mk

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feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrm

feat(auth): extend REGISTER_CRYPTO_LIB calls

Extend REGISTER_CRYPTO_LIB calls with NULL to allow for
the addition of the cryto_mod_finish() function.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: If41ed1be50e1d98b42b266c7905269f142bb67c7

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feat(auth): mbedtls psa key id mgmt

Currently the psa key is created and destroyed after each usage during
signature verification.

This redesign adds a key_cache to store the key ID, psa algorithm,

feat(auth): mbedtls psa key id mgmt

Currently the psa key is created and destroyed after each usage during
signature verification.

This redesign adds a key_cache to store the key ID, psa algorithm, and
key attributes associated with a particular pk_oid. This allows for the
psa key to be reused by each image that has the associated pk_oid.

The pk_oid of the image being authenticated is stored as the global
current_pk_oid variable, which is used during the psa crypto
verification stage to associate a key_cache entry with a particular
pk_oid.

Since the psa key is no longer destroyed after each usage, the psa keys
are therefore destroyed after all images have been loaded during each
boot phase in the new crypto_mod_finish() function that is registered
by the REGISTER_CRYPTO_LIB and enabled through the build option of
PSA_CRYTPO.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Iba330bc659a76493bd958673424efcc621bab1c4

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feat(auth): add crypto_mod_finish() function

Adding crypto_mod_finish() function to be run at the end of crypto usage
to cleanup.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Chan

feat(auth): add crypto_mod_finish() function

Adding crypto_mod_finish() function to be run at the end of crypto usage
to cleanup.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ib6d099ddaa278f293fe14b805070985522a85686

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feat(auth): add update of current_pk_oid in auth

Adding the set of current_pk_oid during the authentication process,
include the new file in auth makefile.

Signed-off-by: Lauren Wehrmeister <lauren

feat(auth): add update of current_pk_oid in auth

Adding the set of current_pk_oid during the authentication process,
include the new file in auth makefile.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I3e05b8607060b424e34642d23e4960d2ef0f71f0

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feat(auth): add util file for current pk_oid

Adding new auth util file for the current_pk_oid and get and set
functions.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I9

feat(auth): add util file for current pk_oid

Adding new auth util file for the current_pk_oid and get and set
functions.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I91220f94d469c86f2e18570e13f1419125447288

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feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I

feat(auth): introducing auth.mk

Introducing authentication specific makefile auth.mk to include common
auth source files.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ifb07c48861fe415d82cb7390c3a5f6e60ba699d9

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Merge changes from topic "refactor_eip76_driver" into integration

* changes:
feat(marvell): add trng driver
revert(rambus-trng): remove ip-76 driver

feat(marvell): add trng driver

Armada-7K/8K and CN913x integrated the Rambus EIP-97 IP on CP11x die. It
supports to generate up to 4 32-bit random number in one shot.

This trivial driver provisions

feat(marvell): add trng driver

Armada-7K/8K and CN913x integrated the Rambus EIP-97 IP on CP11x die. It
supports to generate up to 4 32-bit random number in one shot.

This trivial driver provisions a simple API to read the random numbers
from hardware. It allows the bootloader to get one 32-bit or 64-bit
random number via SMC call to support KASLR.

Change-Id: I1707a85512ca163b8c7ab1644ff0f7e2fcf57344
Signed-off-by: Wilson Ding <dingwei@marvell.com>

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fix(rcar): use platform_def

The definitions are duplicate and cause compilation errors when includes
change.

Change-Id: Iadc45e053918b5e13fa12f0b371e5e77b56aef22
Signed-off-by: Boyan Karatotev <boy

fix(rcar): use platform_def

The definitions are duplicate and cause compilation errors when includes
change.

Change-Id: Iadc45e053918b5e13fa12f0b371e5e77b56aef22
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes I0b0443d5,Ic454a87a into integration

* changes:
fix(gic): quote the correct flag on error
feat(lib): add a generic EXTRACT macro

fix(gic): quote the correct flag on error

Generic GIC driver files should use the USE_GIC_DRIVER flag. When that's
not the case, the correct flag should be quotes to avoid confusion.

Change-Id: I0b

fix(gic): quote the correct flag on error

Generic GIC driver files should use the USE_GIC_DRIVER flag. When that's
not the case, the correct flag should be quotes to avoid confusion.

Change-Id: I0b0443d52c0b0e81d7b380285a278ffdeae17ca3
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(measured-boot): add fw handoff event log utils

Add utilities for handling an event log from a transfer list. These
handle initialisation, and extension of an existing event log.

Change-Id: I42

feat(measured-boot): add fw handoff event log utils

Add utilities for handling an event log from a transfer list. These
handle initialisation, and extension of an existing event log.

Change-Id: I42d8b65a7fa82fa866d8ac258d9eeb58af730a96
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove

revert(rambus-trng): remove ip-76 driver

The Rambus TRNG IP-76 driver was ported from Linux kernel (omap-rng.c),
which was initially licensed under GPL-2.0. In term of the license
violation, remove this driver and the related SMC call that originally
added by the following two commits:

commit 57660d9d7945 ("plat/marvell/armada/a8k: support HW RNG by SMC")
commit 6aa9f5d164e8 ("drivers/rambus: add TRNG-IP-76 driver")

Change-Id: Id8c99db2e51b49623b3b034106c989a46f690b60
Signed-off-by: Wilson Ding <dingwei@marvell.com>

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Merge changes from topic "s32g274a/sd_mov_imm_fixes" into integration

* changes:
fix(s32g274a): reduce the uSDHC clock to 200MHz
refactor(s32g274a): replace mov/movk with mov_imm

Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration

* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refacto

Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration

* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refactor(gic): promote most of the GIC driver to common code
refactor: make arm_gicv2.c and arm_gicv3.c common
refactor(fvp): use more arm generic code for gicv3

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chore: fix preprocessor checks

We can also drop the preprocessor check from plat_gic_init - it was
introduced because the tsp needed to call this function on gicv2 but not
gicv3 and this was the cle

chore: fix preprocessor checks

We can also drop the preprocessor check from plat_gic_init - it was
introduced because the tsp needed to call this function on gicv2 but not
gicv3 and this was the cleanest way to filter this out. Now that we have
the generic driver, the caller has all the tools to cater for this.
Callers have been converted so this is redundant.

Also, the FVP observes different behaviour on debug and release builds
in regards to the contents of plat_params_from_bl2. Make this explicit
so that release builds with ENABLE_ASSERTIONS=1 are possible.

Change-Id: I86959e67460d0c25c558f33c08e6233a8b6eeb7f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor: convert arm platforms to use the generic GIC driver

This reduces the code the platforms have to carry and makes their build
rules a bit simpler.

The main benefit is that plat_my_core_pos(

refactor: convert arm platforms to use the generic GIC driver

This reduces the code the platforms have to carry and makes their build
rules a bit simpler.

The main benefit is that plat_my_core_pos() no longer needs to be called
within the driver, helping with performance a bit.

Change-Id: I0b0d1d36d20d67c41c8c9dc14ade11bda6d4a6af
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(gic): promote most of the GIC driver to common code

More often than not, Arm based systems include some revision of a GIC.
There are two ways of adding support for them in platform code - c

refactor(gic): promote most of the GIC driver to common code

More often than not, Arm based systems include some revision of a GIC.
There are two ways of adding support for them in platform code - calling
the top-level helpers from plat/arm/common/arm_gicvX.c or by using the
driver directly. Both of these methods allow for a high degree of
customisation - most functions are defined to be weak and there are no
calls to any of them in generic code.

As it turns out, requirements around those GICs are largely the same.
Platforms that use arm_gicvX.c use the helpers identically among each
other. Platforms that use the driver directly tend to end up with calls
that look a lot like the arm_gicvX.c helpers and the weakness of the
functions are never exercised.

All of this results in a lot of code duplication to do what is
essentially the same thing. Even though it's not a lot of code, when
multiplied among many platforms it becomes significant and makes
refactoring it quite difficult. It's also bug prone since the steps are
a little convoluted and things are likely to work even with subtle
errors (see 50009f61177421118f42d6a000611ba0e613d54b).

So promote as much of the GIC to be called from common code. Do the
setup in bl31_main() and have every PSCI method do the state management
directly instead of delegating it to the platform hooks. We can base
this implementation on arm_gicvX.c since they already offer logical
names and have worked quite well so far with minimal changes.

The main benefit of doing this is reduced code duplication. If we assume
that, outside of some platform setup, GIC management is identical, then
a platform can add support by telling the build system, regardless of
GIC revision. The other benefit is performance - BL31 and PSCI already
know the core_pos and they can pass it as an argument instead of having
to call plat_my_core_pos(). Now, the only platform specific GIC actions
necessary are the saving and restoring of context on entering and
exiting a power domain. The PSCI library does not keep track of this so
it is unable perform it itself. The routines themselves are also
provided.

For compatibility all of this is hidden behind a build flag. Platforms
are encouraged to adopt this driver, but it would not be practical to
convert and validate every GIC based platform.

This patch renames the functions in question to follow the
gic_<function>() convention. This allows the names to be version
agnostic.

Finally, drop the weak definitions - they are unused, likely to remain
so, and can be added back if the need arises.

Change-Id: I5b5267f4b72f633fb1096400ec8e4b208694135f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(measured-boot): refine event log lib docs

Add comments for all exported functions and move these descriptions to
the header file. Moving the descriptions to the header file allows the
docum

refactor(measured-boot): refine event log lib docs

Add comments for all exported functions and move these descriptions to
the header file. Moving the descriptions to the header file allows the
documentation to be easily accessible to any code that includes the
header file, without having to look through the source file where the
function implementation is located.

Change-Id: I78ad777cb3de1707f9e9df59c721cd6370317c05
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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