| 986c4e99 | 14-Mar-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add separate RO and RW NSAIDs
To be able to further restrict the memory access for the Arm(R) Ethos(TM)-N NPU, separate read-only and read/write NSAIDs for the non-protected and prote
feat(ethos-n): add separate RO and RW NSAIDs
To be able to further restrict the memory access for the Arm(R) Ethos(TM)-N NPU, separate read-only and read/write NSAIDs for the non-protected and protected memory have been added to the Juno platform's TZMP1 TZC configuration for the NPU.
The platform definition has been updated accordingly and the NPU driver will now only give read/write access to the streams that require it.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I5a173500fc1943a5cd406a3b379e1f1f554eeda6
show more ...
|
| 6dcf3e77 | 10-Feb-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n)!: add protected NPU firmware setup
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, the NPU should use the firmware that has been loaded into the protected memory by
feat(ethos-n)!: add protected NPU firmware setup
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, the NPU should use the firmware that has been loaded into the protected memory by BL2. The Linux Kernel NPU driver in the non-secure world is not allowed to configure the NPU to do this in a TZMP1 build so the SiP service will now configure the NPU to boot with the firmware in the protected memory.
BREAKING CHANGE: The Linux Kernel NPU driver can no longer directly configure and boot the NPU in a TZMP1 build. The API version has therefore been given a major version bump with this change.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I65d00f54b3ade3665d7941e270da7a3dec02281a
show more ...
|
| 7820777f | 10-Feb-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add event and aux control support
The SiP service for the Arm(R) Ethos(TM)-N NPU driver will now handle setting up the NPU's event and aux control registers during the SMC reset call.
feat(ethos-n): add event and aux control support
The SiP service for the Arm(R) Ethos(TM)-N NPU driver will now handle setting up the NPU's event and aux control registers during the SMC reset call. The aux control register will no longer be accessible by the non-secure world.
The API version has been given a minor bump with this change to indicate the added functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I5b099e25978aa4089c384eb17c5060c5b4eaf373
show more ...
|
| e9812ddc | 27-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add SMC call to get FW properties
When the Arm(R) Ethos(TM)-N NPU firmware is loaded by BL2 into protected memory, the Linux kernel NPU driver cannot access the firmware. To still all
feat(ethos-n): add SMC call to get FW properties
When the Arm(R) Ethos(TM)-N NPU firmware is loaded by BL2 into protected memory, the Linux kernel NPU driver cannot access the firmware. To still allow the kernel driver to access some information about the firmware, SMC calls have been added so it can check compatibility and get the necessary information to map the firmware into the SMMU for the NPU.
The API version has been given a minor version bump with this change to indicate the added functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: Idb076b7bcf54ed7e8eb39be80114dc1d1c45336d
show more ...
|
| 18a6b79c | 27-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
refactor(ethos-n): split up SMC call handling
Doing all the SMC call handling in a single function and using specific names for the x1-4 parameters is no longer practical for upcoming additions to t
refactor(ethos-n): split up SMC call handling
Doing all the SMC call handling in a single function and using specific names for the x1-4 parameters is no longer practical for upcoming additions to the SiP service. Handling of the different SMC functions have therefore been split into separate functions.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: If28da8df0f13c449d1fdb2bd9d792d818ec5e1af
show more ...
|
| 313b776f | 13-Jan-2023 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add NPU firmware validation
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, it will now validate the NPU firmware binary that BL2 is expected to load into the prot
feat(ethos-n): add NPU firmware validation
When the Arm(R) Ethos(TM)-N NPU driver is built with TZMP1 support, it will now validate the NPU firmware binary that BL2 is expected to load into the protected memory location specified by ARM_ETHOSN_NPU_IMAGE_BASE.
Juno has been updated with a new BL31 memory mapping to allow the SiP service to read the protected memory that contains the NPU firmware binary.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I633256ab7dd4f8f5a6f864c8c98a66bf9dfc37f3
show more ...
|
| 70a296ee | 16-Nov-2022 |
Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com> |
feat(ethos-n): add support to set up NSAID
For the TZC to allow the Arm(R) Ethos(TM)-N NPU to access the buffers allocated in a protected memory region, it must include the correct NSAID for that re
feat(ethos-n): add support to set up NSAID
For the TZC to allow the Arm(R) Ethos(TM)-N NPU to access the buffers allocated in a protected memory region, it must include the correct NSAID for that region in its transactions to the memory. This change updates the SiP service to configure the NSAIDs specified by a platform define. When doing a protected access the SiP service now configures the NSAIDs specified by the platform define. For unprotected access the NSAID is set to zero.
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com> Signed-off-by: Rob Hughes <robert.hughes@arm.com> Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I3360ef33705162aba5c67670386922420869e331
show more ...
|
| 2a2e3e87 | 04-Nov-2022 |
Mikael Olsson <mikael.olsson@arm.com> |
feat(ethos-n): add NPU sleeping SMC call
The non-secure world delegation of the register needed to determine if the Arm(R) Ethos(TM)-N NPU is active or sleeping will be removed in the future. In pre
feat(ethos-n): add NPU sleeping SMC call
The non-secure world delegation of the register needed to determine if the Arm(R) Ethos(TM)-N NPU is active or sleeping will be removed in the future. In preparation for the change, a new SMC call has been added to allow the non-secure world to ask the SiP service for the state instead.
A minor API version bump has been done with this change to indicate support for the new functionality.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I1338341be385cf1891f4809efb7083fae6d928bc
show more ...
|