feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4

feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I598109f15a2efd5b33aedd176cf708c08cb1dcf4

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docs: add binding for vm availability messages

SPs can subscribe to get notified when a VM is created or destroyed.
This patch adds a binding to the SP manifest to represent this.

Signed-off-by: Ba

docs: add binding for vm availability messages

SPs can subscribe to get notified when a VM is created or destroyed.
This patch adds a binding to the SP manifest to represent this.

Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
Change-Id: Ib23655575f471a22bcf261f70f2c4124a3f292c3

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Merge "feat(versal): deprecate build time arg VERSAL_PLATFORM" into integration

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific APIs
feat(xilinx): update SiP SVC version number
feat(xilinx): update TF-A to passthrough all PLM commands
fix(xilinx): fix logic to read ipi response

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docs: fix discrepancies in value type of manifest fields

In order to avoid the complexity of supporting value types smaller
than u32 and avoid discrepancies for the various manifest fields
among dif

docs: fix discrepancies in value type of manifest fields

In order to avoid the complexity of supporting value types smaller
than u32 and avoid discrepancies for the various manifest fields
among different projects, the value type for relevant fields are
upgraded to u32.

Change-Id: Ib033019b3b8c26bf4b8b50f89b7a6d1a772e5e51
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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docs: update ff-a manifest bindings

Various SPMC projects within trustefirmware.org have decided to adhere
to a common FF-A manifest binding document. The one hosted in the
readthedocs portal of TF-

docs: update ff-a manifest bindings

Various SPMC projects within trustefirmware.org have decided to adhere
to a common FF-A manifest binding document. The one hosted in the
readthedocs portal of TF-A project will be considered as the reference.

Hence, this binding document is updated to reflect new additions made
to binding document hosted in Hafnium project. Eventually, all other
binding document are going to be removed.

Also, few fields were incorrectly identified as mandatory. Necessary
corrections are made in this patch.

Change-Id: I2eadd77487c770e49605285bbd72027c5e72e385
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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chore(docs): remove hafnium specific documentation

All the relevant documentation for Hafnium as the chosen Secure
Partition Manager has been moved to hafnium project[1].

This patch removes the red

chore(docs): remove hafnium specific documentation

All the relevant documentation for Hafnium as the chosen Secure
Partition Manager has been moved to hafnium project[1].

This patch removes the redundant sections without any loss of
information.

This patch adds links to documentation of each of the SPM projects.

[1] https://hafnium.readthedocs.io/en/latest/secure-partition-manager/index.html

Change-Id: I52caf7dc50f4aa253c68309cac0915b7d368939d
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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feat(arm): update documentation for cot-dt2c

Add documentation for the cot-dt2c feature

Change-Id: I27383882b639e39217d09ca76e316098cc4753d0
Signed-off-by: Xialin Liu <Xialin.Liu@ARM.com>

feat(docs): add RMM option in build-options.rst

Add the RMM option description in the build-options document.

Signed-off-by: Jaylyn Ren <Jaylyn.Ren2@arm.com>
Change-Id: Idb884e2707a2bdc686f676d16f0

feat(docs): add RMM option in build-options.rst

Add the RMM option description in the build-options document.

Signed-off-by: Jaylyn Ren <Jaylyn.Ren2@arm.com>
Change-Id: Idb884e2707a2bdc686f676d16f0ff2f0e001a17d

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feat: add option to input attr as string of flag names

Change-Id: I56f0364ef43c9d415a335474e15b68e79db37f5d
Signed-off-by: Charlie Bareham <charlie.bareham@arm.com>

feat: add option to input text instead of tag id number

Change-Id: I6d1b1a20d1cd5b073d7d614da102b9e6bd8ea522
Signed-off-by: Charlie Bareham <charlie.bareham@arm.com>

feat: add creating transfer lists from yaml files

This commit adds a command create-from-yaml to tlc, which
creates a transfer list from a yaml file. It also changes
the files structure of the fixtu

feat: add creating transfer lists from yaml files

This commit adds a command create-from-yaml to tlc, which
creates a transfer list from a yaml file. It also changes
the files structure of the fixtures in the unit tests so
they are in a directory called trusted-firmware-a. This
is necessary because blob file paths in the yaml file are
relative to the root of TF-A.

The blob files are not verified by TLC, so it can be used
to load arbitrary binary information into the transfer
list. The authenticity of the transfer list must be
ensured by the loader.

Change-Id: Idf704ce5d9b7e28b31f471ac337e4aef33d0ad8a
Signed-off-by: Charlie Bareham <charlie.bareham@arm.com>

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fix(cpus): workaround for Cortex-A720 erratum 2844092

Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[11] o

fix(cpus): workaround for Cortex-A720 erratum 2844092

Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[11] of CPUACTLR4_EL1 register.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest

Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory

fix(cpus): workaround for Cortex-X4 erratum 2816013

Cortex-X4 erratum 2816013 is a Cat B erratum that applies
to all revisions <= r0p1 and is fixed in r0p2. This erratum
is only present when memory tagging is enabled.

The workaround is to set CPUACTLR5_EL1[14] to 1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2432808/latest

Change-Id: I546044bde6e5eedd0abf61643d25e2dd2036df5c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.bud

docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iee09d3d843c6bb3f82aad6df703542ba1eb63c6c

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feat(tlc): add host tool for static TL generation

Transfer List Compiler is a command line tool that enables the static
generation of TL's compliant with version 0.9 of the firmware handoff
specific

feat(tlc): add host tool for static TL generation

Transfer List Compiler is a command line tool that enables the static
generation of TL's compliant with version 0.9 of the firmware handoff
specification. The intent of this tool is to support information passing
via the firmware handoff framework to bootloaders that run without
preceding images (i.e. `RESET_TO_BL31`).

It currently allows for TL's to be statically generated from blobs of
data, and modified by removing/adding TE's. Future work will provide
support for TL generation from configuration file.

Change-Id: Iff670842e34c9ad18eac935248ee2aece43dc533
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Co-authored-by: Charlie Bareham <charlie.bareham@arm.com>

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Merge "build(amu): restrict counters (RAZ)" into integration

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionalit

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionality for identifying the board variant during
runtime, allowing dynamic adjustment of CPU and UART clock values
accordingly.
Print the runtime board information during boot.
This advancement streamlines the build process by eliminating
dependencies on variant-specific builds, enabling the use of a single
binary for multiple variants.
Removing all the platform related constants for versal_virt,SPP,EMU as
they are not used.

Change-Id: I8c1a1d391bd1a8971addc1f56f8309a3fb75aa6d
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "feat(fgt2): add support for FEAT_FGT2" into integration

Merge "feat(debugv8p9): add support for FEAT_Debugv8p9" into integration

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a

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feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed

feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3613af1dd8cb8c0d3c33dc959f170846c0b9695a

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fix(docs): fix CPU type for mt8195

MT8195 features four Cortex-A78 cores not Cortex-A76.

Change-Id: I62c60373e7a3e570bcadaeaf065ca0f7473cb838
Signed-off-by: Yidi Lin <yidilin@chromium.org>

Merge changes from topic "stm32mp2_doc_update" into integration

* changes:
feat(docs): add STM32MP2 docs links
docs(stm32mp2): correct STM32MP2 frequencies

Merge "refactor(docs): update RSE docs to match the example CCA token" into integration