| c944952b | 14-May-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
docs(gpt): update GPT library documentation
This patch updates GPT library design documentation with the changes introduced by patches which add support for large GPT mappings and configuration of m
docs(gpt): update GPT library documentation
This patch updates GPT library design documentation with the changes introduced by patches which add support for large GPT mappings and configuration of memory size protected by bitlock.
Change-Id: I1f97fa8f003deb07a5f32b7237c1927581a788c8 Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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| a13449da | 03-Jun-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(stm32mp15): remove OP-TEE shared mem" into integration |
| 261edb6a | 28-May-2024 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes I710d1780,Ia9a59bde into integration
* changes: feat(gpt): configure memory size protected by bitlock feat(gpt): add support for large GPT mappings |
| 8dd2a64a | 30-Jun-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp15): remove OP-TEE shared mem
The flag STM32MP15_OPTEE_RSV_SHM was disabled and mark deprecated. Remove the corresponding code.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-
feat(stm32mp15): remove OP-TEE shared mem
The flag STM32MP15_OPTEE_RSV_SHM was disabled and mark deprecated. Remove the corresponding code.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I948af3e1de4b89815c967a63abe64f285c405ecc
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| f2735ebc | 23-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(changelog): changelog for v2.11 release" into integration |
| 669e2b15 | 17-May-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(changelog): changelog for v2.11 release
Generated this change-log using below command: npm run release -- --skip.commit --skip.tag --release-as 2.11.0
Change-Id: I34c7b342549781057da1b18116500
docs(changelog): changelog for v2.11 release
Generated this change-log using below command: npm run release -- --skip.commit --skip.tag --release-as 2.11.0
Change-Id: I34c7b342549781057da1b18116500f110bc3f5ad Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Signed-off-by: Juan Pablo Conde <JuanPablo.Conde@arm.com>
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| 6370f2cb | 22-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "hm/rt-instr" into integration
* changes: docs(juno): update PSCI instrumentation data docs(n1sdp): update N1SDP PSCI instrumentation data |
| b5ead359 | 22-May-2024 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs: move DPE option to experimental section
Since DPE support is experimental, move the build option for the DPE to the experimental section.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm
docs: move DPE option to experimental section
Since DPE support is experimental, move the build option for the DPE to the experimental section.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I2e18947d37c52a0151b5ac656098dbae51254956
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| d766084f | 13-May-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(gpt): configure memory size protected by bitlock
This patch adds support in GPT library for configuration of the memory block size protected by one bit of 'bitlock' structure. Build option 'RME
feat(gpt): configure memory size protected by bitlock
This patch adds support in GPT library for configuration of the memory block size protected by one bit of 'bitlock' structure. Build option 'RME_GPT_BITLOCK_BLOCK' defines the number of 512MB blocks covered by each bit. This numeric parameter must be a power of 2 and can take the values from 0 to 512. Setting this value to 0 chooses a single spinlock for all GPT L1 table entries. The default value is set to 1 which corresponds to 512MB per bit.
Change-Id: I710d178072894a3ef40daebea701f74d19e8a3d7 Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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| 932d6cdb | 10-Nov-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs(juno): update PSCI instrumentation data
Add the latest instrumentation data as of v2.11-rc0, remove data for v2.9.
Change-Id: I8c055278d732220a9be88978ed63d27e453b7f2f Signed-off-by: Harrison
docs(juno): update PSCI instrumentation data
Add the latest instrumentation data as of v2.11-rc0, remove data for v2.9.
Change-Id: I8c055278d732220a9be88978ed63d27e453b7f2f Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| e9c335fb | 11-May-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs(n1sdp): update N1SDP PSCI instrumentation data
Add data for v2.11 release and remove data from v2.9.
Change-Id: Ic960cece6f27993cefebf483c768967bd6f2cad1 Signed-off-by: Harrison Mutai <harriso
docs(n1sdp): update N1SDP PSCI instrumentation data
Add data for v2.11 release and remove data from v2.9.
Change-Id: Ic960cece6f27993cefebf483c768967bd6f2cad1 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 3ab6ae4e | 16-May-2024 |
Bipin Ravi <bipin.ravi@arm.com> |
docs(maintainers): update the maintainer list for LTS
This patch updates the maintainer list for LTS.
Change-Id: I7942288cd79dd163bebd3397bf908bf29906d59e Signed-off-by: Bipin Ravi <bipin.ravi@arm.
docs(maintainers): update the maintainer list for LTS
This patch updates the maintainer list for LTS.
Change-Id: I7942288cd79dd163bebd3397bf908bf29906d59e Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
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| b131a123 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): add code owners for runtime services module
This patch adds code owners responsible for maintaining source files related to runtime services functionality in TF-A.
Change-Id: I24
docs(maintainers): add code owners for runtime services module
This patch adds code owners responsible for maintaining source files related to runtime services functionality in TF-A.
Change-Id: I24fbbfd017f90a4fae2ffbb94c8eb81d0d837f8e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 01756656 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): add missing header files
Few header files are added to the lists tracking code owners of various modules in TF-A project.
Also remove drivers/nuvoton directory, which does not ex
docs(maintainers): add missing header files
Few header files are added to the lists tracking code owners of various modules in TF-A project.
Also remove drivers/nuvoton directory, which does not exist, from the list of files maintained by the corresponding owners.
Change-Id: Iad7ce5b1430965237004c9e76e972a3469d20c9d Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 5ecb6bb0 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): add code owners for context management module
This patch adds code owners responsible for maintaining context management source files in TF-A.
Change-Id: Idc679a907b8380e81d5fbb1
docs(maintainers): add code owners for context management module
This patch adds code owners responsible for maintaining context management source files in TF-A.
Change-Id: Idc679a907b8380e81d5fbb129fcb74cea5983c0e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 4d16bc70 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): add code owners for runtime exceptions module
This patch adds code owners responsible for maintaining runtime exceptions and interrupt management modules in TF-A.
Change-Id: Idb1
docs(maintainers): add code owners for runtime exceptions module
This patch adds code owners responsible for maintaining runtime exceptions and interrupt management modules in TF-A.
Change-Id: Idb131a2af143097e4d05a285e08ef12cd5d3db2a Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| a45f75a6 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): add missing files related to SPMD
Few header files are added to the list maintained by SPMD code owners. Also, added myself as one of the code owners for SPMD module in TF-A.
Cha
docs(maintainers): add missing files related to SPMD
Few header files are added to the list maintained by SPMD code owners. Also, added myself as one of the code owners for SPMD module in TF-A.
Change-Id: Ic017cb98013d349702c35837463586d4aae65543 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 46fc2501 | 25-Apr-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
docs(maintainers): update missing files related to EL3 SPMC
Few header files are added to the list maintained by EL3 SPMC code owner.
Also added missing copyright license footer message.
Change-Id
docs(maintainers): update missing files related to EL3 SPMC
Few header files are added to the list maintained by EL3 SPMC code owner.
Also added missing copyright license footer message.
Change-Id: I72afe4c4e1280ef64610a5efe6d1b0e2c9727bb0 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| ed3525e6 | 20-Mar-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
docs: remove reference to phabricator pages
Phabricator wiki is deprecated, remove TF-A links to this website.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I1255a1513524504636b
docs: remove reference to phabricator pages
Phabricator wiki is deprecated, remove TF-A links to this website.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I1255a1513524504636b9c914f9dacf3c54063196
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| ec0088bb | 13-Mar-2024 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(gpt): add support for large GPT mappings
This patch adds support for large GPT mappings using Contiguous descriptors. The maximum size of supported contiguous block in MB is defined in RME_GPT_
feat(gpt): add support for large GPT mappings
This patch adds support for large GPT mappings using Contiguous descriptors. The maximum size of supported contiguous block in MB is defined in RME_GPT_MAX_BLOCK build parameter and takes values 0, 2, 32 and 512 and by default set to 2 in make_helpers/defaults.mk. Setting RME_GPT_MAX_BLOCK value to 0 disables use of Contiguous descriptors. Function gpt_tlbi_by_pa_ll() and its declaration are removed from lib/aarch64/misc_helpers.S and include/arch/aarch64/arch_helpers.h, because the GPT library now uses tlbirpalos_xxx() functions.
Change-Id: Ia9a59bde1741c5666b4ca1de9324e6dfd6f734eb Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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| 14c27f82 | 03-Apr-2024 |
Juan Pablo Conde <juanpablo.conde@arm.com> |
build(amu): restrict counters (RAZ)
The use of AMU counters at the highest implemented exception level can expose information about them to lower exception levels, such as specific behavior happenin
build(amu): restrict counters (RAZ)
The use of AMU counters at the highest implemented exception level can expose information about them to lower exception levels, such as specific behavior happening in the CPU (e.g.: MPMM gear shifting in TC2). In order to prevent this, read accesses to AMU counters are restricted by default, so they are RAZ (read-as-zero) from lower exception levels from now on.
Change-Id: I660b0928bea3fe09436ad53b0bb43c3067523178 Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
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| d963c6ba | 10-May-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
docs(prerequisites): update mbedtls version used
With Commit@55aed7d798f3d48d6aa08d58eb46c4cda318bcfb we have now updated to use mbedtls 3.6.0.
Update document to reflect the same.
Change-Id: I6bd
docs(prerequisites): update mbedtls version used
With Commit@55aed7d798f3d48d6aa08d58eb46c4cda318bcfb we have now updated to use mbedtls 3.6.0.
Update document to reflect the same.
Change-Id: I6bd8fcca795373a05bc6beb2e085d24fdd14932f Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 23fc05a3 | 10-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(context-mgmt): add documentation for context management library" into integration |
| f99a69c3 | 21-Dec-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(dsu): save/restore DSU PMU register
Adds driver support to preserve DSU PMU register values over a DSU power cycle. This driver needs to be enabled by the platforms that support DSU and also ne
feat(dsu): save/restore DSU PMU register
Adds driver support to preserve DSU PMU register values over a DSU power cycle. This driver needs to be enabled by the platforms that support DSU and also need it's PMU registers to be preserved
Change-Id: I7fc68a3d7d99ee369379aa5cd114fffc763fc0d2 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
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| a97e1f97 | 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CON
Merge changes from topic "early_console" into integration
* changes: feat(stm32mp2): use early traces feat(st-bsec): use early traces refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE feat(console): introduce EARLY_CONSOLE feat(bl32): create an sp_min_setup function
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