| 0f4b0634 | 28-Oct-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #217 from jcastillo-arm/jc/tf-issues/257
FVP: keep shared data in Trusted SRAM |
| 20d51cad | 24-Sep-2014 |
Juan Castillo <juan.castillo@arm.com> |
FVP: keep shared data in Trusted SRAM
This patch deprecates the build option to relocate the shared data into Trusted DRAM in FVP. After this change, shared data is always located at the base of Tru
FVP: keep shared data in Trusted SRAM
This patch deprecates the build option to relocate the shared data into Trusted DRAM in FVP. After this change, shared data is always located at the base of Trusted SRAM. This reduces the complexity of the memory map and the number of combinations in the build options.
Fixes ARM-software/tf-issues#257
Change-Id: I68426472567b9d8c6d22d8884cb816f6b61bcbd3
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| 740134e6 | 05-Sep-2014 |
Juan Castillo <juan.castillo@arm.com> |
Juno: Reserve some DDR-DRAM for secure use
This patch configures the TrustZone Controller in Juno to split the 2GB DDR-DRAM memory at 0x80000000 into Secure and Non-Secure regions:
- Secure DDR-DRA
Juno: Reserve some DDR-DRAM for secure use
This patch configures the TrustZone Controller in Juno to split the 2GB DDR-DRAM memory at 0x80000000 into Secure and Non-Secure regions:
- Secure DDR-DRAM: top 16 MB, except for the last 2 MB which are used by the SCP for DDR retraining - Non-Secure DDR-DRAM: remaining DRAM starting at base address
Build option PLAT_TSP_LOCATION selects the location of the secure payload (BL3-2):
- 'tsram' : Trusted SRAM (default option) - 'dram' : Secure region in the DDR-DRAM (set by the TrustZone controller)
The MMU memory map has been updated to give BL2 permission to load BL3-2 into the DDR-DRAM secure region.
Fixes ARM-software/tf-issues#233
Change-Id: I6843fc32ef90aadd3ea6ac4c7f314f8ecbd5d07b
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| aa5da461 | 04-Aug-2014 |
Jens Wiklander <jens.wiklander@linaro.org> |
Add opteed based on tspd
Adds a dispatcher for OP-TEE based on the test secure payload dispatcher.
Fixes arm-software/tf-issues#239 |
| 27713fb4 | 08-Sep-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add support for specifying pre-built BL binaries in Makefile
This patch adds support for supplying pre-built BL binaries for BL2, BL3-1 and BL3-2 during trusted firmware build. Specifying BLx = <pat
Add support for specifying pre-built BL binaries in Makefile
This patch adds support for supplying pre-built BL binaries for BL2, BL3-1 and BL3-2 during trusted firmware build. Specifying BLx = <path_to_BLx> in the build command line, where 'x' is any one of BL2, BL3-1 or BL3-2, will skip building that BL stage from source and include the specified binary in final fip image.
This patch also makes BL3-3 binary for FIP optional depending on the value of 'NEED_BL33' flag which is defined by the platform.
Fixes ARM-software/tf-issues#244 Fixes ARM-software/tf-issues#245
Change-Id: I3ebe1d4901f8b857e8bb51372290978a3323bfe7
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| 14b6608c | 28-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #205 from danh-arm/dh/1.0-docs
Documentation for version 1.0 |
| c6249aaa | 26-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Documentation for version 1.0
Final updates to readme.md and change-log.md for ARM Trusted Firmware version 1.0. Also increment the version in the Makefile.
Change-Id: I00fe1016c8b936834bbf7bbba7aa
Documentation for version 1.0
Final updates to readme.md and change-log.md for ARM Trusted Firmware version 1.0. Also increment the version in the Makefile.
Change-Id: I00fe1016c8b936834bbf7bbba7aab07f51261bbb
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| d78baf25 | 28-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Fix minor issues in user guide
* Fix broken link to SCP download.
* Remove requirement to install `ia32-libs`. This package is no longer available in current versions of Ubuntu and is no
Fix minor issues in user guide
* Fix broken link to SCP download.
* Remove requirement to install `ia32-libs`. This package is no longer available in current versions of Ubuntu and is no longer required when using the Linaro toolchain.
Change-Id: I9823d535a1d69136685754b7707b73e1eef0978d
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| 44804252 | 06-Aug-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Miscellaneous documentation fixes
This patch gathers miscellaneous minor fixes to the documentation, and comments in the source code.
Change-Id: I631e3dda5abafa2d90f464edaee069a1e58b751b Co-Authore
Miscellaneous documentation fixes
This patch gathers miscellaneous minor fixes to the documentation, and comments in the source code.
Change-Id: I631e3dda5abafa2d90f464edaee069a1e58b751b Co-Authored-By: Soby Mathew <soby.mathew@arm.com> Co-Authored-By: Dan Handley <dan.handley@arm.com>
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| ae5bb9db | 27-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #202 from achingupta/ag/fw-design-juno-update
Add information about Juno in firmware-design.md |
| 2442d248 | 26-Aug-2014 |
Juan Castillo <juan.castillo@arm.com> |
Add information about Juno in firmware-design.md
This patch reorganizes the firmware design guide to add information about the port of the ARM Trusted Firmware to the Juno ARM development platform.
Add information about Juno in firmware-design.md
This patch reorganizes the firmware design guide to add information about the port of the ARM Trusted Firmware to the Juno ARM development platform.
Change-Id: I0b80e2e7a35ccad1af2e971506cfb7fe505f8b84
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| e40ae239 | 27-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #200 from danh-arm/dh/fix-reset-to-bl31-part2
Fix reset to BL3-1 instructions in user guide, part 2 |
| d14e0acf | 19-Aug-2014 |
Juan Castillo <juan.castillo@arm.com> |
Add Juno instructions to user guide
This patch makes the Trusted Firmware build instructions in the user guide platform independent.
FVP specific instructions have been grouped together under a new
Add Juno instructions to user guide
This patch makes the Trusted Firmware build instructions in the user guide platform independent.
FVP specific instructions have been grouped together under a new section dedicated to FVP.
Juno specific instructions to build and run the Trusted Firmware, UEFI and Linux have been added.
Change-Id: I9bfb1b9d732b1f73abbe29f68ac931e1773a4fd5
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| 7ea4c437 | 26-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Fix reset to BL3-1 instructions in user guide, part 2
Fix the instructions for resetting to the BL3-1 entrypoint in the user guide. The BL3-1 and BL3-2 image locations changed in the fix to ARM-soft
Fix reset to BL3-1 instructions in user guide, part 2
Fix the instructions for resetting to the BL3-1 entrypoint in the user guide. The BL3-1 and BL3-2 image locations changed in the fix to ARM-software/tf-issues#100 (commit 186c1d4). This is distinct from the similar issue fixed in commit bfb1dd5.
Also clarify the dependence on the FVP_SHARED_DATA_LOCATION and FVP_TSP_RAM_LOCATION build options, and tidy up the "Notes regarding Base FVP configuration options" section.
Change-Id: I6b03452a71f0c69efa169852712bcb184242696e
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| ba73bb09 | 14-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Move up dependency versions in user guide
Move up the version numbers of the following Trusted Firmware dependencies in the user guide:
* Foundation and Base FVPs (latest publically available
Move up dependency versions in user guide
Move up the version numbers of the following Trusted Firmware dependencies in the user guide:
* Foundation and Base FVPs (latest publically available versions).
* EDK2 implementation. The guide now uses the latest version from https://github.com/ARM-software/edk2.git. This requires the `iasl` package to also be installed.
* Linux kernel. The guide now uses the latest version from https://github.com/ARM-software/linux.git.
* Linaro OpenEmbedded file system.
* ARM Development Studio 5.
Change-Id: I95bb863a61e47b9ef8be3d110f7087375ee78add
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| 3fd5ddfe | 18-Aug-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add documentation for CPU specific abstraction and Errata workarounds
This patch adds documentation for CPU specific abstraction in the firmware- design.md and adds a new document cpu-errata-workaro
Add documentation for CPU specific abstraction and Errata workarounds
This patch adds documentation for CPU specific abstraction in the firmware- design.md and adds a new document cpu-errata-workarounds.md to describe the cpu errata workaround build flags.
Change-Id: Ia08c2fec0b868a0a107d0264e87a60182797a1bd
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| add40351 | 14-Aug-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add CPU specific power management operations
This patch adds CPU core and cluster power down sequences to the CPU specific operations framework introduced in a earlier patch. Cortex-A53, Cortex-A57
Add CPU specific power management operations
This patch adds CPU core and cluster power down sequences to the CPU specific operations framework introduced in a earlier patch. Cortex-A53, Cortex-A57 and generic AEM sequences have been added. The latter is suitable for the Foundation and Base AEM FVPs. A pointer to each CPU's operations structure is saved in the per-cpu data so that it can be easily accessed during power down seqeunces.
An optional platform API has been introduced to allow a platform to disable the Accelerator Coherency Port (ACP) during a cluster power down sequence. The weak definition of this function (plat_disable_acp()) does not take any action. It should be overriden with a strong definition if the ACP is present on a platform.
Change-Id: I8d09bd40d2f528a28d2d3f19b77101178778685d
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| 24fb838f | 14-Aug-2014 |
Soby Mathew <soby.mathew@arm.com> |
Add platform API for reset handling
This patch adds an optional platform API (plat_reset_handler) which allows the platform to perform any actions immediately after a cold or warm reset e.g. impleme
Add platform API for reset handling
This patch adds an optional platform API (plat_reset_handler) which allows the platform to perform any actions immediately after a cold or warm reset e.g. implement errata workarounds. The function is called with MMU and caches turned off. This API is weakly defined and does nothing by default but can be overriden by a platform with a strong definition.
Change-Id: Ib0acdccbd24bc756528a8bd647df21e8d59707ff
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| 5a06bb7e | 04-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Clarify platform porting interface to TSP
* Move TSP platform porting functions to new file: include/bl32/tsp/platform_tsp.h.
* Create new TSP_IRQ_SEC_PHY_TIMER definition for use by the generic
Clarify platform porting interface to TSP
* Move TSP platform porting functions to new file: include/bl32/tsp/platform_tsp.h.
* Create new TSP_IRQ_SEC_PHY_TIMER definition for use by the generic TSP interrupt handling code, instead of depending on the FVP specific definition IRQ_SEC_PHY_TIMER.
* Rename TSP platform porting functions from bl32_* to tsp_*, and definitions from BL32_* to TSP_*.
* Update generic TSP code to use new platform porting function names and definitions.
* Update FVP port accordingly and move all TSP source files to: plat/fvp/tsp/.
* Update porting guide with above changes.
Note: THIS CHANGE REQUIRES ALL PLATFORM PORTS OF THE TSP TO BE UPDATED
Fixes ARM-software/tf-issues#167
Change-Id: Ic0ff8caf72aebb378d378193d2f017599fc6b78f
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| 6d16ce0b | 04-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Remove redundant io_init() function
The intent of io_init() was to allow platform ports to provide a data object (io_plat_data_t) to the IO storage framework to allocate into. The abstraction was in
Remove redundant io_init() function
The intent of io_init() was to allow platform ports to provide a data object (io_plat_data_t) to the IO storage framework to allocate into. The abstraction was incomplete because io_plat_data_t uses a platform defined constant and the IO storage framework internally allocates other arrays using platform defined constants.
This change simplifies the implementation by instantiating the supporting objects in the IO storage framework itself. There is now no need for the platform to call io_init().
The FVP port has been updated accordingly.
THIS CHANGE REQUIRES ALL PLATFORM PORTS THAT USE THE IO STORAGE FRAMEWORK TO BE UDPATED.
Change-Id: Ib48ac334de9e538064734334c773f8b43df3a7dc
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| f0e240d7 | 14-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #184 from jcastillo-arm/jc/tf-issues/100
FVP: make usage of Trusted DRAM optional at build time |
| 23302091 | 14-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #186 from danh-arm/dh/fix-reset-to-bl31
Fix reset to BL3-1 instructions in user guide |
| 186c1d4b | 12-Aug-2014 |
Juan Castillo <juan.castillo@arm.com> |
FVP: make usage of Trusted DRAM optional at build time
This patch groups the current contents of the Trusted DRAM region at address 0x00_0600_0000 (entrypoint mailboxes and BL3-1 parameters) in a si
FVP: make usage of Trusted DRAM optional at build time
This patch groups the current contents of the Trusted DRAM region at address 0x00_0600_0000 (entrypoint mailboxes and BL3-1 parameters) in a single shared memory area that may be allocated to Trusted SRAM (default) or Trusted DRAM at build time by setting the FVP_SHARED_DATA_LOCATION make variable. The size of this shared memory is 4096 bytes.
The combination 'Shared data in Trusted SRAM + TSP in Trusted DRAM' is not currently supported due to restrictions in the maximum number of mmu tables that can be created.
Documentation has been updated to reflect these changes.
Fixes ARM-software/tf-issues#100
Change-Id: I26ff04d33ce4cacf8d770d1a1e24132b4fc53ff0
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| bfb1dd51 | 13-Aug-2014 |
Dan Handley <dan.handley@arm.com> |
Fix reset to BL3-1 instructions in user guide
Fix the instructions for resetting to the BL3-1 entrypoint in the user guide. The BL3-1 and BL3-2 image locations changed in the fix to ARM-software/tf-
Fix reset to BL3-1 instructions in user guide
Fix the instructions for resetting to the BL3-1 entrypoint in the user guide. The BL3-1 and BL3-2 image locations changed in the fix to ARM-software/tf-issues#117 (commit a1b6db6).
Fixes ARM-software/tf-issues#237
Change-Id: I764eb17c66034511efb984c0e7cfda29bd99198f
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| 6f08fd5f | 12-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #183 from danh-arm/dh/print_output2
Add concept of console output log levels
Rationalize console log output |