1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <bl_common.h> 35 #include <debug.h> 36 #include <platform.h> 37 #include <platform_def.h> 38 #include "bl1_private.h" 39 40 /******************************************************************************* 41 * Runs BL2 from the given entry point. It results in dropping the 42 * exception level 43 ******************************************************************************/ 44 static void __dead2 bl1_run_bl2(entry_point_info_t *bl2_ep) 45 { 46 bl1_arch_next_el_setup(); 47 48 /* Tell next EL what we want done */ 49 bl2_ep->args.arg0 = RUN_IMAGE; 50 51 if (GET_SECURITY_STATE(bl2_ep->h.attr) == NON_SECURE) 52 change_security_state(GET_SECURITY_STATE(bl2_ep->h.attr)); 53 54 write_spsr_el3(bl2_ep->spsr); 55 write_elr_el3(bl2_ep->pc); 56 57 eret(bl2_ep->args.arg0, 58 bl2_ep->args.arg1, 59 bl2_ep->args.arg2, 60 bl2_ep->args.arg3, 61 bl2_ep->args.arg4, 62 bl2_ep->args.arg5, 63 bl2_ep->args.arg6, 64 bl2_ep->args.arg7); 65 } 66 67 /******************************************************************************* 68 * The next function has a weak definition. Platform specific code can override 69 * it if it wishes to. 70 ******************************************************************************/ 71 #pragma weak bl1_init_bl2_mem_layout 72 73 /******************************************************************************* 74 * Function that takes a memory layout into which BL2 has been loaded and 75 * populates a new memory layout for BL2 that ensures that BL1's data sections 76 * resident in secure RAM are not visible to BL2. 77 ******************************************************************************/ 78 void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 79 meminfo_t *bl2_mem_layout) 80 { 81 const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE; 82 83 assert(bl1_mem_layout != NULL); 84 assert(bl2_mem_layout != NULL); 85 86 /* Check that BL1's memory is lying outside of the free memory */ 87 assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || 88 (BL1_RAM_BASE >= bl1_mem_layout->free_base + bl1_mem_layout->free_size)); 89 90 /* Remove BL1 RW data from the scope of memory visible to BL2 */ 91 *bl2_mem_layout = *bl1_mem_layout; 92 reserve_mem(&bl2_mem_layout->total_base, 93 &bl2_mem_layout->total_size, 94 BL1_RAM_BASE, 95 bl1_size); 96 97 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); 98 } 99 100 /******************************************************************************* 101 * Function to perform late architectural and platform specific initialization. 102 * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only 103 * called by the primary cpu after a cold boot. 104 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 105 * loader etc. 106 ******************************************************************************/ 107 void bl1_main(void) 108 { 109 /* Announce our arrival */ 110 NOTICE(FIRMWARE_WELCOME_STR); 111 NOTICE("BL1: %s\n", version_string); 112 NOTICE("BL1: %s\n", build_message); 113 114 INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT); 115 116 #if DEBUG 117 unsigned long sctlr_el3 = read_sctlr_el3(); 118 #endif 119 image_info_t bl2_image_info = { {0} }; 120 entry_point_info_t bl2_ep = { {0} }; 121 meminfo_t *bl1_tzram_layout; 122 meminfo_t *bl2_tzram_layout = 0x0; 123 int err; 124 125 /* 126 * Ensure that MMU/Caches and coherency are turned on 127 */ 128 assert(sctlr_el3 | SCTLR_M_BIT); 129 assert(sctlr_el3 | SCTLR_C_BIT); 130 assert(sctlr_el3 | SCTLR_I_BIT); 131 132 /* Perform remaining generic architectural setup from EL3 */ 133 bl1_arch_setup(); 134 135 /* Perform platform setup in BL1. */ 136 bl1_platform_setup(); 137 138 SET_PARAM_HEAD(&bl2_image_info, PARAM_IMAGE_BINARY, VERSION_1, 0); 139 SET_PARAM_HEAD(&bl2_ep, PARAM_EP, VERSION_1, 0); 140 141 /* Find out how much free trusted ram remains after BL1 load */ 142 bl1_tzram_layout = bl1_plat_sec_mem_layout(); 143 144 /* Load the BL2 image */ 145 err = load_image(bl1_tzram_layout, 146 BL2_IMAGE_NAME, 147 BL2_BASE, 148 &bl2_image_info, 149 &bl2_ep); 150 if (err) { 151 /* 152 * TODO: print failure to load BL2 but also add a tzwdog timer 153 * which will reset the system eventually. 154 */ 155 ERROR("Failed to load BL2 firmware.\n"); 156 panic(); 157 } 158 /* 159 * Create a new layout of memory for BL2 as seen by BL1 i.e. 160 * tell it the amount of total and free memory available. 161 * This layout is created at the first free address visible 162 * to BL2. BL2 will read the memory layout before using its 163 * memory for other purposes. 164 */ 165 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; 166 bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); 167 168 bl1_plat_set_bl2_ep_info(&bl2_image_info, &bl2_ep); 169 bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout; 170 NOTICE("BL1: Booting BL2\n"); 171 INFO("BL1: BL2 address = 0x%llx\n", 172 (unsigned long long) bl2_ep.pc); 173 INFO("BL1: BL2 spsr = 0x%x\n", bl2_ep.spsr); 174 VERBOSE("BL1: BL2 memory layout address = 0x%llx\n", 175 (unsigned long long) bl2_tzram_layout); 176 177 bl1_run_bl2(&bl2_ep); 178 179 return; 180 } 181 182 /******************************************************************************* 183 * Temporary function to print the fact that BL2 has done its job and BL31 is 184 * about to be loaded. This is needed as long as printfs cannot be used 185 ******************************************************************************/ 186 void display_boot_progress(entry_point_info_t *bl31_ep_info) 187 { 188 NOTICE("BL1: Booting BL3-1\n"); 189 INFO("BL1: BL3-1 address = 0x%llx\n", 190 (unsigned long long)bl31_ep_info->pc); 191 INFO("BL1: BL3-1 spsr = 0x%llx\n", 192 (unsigned long long)bl31_ep_info->spsr); 193 INFO("BL1: BL3-1 params address = 0x%llx\n", 194 (unsigned long long)bl31_ep_info->args.arg0); 195 INFO("BL1: BL3-1 plat params address = 0x%llx\n", 196 (unsigned long long)bl31_ep_info->args.arg1); 197 } 198