| ff46a41d | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image
ESPRESSObin-Ultra TF-A build example was now just a copy+paste o
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image
ESPRESSObin-Ultra TF-A build example was now just a copy+paste of previous
mentioned example. It produced debug binary with custom log level, which
was not described. So rather replace this duplicate build example by a full
example with all steps how to build production release of Marvell firmware
image for EspressoBin with 1GHz CPU and 1GB DDR4 RAM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ief1b8bc96a3035ebd8421bd68dca5eb5c8d8fd52
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| f60f1e84 | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Fix description of flash-image.bin image
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I192acab2a7f42cd80069faeac2d7823a05558dc6 |
| 23abf07c | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Add information into CLOCKSPRESET option how to identify CPU frequency
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1 |
| 9c3fffdc | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Reformat DDR_TOPOLOGY option and mention EspressoBin-Ultra board
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a |
| 24e6e10b | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Move Supported Marvell platforms to PLAT build option
Reformat list of boards, remove unsupported OcteonTX2 and mention
supported Turris MOX board.
Signed-off-by: Pali Rohár <pali@ke
docs: marvell: Move Supported Marvell platforms to PLAT build option
Reformat list of boards, remove unsupported OcteonTX2 and mention
supported Turris MOX board.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563
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| 711a6bb7 | 27-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about WTMI_IMG option
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may
be misleading as this option does not specify full WTMI image, just a main
docs: marvell: Update info about WTMI_IMG option
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may
be misleading as this option does not specify full WTMI image, just a main
loop (e.g. fuse.bin or custom RTOS image) without hardware initialization
code (DDR, CPU and clocks).
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I3de4a27ce2165b962fa628c992fd8f80151efd7c
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| 33af2937 | 28-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about BOOTDEV=SATA
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id:
docs: marvell: Update info about BOOTDEV=SATA
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5f608e135ec56685a3e2b986a52670540d48a4bf
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| 8b920973 | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image
This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this
plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image
This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this change allows make to build
them in parallel.
Target mrvl_flash now builds only flash image and mrvl_uart only UART
image. This change reflects it also in the documentation.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3
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| 8708a884 | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
plat: marvell: armada: a3k: Allow use of the system Crypto++ library
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory path
plat: marvell: armada: a3k: Allow use of the system Crypto++ library
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory paths to
pre-compiled Crypto++ library and header files.
When both new parameters are specified then the source code of Crypto++ via
CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build
process to use system Crypto++ library.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b
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| 494be3ee | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about WTP and MV_DDR_PATH parameters
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Id5e36b7ba3a840cb3598c580e806b52d8e8dd70f |
| 26dccba6 | 27-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "scmi-msg" into integration
* changes:
doc: maintainers: add scmi server
drivers: move scmi-msg out of st |
| 70311692 | 26-Jan-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Fix documentation typos and misspellings" into integration |
| 1cea0213 | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches
Marvell finally started providing the latest version of mv-ddr-marvell and
A3700-utils-marvell code in master branch of their gi
docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches
Marvell finally started providing the latest version of mv-ddr-marvell and
A3700-utils-marvell code in master branch of their git repositories.
Reflect this in build instructions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I08d1189dac60eb2a28335c68f611c1da634106f6
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| 12b66a91 | 22-Jan-2021 |
Peng Fan <peng.fan@nxp.com> |
doc: maintainers: add scmi server
Add maintainer entry for scmi server
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I673d7395a8cea3b553832e330c8a8ce37f8c2a5c |
| 49e4a5fc | 24-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs: marvell: armada: Update MARVELL_PLATFORM list and build instructions" into integration |
| 47147013 | 21-Jan-2021 |
David Horstmann <david.horstmann@arm.com> |
Fix documentation typos and misspellings
Fix some typos and misspellings in TF-A documentation.
Signed-off-by: David Horstmann <david.horstmann@arm.com>
Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4
Fix documentation typos and misspellings
Fix some typos and misspellings in TF-A documentation.
Signed-off-by: David Horstmann <david.horstmann@arm.com>
Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4949909fa
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| 6b2924bb | 20-Jan-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ic9bacaf3,I99a18dbb,I34803060,I3ed55aa4,Ic8eed072, ... into integration
* changes:
doc: renesas: Update RZ/G2 code owner list
plat: renesas: rzg: DT memory node enhancements
rene
Merge changes Ic9bacaf3,I99a18dbb,I34803060,I3ed55aa4,Ic8eed072, ... into integration
* changes:
doc: renesas: Update RZ/G2 code owner list
plat: renesas: rzg: DT memory node enhancements
renesas: rzg: emmc: Enable RZ/G2M support
plat: renesas: rzg: Add HopeRun HiHope RZ/G2M board support
drivers: renesas: rzg: Add HiHope RZ/G2M board support
tools: renesas: Add tool support for RZ/G2 platforms
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| 6047a105 | 15-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I3c0a402f,I9ce5b9df,I08719015,If541278f,I99f1a697 into integration
* changes:
doc: renesas: Update code owner for Renesas platforms
doc: renesas: Document platforms based on RZ/G2
Merge changes I3c0a402f,I9ce5b9df,I08719015,If541278f,I99f1a697 into integration
* changes:
doc: renesas: Update code owner for Renesas platforms
doc: renesas: Document platforms based on RZ/G2 SoC's
renesas: rzg: Add PFC support for RZ/G2M
renesas: rzg: Add QoS support for RZ/G2M
renesas: rzg: Add support for DRAM initialization
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| 337e4933 | 14-Jan-2021 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes I36e4d672,I47610cee into integration
* changes:
Workaround for Cortex N1 erratum 1946160
Workaround for Cortex A78 erratum 1951500 |
| d0b367b7 | 14-Jan-2021 |
Luka Kovacic <luka.kovacic@sartura.hr> |
docs: marvell: armada: Update MARVELL_PLATFORM list and build instructions
The supported MARVELL_PLATFORM list is updated to include the recently added
a80x0_puzzle platform (IEI Puzzle-M801).
Addi
docs: marvell: armada: Update MARVELL_PLATFORM list and build instructions
The supported MARVELL_PLATFORM list is updated to include the recently added
a80x0_puzzle platform (IEI Puzzle-M801).
Additionally building instructions are added for the GST ESPRESSObin-Ultra
board (1 GB, DDR4 RAM variant), which has been tested successfully and booted
TF-A on the board.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Change-Id: Ie5724df27c1ee2e8f6a52664520579e872471e93
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| 263ee781 | 07-Oct-2020 |
johpow01 <john.powell@arm.com> |
Workaround for Cortex N1 erratum 1946160
Cortex N1 erratum 1946160 is a Cat B erratum present in r0p0, r1p0,
r2p0, r3p0, r3p1, r4p0, and r4p1. The workaround is to insert a DMB ST
before acquire at
Workaround for Cortex N1 erratum 1946160
Cortex N1 erratum 1946160 is a Cat B erratum present in r0p0, r1p0,
r2p0, r3p0, r3p1, r4p0, and r4p1. The workaround is to insert a DMB ST
before acquire atomic instructions without release semantics. This
issue is present starting from r0p0 but this workaround applies to
revisions r3p0, r3p1, r4p0, and r4p1, for previous revisions there is no
workaround.
SDEN can be found here:
https://documentation-service.arm.com/static/5fa9304cd8dacc30eded464f
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I36e4d6728c275f1c2477dcee9b351077cf7c53e4
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| 3a2710dc | 07-Oct-2020 |
johpow01 <john.powell@arm.com> |
Workaround for Cortex A78 erratum 1951500
Cortex A78 erratum 1951500 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1. The workaround is to insert a DMB ST before
acquire atomic in
Workaround for Cortex A78 erratum 1951500
Cortex A78 erratum 1951500 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1. The workaround is to insert a DMB ST before
acquire atomic instructions without release semantics. This workaround
works on revisions r1p0 and r1p1, in r0p0 there is no workaround.
SDEN can be found here:
https://documentation-service.arm.com/static/5fb66157ca04df4095c1cc2e
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I47610cee75af6a127ea65edc4d5cffc7e6a2d0a3
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| afda405b | 19-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
doc: renesas: Update RZ/G2 code owner list
Add Lad Prabhakar as the code owner for the newly added
RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Ic9bacaf31d653e1e
doc: renesas: Update RZ/G2 code owner list
Add Lad Prabhakar as the code owner for the newly added
RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Ic9bacaf31d653e1e553fa70043053805f56a2b84
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| d60642a4 | 19-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
doc: renesas: Update code owner for Renesas platforms
Add Marek Vasut as the code owner for the common code shared by
both Renesas R-Car and RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp
doc: renesas: Update code owner for Renesas platforms
Add Marek Vasut as the code owner for the common code shared by
both Renesas R-Car and RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: I3c0a402f4663ffcf4d2df408a3ccd4d1a8629b3a
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| 2bc48585 | 07-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
doc: renesas: Document platforms based on RZ/G2 SoC's
Document the platforms based on RZ/G2 SoC's.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev
doc: renesas: Document platforms based on RZ/G2 SoC's
Document the platforms based on RZ/G2 SoC's.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I9ce5b9df3573b1198c5c7be79b5471d54573609a
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