feat(qti): platform support for qcs615

Change-Id: Ibbe78a196d77530fa9d94d7d12b2f08a4b66d62e
Signed-off-by: Amarinder Singh Sethi <quic_assethi@quicinc.com>

feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add ti

feat(mt8196): initialize platform for MediaTek MT8196

- Add basic platform setup.
- Add MT8196 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
- Add timer driver configuration.

Change-Id: I07fcdeb785fcda4a955c11c39a345da4ad05ef04
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge changes from topic "rd1ae-bl32" into integration

* changes:
feat(rd1ae): add Generic Timer in device tree
docs(rd1ae): update documentation to include BL32
feat(rd1ae): add support for O

Merge changes from topic "rd1ae-bl32" into integration

* changes:
feat(rd1ae): add Generic Timer in device tree
docs(rd1ae): update documentation to include BL32
feat(rd1ae): add support for OP-TEE SPMC

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docs(rd1ae): update documentation to include BL32

Update the boot sequence in the RD-1 AE documentation
to include BL32 (OP-TEE).

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
Change-Id: I25

docs(rd1ae): update documentation to include BL32

Update the boot sequence in the RD-1 AE documentation
to include BL32 (OP-TEE).

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
Change-Id: I25fdc114bb71d3ad7e1bb2d845f758d6af037e3d

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Merge "fix(docs): fix the indent and the build command for MT8188" into integration

Merge "docs(tc): deprecate tc2 in documentation" into integration

docs(tc): deprecate tc2 in documentation

added a note to specify that tc2 has been deprecated

Change-Id: I7ab69a2560e0e56379f4e144d41da20671c1ca9d
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>

docs(fvp): update FVP model versions as per usage

Update the documentation to reflect the various FVP models
used in the OpenCI environment.

Change-Id: I6144ab7c41d3776421164125d07371dadc9252b5
Sig

docs(fvp): update FVP model versions as per usage

Update the documentation to reflect the various FVP models
used in the OpenCI environment.

Change-Id: I6144ab7c41d3776421164125d07371dadc9252b5
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs(juno): update Juno tested SCP version to 2.15

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I29452d0abadf9b5980ca9680ca2c78080c4c33a0

fix(docs): fix the indent and the build command for MT8188

This patch includes
- Fix the indent.
- LD argument is no longer needed. Remove LD parameter from the build
command.

Change-Id: I615704c

fix(docs): fix the indent and the build command for MT8188

This patch includes
- Fix the indent.
- LD argument is no longer needed. Remove LD parameter from the build
command.

Change-Id: I615704cf6f4b6fd9e37c047b18c40f00652e269d
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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docs: deprecate Arm TC2 FVP platform

Arm has made the strategic decision to deprecate the TC2 platform. As
a result, software development and the creation of fast models for TC2
have been officially

docs: deprecate Arm TC2 FVP platform

Arm has made the strategic decision to deprecate the TC2 platform. As
a result, software development and the creation of fast models for TC2
have been officially discontinued. The TC2 platform, now considered
obsolete, has been succeeded by the TC3 and TC4 platforms. Notably,
both TC3 and TC4 are already integrated into TF-A, with TC3 included
in the CI repository. Work to add CI support for TC4 is currently in
progress.

Change-Id: I4df3c3e947faa1849a0f4742593c604cb2ee43b9
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "rd1ae-upstream" into integration

* changes:
docs(rd1ae): add RD-1 AE documentation
feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE
feat(rd1ae): introduce BL

Merge changes from topic "rd1ae-upstream" into integration

* changes:
docs(rd1ae): add RD-1 AE documentation
feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE
feat(rd1ae): introduce BL31 for RD-1 AE platform
feat(rd1ae): add device tree files
feat(rd1ae): introduce Arm RD-1 AE platform
build(bl2): enable check for bl2 base overflow assert
feat(arm): add support for loading CONFIG from BL2

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docs(rd1ae): add RD-1 AE documentation

Documenting RD-1 AE features, boot sequence, and build
procedure.

Signed-off-by: Divin Raj <divin.raj@arm.com>
Change-Id: Ie93438931e9ead42a2a6dd2d752d37bc06f

docs(rd1ae): add RD-1 AE documentation

Documenting RD-1 AE features, boot sequence, and build
procedure.

Signed-off-by: Divin Raj <divin.raj@arm.com>
Change-Id: Ie93438931e9ead42a2a6dd2d752d37bc06fa2e32

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feat(arm): add support for loading CONFIG from BL2

This commit introduces a new ARM platform-specific build option called
`ARM_FW_CONFIG_LOAD_ENABLE`. This option enables the loading of the
`fw_conf

feat(arm): add support for loading CONFIG from BL2

This commit introduces a new ARM platform-specific build option called
`ARM_FW_CONFIG_LOAD_ENABLE`. This option enables the loading of the
`fw_config` device tree when resetting to the BL2 scenario.

Additionally, the FW_CONFIG image reference has been added to the
fdts/tbbr_cot_descriptors.dtsi file in order to use in the scenario of
RESET_TO_BL2.

Signed-off-by: Divin Raj <divin.raj@arm.com>
Change-Id: I11de497b7dbb1386ed84d939d6fd2a11856e9e1b

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fix(s32g274a): workaround for ERR051700 erratum

ERR051700 erratum is present on all S32CC-based SoCs and relates to
reset. Releasing multiple Software Resettable Domains (SRDs) from
reset simultaneo

fix(s32g274a): workaround for ERR051700 erratum

ERR051700 erratum is present on all S32CC-based SoCs and relates to
reset. Releasing multiple Software Resettable Domains (SRDs) from
reset simultaneously, may cause a false error in the fault control
unit.

The workaround is to clear the SRD resets sequentially instead of
simultaneously.

Change-Id: I883bc223bf6834907259e6964a5702d7186e4c7f
Signed-off-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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feat(stm32mp2): manage DDR FW via FIP

This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE.

DDR firmware binary is loaded from FIP to SRAM1 which needs to be
mapped.
Only half of the

feat(stm32mp2): manage DDR FW via FIP

This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE.

DDR firmware binary is loaded from FIP to SRAM1 which needs to be
mapped.
Only half of the SRAM1 will be allocated to TF-A.
RISAB3 has to be configured to allow access to SRAM1.
Add image ID and update maximum number on platform side also.

Fill related descriptor information, add policy and update numbers.
DDR_TYPE variable is used to identify binary file, and image is now
added in the fiptool command line.

The DDR PHY firmware is not in TF-A repository. It can be found at
https://github.com/STMicroelectronics/stm32-ddr-phy-binary
To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added
to platform.mk file.

Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4

feat(rk3588): support rk3588

rk3588 is an Octa-core soc with Cortex-a55/a76 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I598109f15a2efd5b33aedd176cf708c08cb1dcf4

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Merge "feat(versal): deprecate build time arg VERSAL_PLATFORM" into integration

docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.bud

docs(xilinx): update SMC documentation in TF-A

Updated documentation for new SMC SiP calling conventions for Platform
Management specific SiP Service calls.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iee09d3d843c6bb3f82aad6df703542ba1eb63c6c

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feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionalit

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionality for identifying the board variant during
runtime, allowing dynamic adjustment of CPU and UART clock values
accordingly.
Print the runtime board information during boot.
This advancement streamlines the build process by eliminating
dependencies on variant-specific builds, enabling the use of a single
binary for multiple variants.
Removing all the platform related constants for versal_virt,SPP,EMU as
they are not used.

Change-Id: I8c1a1d391bd1a8971addc1f56f8309a3fb75aa6d
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(docs): fix CPU type for mt8195

MT8195 features four Cortex-A78 cores not Cortex-A76.

Change-Id: I62c60373e7a3e570bcadaeaf065ca0f7473cb838
Signed-off-by: Yidi Lin <yidilin@chromium.org>

feat(docs): add STM32MP2 docs links

Add links to official STMicroelectronics documentation (STM32MP2
series presentation and wiki).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id:

feat(docs): add STM32MP2 docs links

Add links to official STMicroelectronics documentation (STM32MP2
series presentation and wiki).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2fca0da56bc6064c222df34493921dff3e119a22

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docs(stm32mp2): correct STM32MP2 frequencies

STM32MP25xA & STM32MP25xC versions run at 1.2GHz.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I75aea682c8e3fa89e7ac1347bb7f9d02

docs(stm32mp2): correct STM32MP2 frequencies

STM32MP25xA & STM32MP25xC versions run at 1.2GHz.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I75aea682c8e3fa89e7ac1347bb7f9d02f2086222

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docs(fvp): update FVP versions used

Patch series:
https://review.trustedfirmware.org/q/hashtag:%22fvp_migration_11_26%22+(status:open%20OR%20status:merged)

Migrated FVP's to use version 11.26.11 an

docs(fvp): update FVP versions used

Patch series:
https://review.trustedfirmware.org/q/hashtag:%22fvp_migration_11_26%22+(status:open%20OR%20status:merged)

Migrated FVP's to use version 11.26.11 and 11.24.24, also removed
some model testing that are now no more available with newer model
configuration.

Change-Id: Ib93a7148270e2b6fb356a631dcc36061c7c8341c
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge "feat(versal2): add support for AMD Versal Gen 2 platform" into integration