1# 2# Copyright (c) 2024, Rockchip, Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7RK_PLAT := plat/rockchip 8RK_PLAT_SOC := ${RK_PLAT}/${PLAT} 9RK_PLAT_COMMON := ${RK_PLAT}/common 10 11DISABLE_BIN_GENERATION := 1 12include lib/libfdt/libfdt.mk 13include lib/xlat_tables_v2/xlat_tables.mk 14 15# GIC-600 configuration 16GICV3_IMPL := GIC600 17GICV3_SUPPORT_GIC600 := 1 18 19# Include GICv3 driver files 20include drivers/arm/gic/v3/gicv3.mk 21 22PLAT_INCLUDES := -Iinclude/plat/common \ 23 -Idrivers/arm/gic/v3/ \ 24 -I${RK_PLAT_COMMON}/ \ 25 -I${RK_PLAT_COMMON}/drivers/pmu/ \ 26 -I${RK_PLAT_COMMON}/drivers/parameter/ \ 27 -I${RK_PLAT_COMMON}/include/ \ 28 -I${RK_PLAT_COMMON}/pmusram/ \ 29 -I${RK_PLAT_SOC}/ \ 30 -I${RK_PLAT_SOC}/drivers/pmu/ \ 31 -I${RK_PLAT_SOC}/drivers/secure/ \ 32 -I${RK_PLAT_SOC}/drivers/soc/ \ 33 -I${RK_PLAT_SOC}/include/ 34 35RK_GIC_SOURCES := ${GICV3_SOURCES} \ 36 plat/common/plat_gicv3.c \ 37 ${RK_PLAT}/common/rockchip_gicv3.c 38 39PLAT_BL_COMMON_SOURCES := ${XLAT_TABLES_LIB_SRCS} \ 40 common/desc_image_load.c \ 41 plat/common/aarch64/crash_console_helpers.S \ 42 lib/bl_aux_params/bl_aux_params.c \ 43 plat/common/plat_psci_common.c 44 45ifneq (${ENABLE_STACK_PROTECTOR},0) 46PLAT_BL_COMMON_SOURCES += ${RK_PLAT_COMMON}/rockchip_stack_protector.c 47endif 48 49BL31_SOURCES += ${RK_GIC_SOURCES} \ 50 drivers/ti/uart/aarch64/16550_console.S \ 51 drivers/delay_timer/delay_timer.c \ 52 drivers/delay_timer/generic_delay_timer.c \ 53 lib/cpus/aarch64/cortex_a55.S \ 54 lib/cpus/aarch64/cortex_a76.S \ 55 ${RK_PLAT_COMMON}/aarch64/plat_helpers.S \ 56 ${RK_PLAT_COMMON}/aarch64/platform_common.c \ 57 ${RK_PLAT_COMMON}/bl31_plat_setup.c \ 58 ${RK_PLAT_COMMON}/plat_pm.c \ 59 ${RK_PLAT_COMMON}/plat_pm_helpers.c \ 60 ${RK_PLAT_COMMON}/plat_topology.c \ 61 ${RK_PLAT_COMMON}/params_setup.c \ 62 ${RK_PLAT_COMMON}/pmusram/cpus_on_fixed_addr.S \ 63 ${RK_PLAT_COMMON}/rockchip_sip_svc.c \ 64 ${RK_PLAT_SOC}/plat_sip_calls.c \ 65 ${RK_PLAT_SOC}/drivers/secure/secure.c \ 66 ${RK_PLAT_SOC}/drivers/soc/soc.c \ 67 ${RK_PLAT_SOC}/drivers/pmu/pmu.c \ 68 ${RK_PLAT_SOC}/drivers/pmu/pm_pd_regs.c 69 70CTX_INCLUDE_AARCH32_REGS := 0 71ENABLE_PLAT_COMPAT := 0 72MULTI_CONSOLE_API := 1 73ERRATA_A55_1530923 := 1 74 75# System coherency is managed in hardware 76HW_ASSISTED_COHERENCY := 1 77 78# When building for systems with hardware-assisted coherency, there's no need to 79# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 80USE_COHERENT_MEM := 0 81 82ENABLE_SPE_FOR_LOWER_ELS := 0 83 84$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 85$(eval $(call add_define,PLAT_SKIP_DFS_TLB_DCACHE_MAINTENANCE)) 86