| e8e7cdf3 | 11-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
docs(zynqmp): update the make command
Update the make command with the RESET_TO_BL31=1 addition.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46cc81abb5397737
docs(zynqmp): update the make command
Update the make command with the RESET_TO_BL31=1 addition.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46cc81abb539773706348464b3061d20d94522e9
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| a0d3df66 | 25-Apr-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(fvp): specify correct reference of the hw_config address
TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Henc
docs(fvp): specify correct reference of the hw_config address
TB_FW_CONFIG DT no longer contains the address of HW_CONFIG; it has
been moved to the FW_CONFIG DT since the introduction of FCONF.
Hence updated the documentation accordingly.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I37b68502a89dbd521acd99f2cb3aeb0bd36a04e0
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| 6e4e294a | 24-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
docs(layerscape): add ls1088a soc and board support
Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.
Signed-off-by: Jiafei Pan <Jiafei.P
docs(layerscape): add ls1088a soc and board support
Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ic7fdc7b1bbf22e50646991093366a88ee523ffe3
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| 2ff6a49e | 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2
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| bdec516e | 18-Dec-2020 |
Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com> |
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can b
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no
Cortex-M4.
There is only one DDR port.
SP_min is not supported, only OP-TEE can be used as monitor.
STM32MP13 uses the header v2.0 format for stm32image generation
for BL2.
Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 19a2d518 | 16-Mar-2022 |
Pali Rohár <pali@kernel.org> |
docs(a3k): update documentation about DEBUG mode for UART
DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem proto
docs(a3k): update documentation about DEBUG mode for UART
DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem protocol
like it was written before, because Armada 37xx UART images do not print
anything on UART during image transfer and A7K/A8K/CN913x BLE image
automatically turn off debugging output when booting over UART. Looks
like this incorrect information is some relict from the past.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I85adc3c21036656b4620c4692e04330cad11ea2f
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| 99887cb9 | 02-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 11520
refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243
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| 975cf6ff | 03-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
docs(stm32mp1): document some compilation flags
Add missing serial boot devices flags.
Add optional compilation flags, and their defauld values.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Ch
docs(stm32mp1): document some compilation flags
Add missing serial boot devices flags.
Add optional compilation flags, and their defauld values.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I507f7110bcd7b9af136a6fc6b8af342b084c8dbc
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| e76b018f | 23-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs(a3k): add information about system-wide Crypto++ library" into integration |
| 1776d409 | 21-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "paulliu-imx8m-eventlog" into integration
* changes:
docs(imx8m): update for measured boot for imx8mm
feat(plat/imx/imx8m/imx8mm): add support for measured boot |
| a809a602 | 18-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs(a3k): fix information about SATA GPT booting" into integration |
| 1b33b58b | 17-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "ls1046a" into integration
* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046a
Merge changes from topic "ls1046a" into integration
* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046afrwy board support
feat(ls1046ardb): add ls1046ardb board support
feat(ls1046a): add new SoC platform ls1046a
fix(nxp-tools): fix tool location path for byte_swape
fix(nxp-qspi): fix include path for QSPI driver
build(changelog): add new scopes for NXP layerscape platforms
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| 27bc2936 | 16-Feb-2022 |
Pali Rohár <pali@kernel.org> |
docs(a3k): add information about system-wide Crypto++ library
On Debian systems it is possible to use system-wide Crypto++ library.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d93767
docs(a3k): add information about system-wide Crypto++ library
On Debian systems it is possible to use system-wide Crypto++ library.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d
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| a3aeb4c8 | 28-Jan-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
docs(layerscape): add ls1046a soc and board support
Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.
Also update maintainer of ls1046a platforms.
Si
docs(layerscape): add ls1046a soc and board support
Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.
Also update maintainer of ls1046a platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I522f978bc93aa8d1f1d60fa8efef392b7d854df7
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| 2f452974 | 14-Feb-2022 |
Pali Rohár <pali@kernel.org> |
docs(a3k): fix information about SATA GPT booting
Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition na
docs(a3k): fix information about SATA GPT booting
Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition name. It does not check for "MARVELL BOOT PARTITION".
This fact is incorrectly documented even in official Marvell Armada 3700
Functional Specification.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I35279f39de2d12148fc16f2730a9a074dc0b58eb
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|
| 0260eb0d | 19-Jan-2022 |
Vishnu Banavath <vishnu.banavath@arm.com> |
build(corstone1000): rename diphda to corstone1000
diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.
Change-Id
build(corstone1000): rename diphda to corstone1000
diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.
Change-Id: I330f3a112d232b99b4721b6bf0236253b068dbba
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
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| 10bf3d7c | 15-Nov-2021 |
Ying-Chun Liu (PaulLiu) <paulliu@debian.org> |
docs(imx8m): update for measured boot for imx8mm
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: Ib313dc1ffac2fc5d04e0779c9f059236a71e65e7 |
| fa145398 | 01-Dec-2021 |
Stephan Gerhold <stephan@gerhold.net> |
docs(msm8916): new port for Qualcomm Snapdragon 410
The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM891
docs(msm8916): new port for Qualcomm Snapdragon 410
The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM8916, APQ8016(E), ...) that are all very similar. A popular device
based on APQ8016E is the DragonBoard 410c single-board computer,
but the SoC is also used in various mid-range smartphones/tablets.
This commit adds documentation for a minimal, community-maintained port
of TF-A/BL31 for MSM8916. The actual platform port is added in the
following four separate small commits to simplify the review process.
The code is primarily based on the information from the public
Snapdragon 410E Technical Reference Manual [1], combined with a lot of
trial and error to actually make it work.
Note that this port is a pure community effort without any
commercial interests and is not related to Qualcomm in any way.
The main motivation for this port is to have a minimal, updatable
firmware since this old chip does not receive many updates anymore from
Qualcomm. It works quite well for many use cases so I am willing to
maintain it as a "code owner". I have also added Nikita Travkin as
second code owner to help with reviews.
The main limitation so far is the lack of memory protection for TF-A.
This is similar to the ports for the Raspberry Pi but in this case not
a lack of hardware support but rather a lack of documentation. However,
this does not limit the usefulness of the port when used as a minimal
PSCI implementation.
[1]: https://developer.qualcomm.com/download/sd410/snapdragon-410e-technical-reference-manual.pdf
Change-Id: I676adf86061638cfc2f3ae8615470d145e84f172
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| 168a2012 | 22-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
docs(plat/nxp/layerscape): add ls1043a soc and board support
Update document for nxp-layerscape to add ls1043a SoC and ls1043ardb
board support.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Chang
docs(plat/nxp/layerscape): add ls1043a soc and board support
Update document for nxp-layerscape to add ls1043a SoC and ls1043ardb
board support.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8442daf08a0f7c1ba982a3ed1d0ad24c4c420185
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| ff4ec0a0 | 22-Oct-2021 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
refactor(plat/ls1043): remove old implementation for platform ls1043
Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layer
refactor(plat/ls1043): remove old implementation for platform ls1043
Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layerscape platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If038c19ab04d70050ec8e6ab2097b1c4f8324e87
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| f2b2cc14 | 27-Dec-2021 |
Andre Przywara <andre.przywara@arm.com> |
docs(allwinner): update SoC list and build options
Our list of possible Allwinner build targets was missing the newly
introduced R329 support. Fix that by adding a table with maps the SoC
names to t
docs(allwinner): update SoC list and build options
Our list of possible Allwinner build targets was missing the newly
introduced R329 support. Fix that by adding a table with maps the SoC
names to the build target names.
Also add some explanation about the recently introduced PSCI power
management providers.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Icf5e304562c3082552bf08d7b26904caf9074936
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|
| aa616990 | 27-Dec-2021 |
Andre Przywara <andre.przywara@arm.com> |
docs(allwinner): add SUNXI_SETUP_REGULATORS build option
Document the newly introduced SUNXI_SETUP_REGULATORS build option, that
allows to disable PMIC regulator setup at build time.
Signed-off-by:
docs(allwinner): add SUNXI_SETUP_REGULATORS build option
Document the newly introduced SUNXI_SETUP_REGULATORS build option, that
allows to disable PMIC regulator setup at build time.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ie5fb0b7220426b67cfffc95df4cabb31a6ec174a
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|
| 27132f13 | 28-Sep-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(mt8186): initialize platform for MediaTek MT8186
- Add basic platform setup.
- Add MT8186 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
TEST=bu
feat(mt8186): initialize platform for MediaTek MT8186
- Add basic platform setup.
- Add MT8186 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Id3e2f46a8c3ab2f3e29137e508d4c671e8f4aad5
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| f6f1b9b8 | 25-Oct-2021 |
Maksims Svecovs <maksims.svecovs@arm.com> |
chore(docs): update supported FVP models doc
Update supported models list according to changes for v2.6 release in
ci/tf-a-ci-scripts repository:
* general FVP model update: d10c1b9
* gic600 update:
chore(docs): update supported FVP models doc
Update supported models list according to changes for v2.6 release in
ci/tf-a-ci-scripts repository:
* general FVP model update: d10c1b9
* gic600 update: aa2548a
* CSS prebults model update: f1c3a4f
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
Change-Id: If2841f05238facb3cace7d5c8a78083d54f35e27
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| 50088851 | 21-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
docs(stm32mp1): fix FIP command with OP-TEE
When building a FIP with OP-TEE as BL32 on STM32MP1, AARCH32_SP=optee
has to be added to the make command.
Change-Id: I900c01957fe4ed7ed13ca955edd91ed1c5
docs(stm32mp1): fix FIP command with OP-TEE
When building a FIP with OP-TEE as BL32 on STM32MP1, AARCH32_SP=optee
has to be added to the make command.
Change-Id: I900c01957fe4ed7ed13ca955edd91ed1c5c5c4fa
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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