Merge pull request #240 from danh-arm/sm/rem_coh_mem

Remove coherent memory v2

Remove coherent memory from the BL memory maps

This patch extends the build option `USE_COHERENT_MEMORY` to
conditionally remove coherent memory from the memory maps of
all boot loader stages. The p

Remove coherent memory from the BL memory maps

This patch extends the build option `USE_COHERENT_MEMORY` to
conditionally remove coherent memory from the memory maps of
all boot loader stages. The patch also adds necessary
documentation for coherent memory removal in firmware-design,
porting and user guides.

Fixes ARM-Software/tf-issues#106

Change-Id: I260e8768c6a5c2efc402f5804a80657d8ce38773

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Merge pull request #212 from jcastillo-arm/jc/tf-issues/252

Fix LENGTH attribute value in linker scripts

Fix LENGTH attribute value in linker scripts

This patch fixes the incorrect value of the LENGTH attribute in
the linker scripts. This attribute must define the memory size, not
the limit address.

F

Fix LENGTH attribute value in linker scripts

This patch fixes the incorrect value of the LENGTH attribute in
the linker scripts. This attribute must define the memory size, not
the limit address.

Fixes ARM-software/tf-issues#252

Change-Id: I328c38b9ec502debe12046a8912d7dfc54610c46

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Merge pull request #184 from jcastillo-arm/jc/tf-issues/100

FVP: make usage of Trusted DRAM optional at build time

FVP: apply new naming conventions to memory regions

Secure ROM at address 0x0000_0000 is defined as FVP_TRUSTED_ROM
Secure RAM at address 0x0400_0000 is defined as FVP_TRUSTED_SRAM
Secure RAM at add

FVP: apply new naming conventions to memory regions

Secure ROM at address 0x0000_0000 is defined as FVP_TRUSTED_ROM
Secure RAM at address 0x0400_0000 is defined as FVP_TRUSTED_SRAM
Secure RAM at address 0x0600_0000 is defined as FVP_TRUSTED_DRAM

BLn_BASE and BLn_LIMIT definitions have been updated and are based on
these new memory regions.

The available memory for each bootloader in the linker script is
defined by BLn_BASE and BLn_LIMIT, instead of the complete memory
region.

TZROM_BASE/SIZE and TZRAM_BASE/SIZE are no longer required as part of
the platform porting.

FVP common definitions are defined in fvp_def.h while platform_def.h
contains exclusively (with a few exceptions) the definitions that are
mandatory in the porting guide. Therefore, platform_def.h now includes
fvp_def.h instead of the other way around.

Porting guide has been updated to reflect these changes.

Change-Id: I39a6088eb611fc4a347db0db4b8f1f0417dbab05

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Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4

Split platform.h into separate headers

Previously, platform.h contained many declarations and definitions
used for different purposes. This file has been split so that:

* Platform definitions used

Split platform.h into separate headers

Previously, platform.h contained many declarations and definitions
used for different purposes. This file has been split so that:

* Platform definitions used by common code that must be defined
by the platform are now in platform_def.h. The exact include
path is exported through $PLAT_INCLUDES in the platform makefile.

* Platform definitions specific to the FVP platform are now in
/plat/fvp/fvp_def.h.

* Platform API declarations specific to the FVP platform are now
in /plat/fvp/fvp_private.h.

* The remaining platform API declarations that must be ported by
each platform are still in platform.h but this file has been
moved to /include/plat/common since this can be shared by all
platforms.

Change-Id: Ieb3bb22fbab3ee8027413c6b39a783534aee474a

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Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2

Make the memory layout more flexible

Currently the platform code gets to define the base address of each
boot loader image. However, the linker scripts couteract this
flexibility by enforcing a fixe

Make the memory layout more flexible

Currently the platform code gets to define the base address of each
boot loader image. However, the linker scripts couteract this
flexibility by enforcing a fixed overall layout of the different
images. For example, they require that the BL3-1 image sits below
the BL2 image. Choosing BL3-1 and BL2 base addresses in such a way
that it violates this constraint makes the build fail at link-time.

This patch requires the platform code to now define a limit address
for each image. The linker scripts check that the image fits within
these bounds so they don't rely anymore on the position of a given
image in regard to the others.

Fixes ARM-software/tf-issues#163

Change-Id: I8c108646825da19a6a8dfb091b613e1dd4ae133c

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Merge pull request #36 from athoelke/at/gc-sections-80

Using GCC --gc-sections to eliminate unused code and data

Use --gc-sections during link

All common functions are being built into all binary images,
whether or not they are actually used. This change enables the
use of -ffunction-sections, -fdata-sections

Use --gc-sections during link

All common functions are being built into all binary images,
whether or not they are actually used. This change enables the
use of -ffunction-sections, -fdata-sections and --gc-sections
in the compiler and linker to remove unused code and data from
the images.

Change-Id: Ia9f78c01054ac4fa15d145af38b88a0d6fb7d409

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Specify image entry in linker script

At present, the entry point for each BL image is specified via the
Makefiles and provided on the command line to the linker. When using a
link script the entry p

Specify image entry in linker script

At present, the entry point for each BL image is specified via the
Makefiles and provided on the command line to the linker. When using a
link script the entry point should rather be specified via the ENTRY()
directive in the link script.

This patch updates linker scripts of all BL images to specify the entry
point using the ENTRY() directive. It also removes the --entry flag
passed to the linker through Makefile.

Fixes issue ARM-software/tf-issues#66

Change-Id: I1369493ebbacea31885b51185441f6b628cf8da0

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Remove duplicate xlat_table descriptions

The BL31 and BL2 linker scripts ended up having duplicate descriptions
for xlat_tables section. This patch removes those duplicate
descriptions.

Change-Id:

Remove duplicate xlat_table descriptions

The BL31 and BL2 linker scripts ended up having duplicate descriptions
for xlat_tables section. This patch removes those duplicate
descriptions.

Change-Id: Ibbdda0902c57fca5ea4e91e0baefa6df8f0a9bb1

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Factor out translation table setup in ARM FVP port

This patch factors out the ARM FVP specific code to create MMU
translation tables so that it is possible for a boot loader stage to
create a differ

Factor out translation table setup in ARM FVP port

This patch factors out the ARM FVP specific code to create MMU
translation tables so that it is possible for a boot loader stage to
create a different set of tables instead of using the default ones.
The default translation tables are created with the assumption that
the calling boot loader stage executes out of secure SRAM. This might
not be true for the BL3_2 stage in the future.

A boot loader stage can define the `fill_xlation_tables()` function as
per its requirements. It returns a reference to the level 1
translation table which is used by the common platform code to setup
the TTBR_EL3.

This patch is a temporary solution before a larger rework of
translation table creation logic is introduced.

Change-Id: I09a075d5da16822ee32a411a9dbe284718fb4ff6

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Setup VBAR_EL3 incrementally

This patch ensures that VBAR_EL3 points to the simple stack-less
'early_exceptions' when the C runtime stack is not correctly setup to
use the more complex 'runtime_exce

Setup VBAR_EL3 incrementally

This patch ensures that VBAR_EL3 points to the simple stack-less
'early_exceptions' when the C runtime stack is not correctly setup to
use the more complex 'runtime_exceptions'. It is initialised to
'runtime_exceptions' once this is done.

This patch also moves all exception vectors into a '.vectors' section
and modifies linker scripts to place all such sections together. This
will minimize space wastage from alignment restrictions.

Change-Id: I8c3e596ea3412c8bd582af9e8d622bb1cb2e049d

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Move translation tables into separate section

This patch moves the translation tables into their own section. This
saves space that would otherwise have been lost in padding due to page
table alignm

Move translation tables into separate section

This patch moves the translation tables into their own section. This
saves space that would otherwise have been lost in padding due to page
table alignment constraints. The BL31 and BL32 bases have been
consequently adjusted.

Change-Id: Ibd65ae8a5ce4c4ea9a71a794c95bbff40dc63e65

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Update year in copyright text to 2014

Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60

Enable third party contributions

- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c8

Enable third party contributions

- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5

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Various improvements/cleanups on the linker scripts

- Check at link-time that bootloader images will fit in memory
at run time and that they won't overlap each other.
- Remove text and rodat

Various improvements/cleanups on the linker scripts

- Check at link-time that bootloader images will fit in memory
at run time and that they won't overlap each other.
- Remove text and rodata orphan sections.
- Define new linker symbols to remove the need for platform setup
code to know the order of sections.
- Reduce the size of the raw binary images by cutting some sections
out of the disk image and allocating them at load time, whenever
possible.
- Rework alignment constraints on sections.
- Remove unused linker symbols.
- Homogenize linker symbols names across all BLs.
- Add some comments in the linker scripts.

Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9

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ARMv8 Trusted Firmware release v0.2