| e885351c | 04-Jul-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: fix incorrect use of error code
Fix incorrect use of memory-related error code in hash algorithm.
Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algo
drivers: crypto: hisilicon: fix incorrect use of error code
Fix incorrect use of memory-related error code in hash algorithm.
Fixes: 94c8a3397ec4 ("drivers: crypto: hisilicon:Add HASH and HMAC algorithm") Signed-off-by: leisen <leisen1@huawei.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 562874be | 26-May-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: Add cipher algorithm
Add DES, 3DES, AES and SM4 cipher algorithm
Signed-off-by: leisen <leisen1@huawei.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by
drivers: crypto: hisilicon: Add cipher algorithm
Add DES, 3DES, AES and SM4 cipher algorithm
Signed-off-by: leisen <leisen1@huawei.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 63d9f596 | 11-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm32: force CFG_LPAE_ADDR_SPACE_BITS=32
AArch32/Arm7 can only use 32 bits for virtual addresses so force that configuration to avoid inconsistencies.
Signed-off-by: Jens Wiklander <jens.wikl
core: arm32: force CFG_LPAE_ADDR_SPACE_BITS=32
AArch32/Arm7 can only use 32 bits for virtual addresses so force that configuration to avoid inconsistencies.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d8e39169 | 26-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mmu_v7: remove non-working ns-virtualization
Removes the nonworking CFG_NS_VIRTUALIZATION code from core_mmu_v7.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by:
core: arm: mmu_v7: remove non-working ns-virtualization
Removes the nonworking CFG_NS_VIRTUALIZATION code from core_mmu_v7.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e7f046f3 | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mobj_phys_alloc(): remove unused memory types
In mobj_phys_alloc() remove support for the two unused memory types CORE_MEM_TEE_RAM and CORE_MEM_TA_RAM.
Signed-off-by: Jens Wiklander <jens.wik
core: mobj_phys_alloc(): remove unused memory types
In mobj_phys_alloc() remove support for the two unused memory types CORE_MEM_TEE_RAM and CORE_MEM_TA_RAM.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8c95493b | 08-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove unused mobj_sec_ddr
Remove the unused global variable mobj_sec_ddr.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.co
core: remove unused mobj_sec_ddr
Remove the unused global variable mobj_sec_ddr.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 196c08bb | 23-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: remove unused map_memarea_sections()
Remove the unused function map_memarea_sections().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etien
core: arm: mm: remove unused map_memarea_sections()
Remove the unused function map_memarea_sections().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| dca16d07 | 17-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: increase tmp stack for CFG_NS_VIRTUALIZATION
CFG_NS_VIRTUALIZATION requires slightly more stack when enabled so add that to the group of conditions using the larger tmp stack.
Signed-off
core: arm: increase tmp stack for CFG_NS_VIRTUALIZATION
CFG_NS_VIRTUALIZATION requires slightly more stack when enabled so add that to the group of conditions using the larger tmp stack.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 88422dbc | 12-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: leverage qsort_int() in PMIC driver
Use recently added qsort_int() helper function.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.w
plat-stm32mp1: leverage qsort_int() in PMIC driver
Use recently added qsort_int() helper function.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 932059bf | 12-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: pager use SYSRAM last page if possible
Update stm32mp1 with pager TZSRAM size to use SYSRAM last page now that pager implementation issue pager pageable boundary is addressed.
Signed
plat-stm32mp1: pager use SYSRAM last page if possible
Update stm32mp1 with pager TZSRAM size to use SYSRAM last page now that pager implementation issue pager pageable boundary is addressed.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bfb714a2 | 10-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: mm: ensure all pager VA space is mapped with small pages
Fix can_map_at_level() to ensure all memory areas related the pager pageable virtual memory are mapped with small pages. This change fi
core: mm: ensure all pager VA space is mapped with small pages
Fix can_map_at_level() to ensure all memory areas related the pager pageable virtual memory are mapped with small pages. This change fixes an issue found when the pager physical RAM ends on a section boundary (e.g. 512MB or 2MB on LPAE case) making the virtual memory mapping above that boundary to be prepared with pgdir or wider MMU tables while pager implementation expects 4kB page MMU tables.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e5500ff7 | 02-Jul-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32: add an error trace when registering CRYP and SAES
Drvcrypt framework can only register one symmetric cipher driver. Add an explicit error trace in function stm32_register_cip
drivers: crypto: stm32: add an error trace when registering CRYP and SAES
Drvcrypt framework can only register one symmetric cipher driver. Add an explicit error trace in function stm32_register_cipher() when several cipher drivers are registered.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 34c834fd | 22-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
drivers: crypto: stm32_saes: SAES depends on RNG clock
Fixes missing dependency of SAES device on RNG clock.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Thomas Bou
drivers: crypto: stm32_saes: SAES depends on RNG clock
Fixes missing dependency of SAES device on RNG clock.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 4cadf74b | 04-Mar-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: add SAES dependency on RNG clock for stm32mp13
Adds missing RNG clock resource in SAES and PKA nodes in stm32mp13 SoC DTSI files.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st
dts: stm32: add SAES dependency on RNG clock for stm32mp13
Adds missing RNG clock resource in SAES and PKA nodes in stm32mp13 SoC DTSI files.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 45fef32a | 31-Aug-2023 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: crypto: stm32_saes: add PM to SAES driver
Add power management support to the SAES driver through suspend/resume callbacks.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> S
drivers: crypto: stm32_saes: add PM to SAES driver
Add power management support to the SAES driver through suspend/resume callbacks.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| b32598bf | 29-Jun-2024 |
Zexi Yu <yuzexi@hisilicon.com> |
driver: crypto: hisilicon: add ECC gen_keypair and ECDH
add ECC gen_keypair and ECDH
Signed-off-by: Zexi Yu <yuzexi@hisilicon.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> |
| ac5bf9ba | 09-Jul-2024 |
wentao.sun <wentao.sun@amlogic.com> |
core: mm: strip the tag of VA when check_pa_matches_va
When CFG_TEE_CORE_DEBUG=y and CFG_MEMTAG=y, core will crash, if there are some modules call virt_to_phys() or core_vbuf_is() and so on. Because
core: mm: strip the tag of VA when check_pa_matches_va
When CFG_TEE_CORE_DEBUG=y and CFG_MEMTAG=y, core will crash, if there are some modules call virt_to_phys() or core_vbuf_is() and so on. Because the MM can not find map by the tagged VA, so strip the tag of VA when check_pa_matches_va().
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: wentao.sun <wentao.sun@amlogic.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 6f48ab5d | 04-Jul-2024 |
wentao.sun <wentao.sun@amlogic.com> |
core: arm64: fix compiling warning when enable BTI.
Fix compiling warning in sm4_armv8a_ce_a64.S when CFG_CORE_BTI=y: aarch64-none-linux-gnu-ld.bfd: out/core/arch/arm/crypto/sm4_armv8a_ce_a64.o: war
core: arm64: fix compiling warning when enable BTI.
Fix compiling warning in sm4_armv8a_ce_a64.S when CFG_CORE_BTI=y: aarch64-none-linux-gnu-ld.bfd: out/core/arch/arm/crypto/sm4_armv8a_ce_a64.o: warning: BTI turned on by -z force-bti when all inputs do not have BTI in NOTE section.
Signed-off-by: wentao.sun <wentao.sun@amlogic.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| afe2fbd8 | 02-Jul-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
core: firewall: fix warning when compiling with no trace.
When compiling with CFG_TEE_CORE_LOG_LEVEL=0 this warning is raised : core/drivers/firewall/firewall.c: In function ‘firewall_dt_probe_bus’:
core: firewall: fix warning when compiling with no trace.
When compiling with CFG_TEE_CORE_LOG_LEVEL=0 this warning is raised : core/drivers/firewall/firewall.c: In function ‘firewall_dt_probe_bus’: core/drivers/firewall/firewall.c:297:62: error: unused parameter ‘ctrl’ [-Werror=unused-parameter] 297 | struct firewall_controller *ctrl)
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 7e679511 | 03-Jun-2024 |
Jerome Forissier <jerome.forissier@linaro.org> |
core: drivers: relicense hisi_trng.c as BSD-2-Clause
The file core/drivers/hisi_trng.c should not have been committed with a GPL-2.0 license. Relicense it as BSD-2-Clause.
Signed-off-by: Jerome For
core: drivers: relicense hisi_trng.c as BSD-2-Clause
The file core/drivers/hisi_trng.c should not have been committed with a GPL-2.0 license. Relicense it as BSD-2-Clause.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Sahil Malhotra <sahil.malhotra@nxp.com> Closes: https://github.com/OP-TEE/optee_os/issues/6834 Acked-by: loubaihui <loubaihui1@huawei.com> Acked-by: leisen <leisen1@huawei.com>
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| 4c39d4d1 | 28-Jun-2024 |
Matthew Shyu <matthew.shyu@amlogic.com> |
core: arm64: Fixing SHA3-224 failed when using ARMv8.2-A cryptographic extensions
The block size of SHA3-224 is 144 bytes. In sha3_armv8a_ce_a64.S, it is reading 152 bytes and deriving incorrect re
core: arm64: Fixing SHA3-224 failed when using ARMv8.2-A cryptographic extensions
The block size of SHA3-224 is 144 bytes. In sha3_armv8a_ce_a64.S, it is reading 152 bytes and deriving incorrect result.
Observing SHA3-224 failed on long input message.
o regression_4001.8 Hash case 7 algo 0x50000008 regression_4001.8 OK o regression_4001.9 Hash case 8 algo 0x50000008 vendor/amlogic/common/optee_test/host/xtest/regression_4000.c:1336: out has an unexpected content: Got 06:F9:E6:CB 65:6C:15:4B 04:79:00:72 E5:F0:61:24 ....el.K.y.r..a$ F6:DE:1E:F8 B6:DB:33:9F A5:0B:38:CF ......3...8. Expected AA:B2:3C:9E 7F:B9:D7:DA CE:FD:FD:0B 1A:E8:5A:B1 ..<...........Z. 37:4A:BF:F7 C4:E3:F7:55 6E:CA:E4:12 7J.....Un... ... vendor/amlogic/common/optee_test/host/xtest/regression_4000.c:1388: out has an unexpected content: Got C8:8E:8D:D6 .... Expected AA:B2:3C:9E ..<. vendor/amlogic/common/optee_test/host/xtest/regression_4000.c:1401: out has an unexpected content:
Signed-off-by: Matthew Shyu <matthew.shyu@amlogic.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 197b6c84 | 08-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-vexpress: bottom half uart driver with non-secure virtualization
Enable the bottom half uart driver with FF-A and non-secure virtualization enabled.
The console struct itr_handler and struct n
plat-vexpress: bottom half uart driver with non-secure virtualization
Enable the bottom half uart driver with FF-A and non-secure virtualization enabled.
The console struct itr_handler and struct notif_driver are moved into nexus memory as needed.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f6dcf234 | 08-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: make S-EL1 notifications virtualization-aware
Add new defines for the ABI functions FFA_NOTIFICATION_GET and FFA_NOTIFICATION_INFO_GET to support a more complete implementation of the ABI
core: ffa: make S-EL1 notifications virtualization-aware
Add new defines for the ABI functions FFA_NOTIFICATION_GET and FFA_NOTIFICATION_INFO_GET to support a more complete implementation of the ABI.
The bookkeeping of the notification state is moved into a guest specific struct notif_vm_bitmap.
Asynchronous notification is enabled per guest. Each guest defines its own notification ID to request bottom half processing.
The FFA_NOTIFICATION_INFO_GET handler is updated to be able to report multiple guest IDs.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d237e616 | 06-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make generic notifications virtualization-aware
Makes the generic notification handling aware of virtualization. Atomic events are delivered with a guest_id parameter and asynchronous notifica
core: make generic notifications virtualization-aware
Makes the generic notification handling aware of virtualization. Atomic events are delivered with a guest_id parameter and asynchronous notifications are started per guest_id.
struct notif_data is added as guest specific data to be able to track if notifications are started for a guest.
While this patch compiles it doesn't work as intended without patches handling the ABI specific side of things.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| beb90210 | 05-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: virt: add guest specific data
Add virt_add_guest_spec_data() and virt_get_guest_spec_data() to handle guest specific data.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by:
core: virt: add guest specific data
Add virt_add_guest_spec_data() and virt_get_guest_spec_data() to handle guest specific data.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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