core: add new address translation functions

Adds two new functions for address translations, virt_to_phys() and
phys_to_virt() that eventually will replace all other such functions.

Reviewed-by: Pa

core: add new address translation functions

Adds two new functions for address translations, virt_to_phys() and
phys_to_virt() that eventually will replace all other such functions.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm64.h add registers for address translation

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@lina

arm64.h add registers for address translation

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm32.h add PAR 32 and 64-bit register

Adds functions and defines for PAR 32 and 64-bit register.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.or

arm32.h add PAR 32 and 64-bit register

Adds functions and defines for PAR 32 and 64-bit register.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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fix: Add fault type to crash dump

Fixes previous f2930adaf8a10f2a6154ae21ec991ce7133fde82 "Add fault type
to crash dump" to only interpret fault_descr for data and prefetch abort
to avoid asserting

fix: Add fault type to crash dump

Fixes previous f2930adaf8a10f2a6154ae21ec991ce7133fde82 "Add fault type
to crash dump" to only interpret fault_descr for data and prefetch abort
to avoid asserting if fault_descr is 0 for LPAE.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU with LPAE)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Add fault type to crash dump

Currently, when a data or instruction abort occurs in a TA, the crash
dump does not clearly show the fault type (translation/permission/
alignment fault). This commit pr

Add fault type to crash dump

Currently, when a data or instruction abort occurs in a TA, the crash
dump does not clearly show the fault type (translation/permission/
alignment fault). This commit prints out the fault type for all faults.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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qemu_armv8a: use VIRT_SECURE_MEM as secure memory

Redefine secure memory as defined by VIRT_SECURE_MEM in QEMU

Secure SRAM is used by ARM-TF as 0x0e000000..0x0f000000
Define TZDRAM_BASE to 0x0e1000

qemu_armv8a: use VIRT_SECURE_MEM as secure memory

Redefine secure memory as defined by VIRT_SECURE_MEM in QEMU

Secure SRAM is used by ARM-TF as 0x0e000000..0x0f000000
Define TZDRAM_BASE to 0x0e100000 (size 0x00f00000)

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU armv8a)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: don't clear current session before RPC

As the translation tables used to create user TA mapping are assigned
per thread there's no need to clear current session before RPC and
restore it when

core: don't clear current session before RPC

As the translation tables used to create user TA mapping are assigned
per thread there's no need to clear current session before RPC and
restore it when the RPC has returned.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: new OPTEE_MSG interface

* Changes to a new OPTEE_MSG interface to work with the generic TEE driver.
* Removes TEESMC64_* defines as the TEESMC32_* functions are enhanced to
take 64bit values

core: new OPTEE_MSG interface

* Changes to a new OPTEE_MSG interface to work with the generic TEE driver.
* Removes TEESMC64_* defines as the TEESMC32_* functions are enhanced to
take 64bit values where required in pairs of 32bit registers instead.
* Changes open session meta information to be passed in two value
parameters instead of one memref.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm32: CFG_WITH_PAGER and CFG_TEE_GDB_BOOT are incompatible

The pager and GDB boot configurations assign different meanings to the
r0 register when entering the _start function. Therefore, they must

arm32: CFG_WITH_PAGER and CFG_TEE_GDB_BOOT are incompatible

The pager and GDB boot configurations assign different meanings to the
r0 register when entering the _start function. Therefore, they must not
be enabled at the same time.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Introduce CFLAGS32 and CFLAGS64

Previously, compile.mk and gcc.mk were using $(CFLAGS) which cannot
properly handle 32-bit and 64-bit compiles. This commit introduces
CFLAGS32 and CFLAGS64 instead,

Introduce CFLAGS32 and CFLAGS64

Previously, compile.mk and gcc.mk were using $(CFLAGS) which cannot
properly handle 32-bit and 64-bit compiles. This commit introduces
CFLAGS32 and CFLAGS64 instead, which are set to $(CFLAGS) by defaut
for convenience.

For each submodule (core, ta_arm32, ta_arm64) a new internal variable
is defined in the architecture makefile (core/arch/arm/arm.mk):
arch-bits-$(sm). Its value is either 32 or 64. This can later be used
to reference the proper CFLAGS.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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libtomcrypt: ASN1/DER fixes

- Synchronization with LibTomCrypt from
origin/develop branch
(commit 4a3b53dbee4bca1f151d9a64e9584a4c8152f0b1)

- Only "src/pk/asn1/der" directory has been synchroni

libtomcrypt: ASN1/DER fixes

- Synchronization with LibTomCrypt from
origin/develop branch
(commit 4a3b53dbee4bca1f151d9a64e9584a4c8152f0b1)

- Only "src/pk/asn1/der" directory has been synchronized

- Additional changes over synchronization:
Several default case added in switch case condition
when missing.

Signed-off-by: Philippe PAGE <philippe.page@st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>
Tested-by: Etienne CARRIERE <etienne.carriere@st.com>

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Properties: Adding Microsoft specific property

As an example on how to add vendor specific properties,
the microsoft specific property is added.

Original pull-request is
https://github.com/OP-T

Properties: Adding Microsoft specific property

As an example on how to add vendor specific properties,
the microsoft specific property is added.

Original pull-request is
https://github.com/OP-TEE/optee_os/pull/460

Suggested-by: Paul Swan <paswan@microsoft.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (QEMU)
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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Properties: prepare to add vendor specific properties

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

thread: add thread_get_id_may_fail() function

Adds thread_get_id_may_fail() which is used by trace_ext_get_thread_id()
to add the thread id for debug prints.

Reviewed-by: Pascal Brand <pascal.brand

thread: add thread_get_id_may_fail() function

Adds thread_get_id_may_fail() which is used by trace_ext_get_thread_id()
to add the thread id for debug prints.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: deal with large init part

When init + hashes part is very large it may overlay source and
destination range. Change to copy init + hash as memmove instead of
memcpy.

Reviewed-by: Pascal

core: arm: deal with large init part

When init + hashes part is very large it may overlay source and
destination range. Change to copy init + hash as memmove instead of
memcpy.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: always dsb prior to tlb invalidation

Always does an DSB prior to TLB invalidation.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linar

core: arm: always dsb prior to tlb invalidation

Always does an DSB prior to TLB invalidation.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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pager: print detailed error on unknown addresses

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: thread specific data

Represent thread specific data with struct thread_specific_data.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.

core: thread specific data

Represent thread specific data with struct thread_specific_data.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove CFG_MMU_V7_TTB

Since all platforms are using CFG_MMU_V7_TTB when applicable the config
option is redundant. This patch removes CFG_MMU_V7_TTB and makes some
related functions static.

R

core: remove CFG_MMU_V7_TTB

Since all platforms are using CFG_MMU_V7_TTB when applicable the config
option is redundant. This patch removes CFG_MMU_V7_TTB and makes some
related functions static.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Properties: fix in case of TEE_ERROR_SHORT_BUFFER

* TEE_ERROR_SHORT_BUFFER errors are better handled in case of
of properties inside the Core.
* String and Binary Block were contraints to have a l

Properties: fix in case of TEE_ERROR_SHORT_BUFFER

* TEE_ERROR_SHORT_BUFFER errors are better handled in case of
of properties inside the Core.
* String and Binary Block were contraints to have a length lower than
80 bytes due to the use of an internal structure. This is removed

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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arm: add auto generated asm-defines.h

Adds defines for assembly access to:
* struct thread_ctx
* struct thread_user_mode_rec
* struct thread_core_local
* struct thread_smc_args
* struct thread_abort

arm: add auto generated asm-defines.h

Adds defines for assembly access to:
* struct thread_ctx
* struct thread_user_mode_rec
* struct thread_core_local
* struct thread_smc_args
* struct thread_abort_regs
* struct thread_user_mode_rec
as needed from assembly code replacing previous definitions in
kernel/thread.h and thread_private.h.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add auto generated asm-defines.h

The temporary files are all stored alongside asm-defines.h, and are
named: .asm-defines.s, .asm-defines.s.d, .asm-defines.s.cmd.

Reviewed-by: Jerome Forissier

core: add auto generated asm-defines.h

The temporary files are all stored alongside asm-defines.h, and are
named: .asm-defines.s, .asm-defines.s.d, .asm-defines.s.cmd.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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vexpress: add flavor qemu_armv8a

Adds qemu_armv8a flavor to the vexpress platform.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org>

vexpress: add flavor qemu_armv8a

Adds qemu_armv8a flavor to the vexpress platform.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU-armv8a boot only)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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vexpress: remove platform flavor qemu

Removes the plain QEMU flavor.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

Properties in kernel side

In order to ease the inclusion of vendor-specific properties,
properties are now mostly described in the kernel. This allows
a lower synchronization between user-side and k

Properties in kernel side

In order to ease the inclusion of vendor-specific properties,
properties are now mostly described in the kernel. This allows
a lower synchronization between user-side and kernel-side.

The only properties now handled at user-side are TA properties
(apart from "gpd.ta.appID") as well as the TEE property
"gpd.tee.arith.maxBigIntSize"

Early discussion can be found at
https://github.com/OP-TEE/optee_os/pull/460
and https://github.com/OP-TEE/optee_os/pull/482

Suggested-by: Paul Swan <paswan@microsoft.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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