1 /* 2 * Copyright (c) 2014, STMicroelectronics International N.V. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <platform_config.h> 28 #include <kernel/panic.h> 29 #include <kernel/thread.h> 30 #include <kernel/thread_defs.h> 31 #include "thread_private.h" 32 #include <sm/sm_defs.h> 33 #include <sm/sm.h> 34 #include <optee_msg.h> 35 #include <sm/optee_smc.h> 36 #include <arm.h> 37 #include <kernel/tz_proc_def.h> 38 #include <kernel/tz_proc.h> 39 #include <kernel/misc.h> 40 #include <mm/tee_mmu.h> 41 #include <mm/tee_mmu_defs.h> 42 #include <mm/tee_mm.h> 43 #include <mm/tee_pager.h> 44 #include <kernel/tee_ta_manager.h> 45 #include <util.h> 46 #include <trace.h> 47 #include <assert.h> 48 49 #ifdef ARM32 50 #define STACK_TMP_SIZE 1024 51 #define STACK_THREAD_SIZE 8192 52 53 #if TRACE_LEVEL > 0 54 #define STACK_ABT_SIZE 2048 55 #else 56 #define STACK_ABT_SIZE 1024 57 #endif 58 59 #endif /*ARM32*/ 60 61 #ifdef ARM64 62 #define STACK_TMP_SIZE 2048 63 #define STACK_THREAD_SIZE 8192 64 65 #if TRACE_LEVEL > 0 66 #define STACK_ABT_SIZE 3072 67 #else 68 #define STACK_ABT_SIZE 1024 69 #endif 70 #endif /*ARM64*/ 71 72 #define RPC_MAX_NUM_PARAMS 2 73 74 struct thread_ctx threads[CFG_NUM_THREADS]; 75 76 static struct thread_core_local thread_core_local[CFG_TEE_CORE_NB_CORE]; 77 78 #ifdef CFG_WITH_STACK_CANARIES 79 #ifdef ARM32 80 #define STACK_CANARY_SIZE (4 * sizeof(uint32_t)) 81 #endif 82 #ifdef ARM64 83 #define STACK_CANARY_SIZE (8 * sizeof(uint32_t)) 84 #endif 85 #define START_CANARY_VALUE 0xdededede 86 #define END_CANARY_VALUE 0xabababab 87 #define GET_START_CANARY(name, stack_num) name[stack_num][0] 88 #define GET_END_CANARY(name, stack_num) \ 89 name[stack_num][sizeof(name[stack_num]) / sizeof(uint32_t) - 1] 90 #else 91 #define STACK_CANARY_SIZE 0 92 #endif 93 94 #define DECLARE_STACK(name, num_stacks, stack_size) \ 95 static uint32_t name[num_stacks][ \ 96 ROUNDUP(stack_size + STACK_CANARY_SIZE, STACK_ALIGNMENT) / \ 97 sizeof(uint32_t)] \ 98 __attribute__((section(".nozi.stack"), \ 99 aligned(STACK_ALIGNMENT))) 100 101 #define GET_STACK(stack) \ 102 ((vaddr_t)(stack) + sizeof(stack) - STACK_CANARY_SIZE / 2) 103 104 DECLARE_STACK(stack_tmp, CFG_TEE_CORE_NB_CORE, STACK_TMP_SIZE); 105 DECLARE_STACK(stack_abt, CFG_TEE_CORE_NB_CORE, STACK_ABT_SIZE); 106 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 107 DECLARE_STACK(stack_sm, CFG_TEE_CORE_NB_CORE, SM_STACK_SIZE); 108 #endif 109 #ifndef CFG_WITH_PAGER 110 DECLARE_STACK(stack_thread, CFG_NUM_THREADS, STACK_THREAD_SIZE); 111 #endif 112 113 const vaddr_t stack_tmp_top[CFG_TEE_CORE_NB_CORE] = { 114 GET_STACK(stack_tmp[0]), 115 #if CFG_TEE_CORE_NB_CORE > 1 116 GET_STACK(stack_tmp[1]), 117 #endif 118 #if CFG_TEE_CORE_NB_CORE > 2 119 GET_STACK(stack_tmp[2]), 120 #endif 121 #if CFG_TEE_CORE_NB_CORE > 3 122 GET_STACK(stack_tmp[3]), 123 #endif 124 #if CFG_TEE_CORE_NB_CORE > 4 125 GET_STACK(stack_tmp[4]), 126 #endif 127 #if CFG_TEE_CORE_NB_CORE > 5 128 GET_STACK(stack_tmp[5]), 129 #endif 130 #if CFG_TEE_CORE_NB_CORE > 6 131 GET_STACK(stack_tmp[6]), 132 #endif 133 #if CFG_TEE_CORE_NB_CORE > 7 134 GET_STACK(stack_tmp[7]), 135 #endif 136 #if CFG_TEE_CORE_NB_CORE > 8 137 #error "Top of tmp stacks aren't defined for more than 8 CPUS" 138 #endif 139 }; 140 141 thread_smc_handler_t thread_std_smc_handler_ptr; 142 static thread_smc_handler_t thread_fast_smc_handler_ptr; 143 thread_fiq_handler_t thread_fiq_handler_ptr; 144 thread_pm_handler_t thread_cpu_on_handler_ptr; 145 thread_pm_handler_t thread_cpu_off_handler_ptr; 146 thread_pm_handler_t thread_cpu_suspend_handler_ptr; 147 thread_pm_handler_t thread_cpu_resume_handler_ptr; 148 thread_pm_handler_t thread_system_off_handler_ptr; 149 thread_pm_handler_t thread_system_reset_handler_ptr; 150 151 152 static unsigned int thread_global_lock = SPINLOCK_UNLOCK; 153 static bool thread_prealloc_rpc_cache; 154 155 static void init_canaries(void) 156 { 157 #ifdef CFG_WITH_STACK_CANARIES 158 size_t n; 159 #define INIT_CANARY(name) \ 160 for (n = 0; n < ARRAY_SIZE(name); n++) { \ 161 uint32_t *start_canary = &GET_START_CANARY(name, n); \ 162 uint32_t *end_canary = &GET_END_CANARY(name, n); \ 163 \ 164 *start_canary = START_CANARY_VALUE; \ 165 *end_canary = END_CANARY_VALUE; \ 166 DMSG("#Stack canaries for %s[%zu] with top at %p\n", \ 167 #name, n, (void *)(end_canary - 1)); \ 168 DMSG("watch *%p\n", (void *)end_canary); \ 169 } 170 171 INIT_CANARY(stack_tmp); 172 INIT_CANARY(stack_abt); 173 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 174 INIT_CANARY(stack_sm); 175 #endif 176 #ifndef CFG_WITH_PAGER 177 INIT_CANARY(stack_thread); 178 #endif 179 #endif/*CFG_WITH_STACK_CANARIES*/ 180 } 181 182 void thread_check_canaries(void) 183 { 184 #ifdef CFG_WITH_STACK_CANARIES 185 size_t n; 186 187 for (n = 0; n < ARRAY_SIZE(stack_tmp); n++) { 188 assert(GET_START_CANARY(stack_tmp, n) == START_CANARY_VALUE); 189 assert(GET_END_CANARY(stack_tmp, n) == END_CANARY_VALUE); 190 } 191 192 for (n = 0; n < ARRAY_SIZE(stack_abt); n++) { 193 assert(GET_START_CANARY(stack_abt, n) == START_CANARY_VALUE); 194 assert(GET_END_CANARY(stack_abt, n) == END_CANARY_VALUE); 195 } 196 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 197 for (n = 0; n < ARRAY_SIZE(stack_sm); n++) { 198 assert(GET_START_CANARY(stack_sm, n) == START_CANARY_VALUE); 199 assert(GET_END_CANARY(stack_sm, n) == END_CANARY_VALUE); 200 } 201 #endif 202 #ifndef CFG_WITH_PAGER 203 for (n = 0; n < ARRAY_SIZE(stack_thread); n++) { 204 assert(GET_START_CANARY(stack_thread, n) == START_CANARY_VALUE); 205 assert(GET_END_CANARY(stack_thread, n) == END_CANARY_VALUE); 206 } 207 #endif 208 #endif/*CFG_WITH_STACK_CANARIES*/ 209 } 210 211 static void lock_global(void) 212 { 213 cpu_spin_lock(&thread_global_lock); 214 } 215 216 static void unlock_global(void) 217 { 218 cpu_spin_unlock(&thread_global_lock); 219 } 220 221 #ifdef ARM32 222 uint32_t thread_get_exceptions(void) 223 { 224 uint32_t cpsr = read_cpsr(); 225 226 return (cpsr >> CPSR_F_SHIFT) & THREAD_EXCP_ALL; 227 } 228 229 void thread_set_exceptions(uint32_t exceptions) 230 { 231 uint32_t cpsr = read_cpsr(); 232 233 cpsr &= ~(THREAD_EXCP_ALL << CPSR_F_SHIFT); 234 cpsr |= ((exceptions & THREAD_EXCP_ALL) << CPSR_F_SHIFT); 235 write_cpsr(cpsr); 236 } 237 #endif /*ARM32*/ 238 239 #ifdef ARM64 240 uint32_t thread_get_exceptions(void) 241 { 242 uint32_t daif = read_daif(); 243 244 return (daif >> DAIF_F_SHIFT) & THREAD_EXCP_ALL; 245 } 246 247 void thread_set_exceptions(uint32_t exceptions) 248 { 249 uint32_t daif = read_daif(); 250 251 daif &= ~(THREAD_EXCP_ALL << DAIF_F_SHIFT); 252 daif |= ((exceptions & THREAD_EXCP_ALL) << DAIF_F_SHIFT); 253 write_daif(daif); 254 } 255 #endif /*ARM64*/ 256 257 uint32_t thread_mask_exceptions(uint32_t exceptions) 258 { 259 uint32_t state = thread_get_exceptions(); 260 261 thread_set_exceptions(state | (exceptions & THREAD_EXCP_ALL)); 262 return state; 263 } 264 265 void thread_unmask_exceptions(uint32_t state) 266 { 267 thread_set_exceptions(state & THREAD_EXCP_ALL); 268 } 269 270 271 struct thread_core_local *thread_get_core_local(void) 272 { 273 uint32_t cpu_id = get_core_pos(); 274 275 /* 276 * IRQs must be disabled before playing with core_local since 277 * we otherwise may be rescheduled to a different core in the 278 * middle of this function. 279 */ 280 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 281 282 assert(cpu_id < CFG_TEE_CORE_NB_CORE); 283 return &thread_core_local[cpu_id]; 284 } 285 286 static void thread_lazy_save_ns_vfp(void) 287 { 288 #ifdef CFG_WITH_VFP 289 struct thread_ctx *thr = threads + thread_get_id(); 290 291 thr->vfp_state.ns_saved = false; 292 #if defined(ARM64) && defined(CFG_WITH_ARM_TRUSTED_FW) 293 /* 294 * ARM TF saves and restores CPACR_EL1, so we must assume NS world 295 * uses VFP and always preserve the register file when secure world 296 * is about to use it 297 */ 298 thr->vfp_state.ns.force_save = true; 299 #endif 300 vfp_lazy_save_state_init(&thr->vfp_state.ns); 301 #endif /*CFG_WITH_VFP*/ 302 } 303 304 static void thread_lazy_restore_ns_vfp(void) 305 { 306 #ifdef CFG_WITH_VFP 307 struct thread_ctx *thr = threads + thread_get_id(); 308 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 309 310 assert(!thr->vfp_state.sec_lazy_saved && !thr->vfp_state.sec_saved); 311 312 if (tuv && tuv->lazy_saved && !tuv->saved) { 313 vfp_lazy_save_state_final(&tuv->vfp); 314 tuv->saved = true; 315 } 316 317 vfp_lazy_restore_state(&thr->vfp_state.ns, thr->vfp_state.ns_saved); 318 thr->vfp_state.ns_saved = false; 319 #endif /*CFG_WITH_VFP*/ 320 } 321 322 #ifdef ARM32 323 static void init_regs(struct thread_ctx *thread, 324 struct thread_smc_args *args) 325 { 326 thread->regs.pc = (uint32_t)thread_std_smc_entry; 327 328 /* 329 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 330 * abort and unmasked FIQ. 331 */ 332 thread->regs.cpsr = read_cpsr() & ARM32_CPSR_E; 333 thread->regs.cpsr |= CPSR_MODE_SVC | CPSR_I | CPSR_A; 334 /* Enable thumb mode if it's a thumb instruction */ 335 if (thread->regs.pc & 1) 336 thread->regs.cpsr |= CPSR_T; 337 /* Reinitialize stack pointer */ 338 thread->regs.svc_sp = thread->stack_va_end; 339 340 /* 341 * Copy arguments into context. This will make the 342 * arguments appear in r0-r7 when thread is started. 343 */ 344 thread->regs.r0 = args->a0; 345 thread->regs.r1 = args->a1; 346 thread->regs.r2 = args->a2; 347 thread->regs.r3 = args->a3; 348 thread->regs.r4 = args->a4; 349 thread->regs.r5 = args->a5; 350 thread->regs.r6 = args->a6; 351 thread->regs.r7 = args->a7; 352 } 353 #endif /*ARM32*/ 354 355 #ifdef ARM64 356 static void init_regs(struct thread_ctx *thread, 357 struct thread_smc_args *args) 358 { 359 thread->regs.pc = (uint64_t)thread_std_smc_entry; 360 361 /* 362 * Stdcalls starts in SVC mode with masked IRQ, masked Asynchronous 363 * abort and unmasked FIQ. 364 */ 365 thread->regs.cpsr = SPSR_64(SPSR_64_MODE_EL1, SPSR_64_MODE_SP_EL0, 366 DAIFBIT_IRQ | DAIFBIT_ABT); 367 /* Reinitialize stack pointer */ 368 thread->regs.sp = thread->stack_va_end; 369 370 /* 371 * Copy arguments into context. This will make the 372 * arguments appear in x0-x7 when thread is started. 373 */ 374 thread->regs.x[0] = args->a0; 375 thread->regs.x[1] = args->a1; 376 thread->regs.x[2] = args->a2; 377 thread->regs.x[3] = args->a3; 378 thread->regs.x[4] = args->a4; 379 thread->regs.x[5] = args->a5; 380 thread->regs.x[6] = args->a6; 381 thread->regs.x[7] = args->a7; 382 } 383 #endif /*ARM64*/ 384 385 void thread_init_boot_thread(void) 386 { 387 struct thread_core_local *l = thread_get_core_local(); 388 size_t n; 389 390 for (n = 0; n < CFG_NUM_THREADS; n++) 391 TAILQ_INIT(&threads[n].mutexes); 392 393 for (n = 0; n < CFG_TEE_CORE_NB_CORE; n++) 394 thread_core_local[n].curr_thread = -1; 395 396 l->curr_thread = 0; 397 threads[0].state = THREAD_STATE_ACTIVE; 398 } 399 400 void thread_clr_boot_thread(void) 401 { 402 struct thread_core_local *l = thread_get_core_local(); 403 404 assert(l->curr_thread >= 0 && l->curr_thread < CFG_NUM_THREADS); 405 assert(threads[l->curr_thread].state == THREAD_STATE_ACTIVE); 406 assert(TAILQ_EMPTY(&threads[l->curr_thread].mutexes)); 407 threads[l->curr_thread].state = THREAD_STATE_FREE; 408 l->curr_thread = -1; 409 } 410 411 static void thread_alloc_and_run(struct thread_smc_args *args) 412 { 413 size_t n; 414 struct thread_core_local *l = thread_get_core_local(); 415 bool found_thread = false; 416 417 assert(l->curr_thread == -1); 418 419 lock_global(); 420 421 for (n = 0; n < CFG_NUM_THREADS; n++) { 422 if (threads[n].state == THREAD_STATE_FREE) { 423 threads[n].state = THREAD_STATE_ACTIVE; 424 found_thread = true; 425 break; 426 } 427 } 428 429 unlock_global(); 430 431 if (!found_thread) { 432 args->a0 = OPTEE_SMC_RETURN_ETHREAD_LIMIT; 433 return; 434 } 435 436 l->curr_thread = n; 437 438 threads[n].flags = 0; 439 init_regs(threads + n, args); 440 441 /* Save Hypervisor Client ID */ 442 threads[n].hyp_clnt_id = args->a7; 443 444 thread_lazy_save_ns_vfp(); 445 thread_resume(&threads[n].regs); 446 } 447 448 #ifdef ARM32 449 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 450 struct thread_smc_args *args) 451 { 452 /* 453 * Update returned values from RPC, values will appear in 454 * r0-r3 when thread is resumed. 455 */ 456 regs->r0 = args->a0; 457 regs->r1 = args->a1; 458 regs->r2 = args->a2; 459 regs->r3 = args->a3; 460 regs->r4 = args->a4; 461 regs->r5 = args->a5; 462 } 463 #endif /*ARM32*/ 464 465 #ifdef ARM64 466 static void copy_a0_to_a5(struct thread_ctx_regs *regs, 467 struct thread_smc_args *args) 468 { 469 /* 470 * Update returned values from RPC, values will appear in 471 * x0-x3 when thread is resumed. 472 */ 473 regs->x[0] = args->a0; 474 regs->x[1] = args->a1; 475 regs->x[2] = args->a2; 476 regs->x[3] = args->a3; 477 regs->x[4] = args->a4; 478 regs->x[5] = args->a5; 479 } 480 #endif /*ARM64*/ 481 482 static void thread_resume_from_rpc(struct thread_smc_args *args) 483 { 484 size_t n = args->a3; /* thread id */ 485 struct thread_core_local *l = thread_get_core_local(); 486 uint32_t rv = 0; 487 488 assert(l->curr_thread == -1); 489 490 lock_global(); 491 492 if (n < CFG_NUM_THREADS && 493 threads[n].state == THREAD_STATE_SUSPENDED && 494 args->a7 == threads[n].hyp_clnt_id) 495 threads[n].state = THREAD_STATE_ACTIVE; 496 else 497 rv = OPTEE_SMC_RETURN_ERESUME; 498 499 unlock_global(); 500 501 if (rv) { 502 args->a0 = rv; 503 return; 504 } 505 506 l->curr_thread = n; 507 508 if (threads[n].have_user_map) 509 core_mmu_set_user_map(&threads[n].user_map); 510 511 /* 512 * Return from RPC to request service of an IRQ must not 513 * get parameters from non-secure world. 514 */ 515 if (threads[n].flags & THREAD_FLAGS_COPY_ARGS_ON_RETURN) { 516 copy_a0_to_a5(&threads[n].regs, args); 517 threads[n].flags &= ~THREAD_FLAGS_COPY_ARGS_ON_RETURN; 518 } 519 520 thread_lazy_save_ns_vfp(); 521 thread_resume(&threads[n].regs); 522 } 523 524 void thread_handle_fast_smc(struct thread_smc_args *args) 525 { 526 thread_check_canaries(); 527 thread_fast_smc_handler_ptr(args); 528 /* Fast handlers must not unmask any exceptions */ 529 assert(thread_get_exceptions() == THREAD_EXCP_ALL); 530 } 531 532 void thread_handle_std_smc(struct thread_smc_args *args) 533 { 534 thread_check_canaries(); 535 536 if (args->a0 == OPTEE_SMC_CALL_RETURN_FROM_RPC) 537 thread_resume_from_rpc(args); 538 else 539 thread_alloc_and_run(args); 540 } 541 542 /* Helper routine for the assembly function thread_std_smc_entry() */ 543 void __thread_std_smc_entry(struct thread_smc_args *args) 544 { 545 struct thread_ctx *thr = threads + thread_get_id(); 546 547 if (!thr->rpc_arg) { 548 paddr_t parg; 549 uint64_t carg; 550 void *arg; 551 552 thread_rpc_alloc_arg( 553 OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS), 554 &parg, &carg); 555 if (!parg || !ALIGNMENT_IS_OK(parg, struct optee_msg_arg) || 556 core_pa2va(parg, &arg)) { 557 thread_rpc_free(carg); 558 args->a0 = OPTEE_SMC_RETURN_ENOMEM; 559 return; 560 } 561 562 thr->rpc_arg = arg; 563 thr->rpc_carg = carg; 564 } 565 566 thread_std_smc_handler_ptr(args); 567 568 if (!thread_prealloc_rpc_cache) { 569 thread_rpc_free(thr->rpc_carg); 570 thr->rpc_carg = 0; 571 thr->rpc_arg = 0; 572 } 573 } 574 575 void *thread_get_tmp_sp(void) 576 { 577 struct thread_core_local *l = thread_get_core_local(); 578 579 return (void *)l->tmp_stack_va_end; 580 } 581 582 #ifdef ARM64 583 vaddr_t thread_get_saved_thread_sp(void) 584 { 585 struct thread_core_local *l = thread_get_core_local(); 586 int ct = l->curr_thread; 587 588 assert(ct != -1); 589 return threads[ct].kern_sp; 590 } 591 #endif /*ARM64*/ 592 593 bool thread_addr_is_in_stack(vaddr_t va) 594 { 595 struct thread_ctx *thr = threads + thread_get_id(); 596 597 return va < thr->stack_va_end && 598 va >= (thr->stack_va_end - STACK_THREAD_SIZE); 599 } 600 601 void thread_state_free(void) 602 { 603 struct thread_core_local *l = thread_get_core_local(); 604 int ct = l->curr_thread; 605 606 assert(ct != -1); 607 assert(TAILQ_EMPTY(&threads[ct].mutexes)); 608 609 thread_lazy_restore_ns_vfp(); 610 611 lock_global(); 612 613 assert(threads[ct].state == THREAD_STATE_ACTIVE); 614 threads[ct].state = THREAD_STATE_FREE; 615 threads[ct].flags = 0; 616 l->curr_thread = -1; 617 618 unlock_global(); 619 } 620 621 #ifdef ARM32 622 static bool is_from_user(uint32_t cpsr) 623 { 624 return (cpsr & ARM32_CPSR_MODE_MASK) == ARM32_CPSR_MODE_USR; 625 } 626 #endif 627 628 #ifdef ARM64 629 static bool is_from_user(uint32_t cpsr) 630 { 631 if (cpsr & (SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT)) 632 return true; 633 if (((cpsr >> SPSR_64_MODE_EL_SHIFT) & SPSR_64_MODE_EL_MASK) == 634 SPSR_64_MODE_EL0) 635 return true; 636 return false; 637 } 638 #endif 639 640 int thread_state_suspend(uint32_t flags, uint32_t cpsr, vaddr_t pc) 641 { 642 struct thread_core_local *l = thread_get_core_local(); 643 int ct = l->curr_thread; 644 645 assert(ct != -1); 646 647 thread_check_canaries(); 648 649 if (is_from_user(cpsr)) 650 thread_user_save_vfp(); 651 thread_lazy_restore_ns_vfp(); 652 653 lock_global(); 654 655 assert(threads[ct].state == THREAD_STATE_ACTIVE); 656 threads[ct].flags |= flags; 657 threads[ct].regs.cpsr = cpsr; 658 threads[ct].regs.pc = pc; 659 threads[ct].state = THREAD_STATE_SUSPENDED; 660 661 threads[ct].have_user_map = core_mmu_user_mapping_is_active(); 662 if (threads[ct].have_user_map) { 663 core_mmu_get_user_map(&threads[ct].user_map); 664 core_mmu_set_user_map(NULL); 665 } 666 667 668 l->curr_thread = -1; 669 670 unlock_global(); 671 672 return ct; 673 } 674 675 #ifdef ARM32 676 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 677 { 678 l->tmp_stack_va_end = sp; 679 thread_set_irq_sp(sp); 680 thread_set_fiq_sp(sp); 681 } 682 683 static void set_abt_stack(struct thread_core_local *l __unused, vaddr_t sp) 684 { 685 thread_set_abt_sp(sp); 686 } 687 #endif /*ARM32*/ 688 689 #ifdef ARM64 690 static void set_tmp_stack(struct thread_core_local *l, vaddr_t sp) 691 { 692 /* 693 * We're already using the tmp stack when this function is called 694 * so there's no need to assign it to any stack pointer. However, 695 * we'll need to restore it at different times so store it here. 696 */ 697 l->tmp_stack_va_end = sp; 698 } 699 700 static void set_abt_stack(struct thread_core_local *l, vaddr_t sp) 701 { 702 l->abt_stack_va_end = sp; 703 } 704 #endif /*ARM64*/ 705 706 bool thread_init_stack(uint32_t thread_id, vaddr_t sp) 707 { 708 if (thread_id >= CFG_NUM_THREADS) 709 return false; 710 threads[thread_id].stack_va_end = sp; 711 return true; 712 } 713 714 int thread_get_id_may_fail(void) 715 { 716 /* thread_get_core_local() requires IRQs to be disabled */ 717 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 718 struct thread_core_local *l = thread_get_core_local(); 719 int ct = l->curr_thread; 720 721 thread_unmask_exceptions(exceptions); 722 return ct; 723 } 724 725 int thread_get_id(void) 726 { 727 int ct = thread_get_id_may_fail(); 728 729 assert((ct >= 0) && (ct < CFG_NUM_THREADS)); 730 return ct; 731 } 732 733 static void init_handlers(const struct thread_handlers *handlers) 734 { 735 thread_std_smc_handler_ptr = handlers->std_smc; 736 thread_fast_smc_handler_ptr = handlers->fast_smc; 737 thread_fiq_handler_ptr = handlers->fiq; 738 thread_cpu_on_handler_ptr = handlers->cpu_on; 739 thread_cpu_off_handler_ptr = handlers->cpu_off; 740 thread_cpu_suspend_handler_ptr = handlers->cpu_suspend; 741 thread_cpu_resume_handler_ptr = handlers->cpu_resume; 742 thread_system_off_handler_ptr = handlers->system_off; 743 thread_system_reset_handler_ptr = handlers->system_reset; 744 } 745 746 747 #ifdef CFG_WITH_PAGER 748 static void init_thread_stacks(void) 749 { 750 size_t n; 751 752 /* 753 * Allocate virtual memory for thread stacks. 754 */ 755 for (n = 0; n < CFG_NUM_THREADS; n++) { 756 tee_mm_entry_t *mm; 757 vaddr_t sp; 758 759 /* Find vmem for thread stack and its protection gap */ 760 mm = tee_mm_alloc(&tee_mm_vcore, 761 SMALL_PAGE_SIZE + STACK_THREAD_SIZE); 762 TEE_ASSERT(mm); 763 764 /* Claim eventual physical page */ 765 tee_pager_add_pages(tee_mm_get_smem(mm), tee_mm_get_size(mm), 766 true); 767 768 /* Realloc both protection vmem and stack vmem separately */ 769 sp = tee_mm_get_smem(mm); 770 tee_mm_free(mm); 771 mm = tee_mm_alloc2(&tee_mm_vcore, sp, SMALL_PAGE_SIZE); 772 TEE_ASSERT(mm); 773 mm = tee_mm_alloc2(&tee_mm_vcore, sp + SMALL_PAGE_SIZE, 774 STACK_THREAD_SIZE); 775 TEE_ASSERT(mm); 776 777 /* init effective stack */ 778 sp = tee_mm_get_smem(mm) + tee_mm_get_bytes(mm); 779 if (!thread_init_stack(n, sp)) 780 panic(); 781 782 /* Add the area to the pager */ 783 tee_pager_add_area(mm, TEE_PAGER_AREA_RW, NULL, NULL); 784 } 785 } 786 #else 787 static void init_thread_stacks(void) 788 { 789 size_t n; 790 791 /* Assign the thread stacks */ 792 for (n = 0; n < CFG_NUM_THREADS; n++) { 793 if (!thread_init_stack(n, GET_STACK(stack_thread[n]))) 794 panic(); 795 } 796 } 797 #endif /*CFG_WITH_PAGER*/ 798 799 void thread_init_primary(const struct thread_handlers *handlers) 800 { 801 init_handlers(handlers); 802 803 /* Initialize canaries around the stacks */ 804 init_canaries(); 805 806 init_thread_stacks(); 807 } 808 809 static void init_sec_mon(size_t pos __maybe_unused) 810 { 811 #if !defined(CFG_WITH_ARM_TRUSTED_FW) 812 /* Initialize secure monitor */ 813 sm_init(GET_STACK(stack_sm[pos])); 814 sm_set_entry_vector(thread_vector_table); 815 #endif 816 } 817 818 void thread_init_per_cpu(void) 819 { 820 size_t pos = get_core_pos(); 821 struct thread_core_local *l = thread_get_core_local(); 822 823 init_sec_mon(pos); 824 825 set_tmp_stack(l, GET_STACK(stack_tmp[pos])); 826 set_abt_stack(l, GET_STACK(stack_abt[pos])); 827 828 thread_init_vbar(); 829 } 830 831 struct thread_specific_data *thread_get_tsd(void) 832 { 833 return &threads[thread_get_id()].tsd; 834 } 835 836 struct thread_ctx_regs *thread_get_ctx_regs(void) 837 { 838 struct thread_core_local *l = thread_get_core_local(); 839 840 assert(l->curr_thread != -1); 841 return &threads[l->curr_thread].regs; 842 } 843 844 void thread_set_irq(bool enable) 845 { 846 /* thread_get_core_local() requires IRQs to be disabled */ 847 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 848 struct thread_core_local *l; 849 850 l = thread_get_core_local(); 851 852 assert(l->curr_thread != -1); 853 854 if (enable) { 855 threads[l->curr_thread].flags |= THREAD_FLAGS_IRQ_ENABLE; 856 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 857 } else { 858 /* 859 * No need to disable IRQ here since it's already disabled 860 * above. 861 */ 862 threads[l->curr_thread].flags &= ~THREAD_FLAGS_IRQ_ENABLE; 863 } 864 } 865 866 void thread_restore_irq(void) 867 { 868 /* thread_get_core_local() requires IRQs to be disabled */ 869 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 870 struct thread_core_local *l; 871 872 l = thread_get_core_local(); 873 874 assert(l->curr_thread != -1); 875 876 if (threads[l->curr_thread].flags & THREAD_FLAGS_IRQ_ENABLE) 877 thread_set_exceptions(exceptions & ~THREAD_EXCP_IRQ); 878 } 879 880 #ifdef CFG_WITH_VFP 881 uint32_t thread_kernel_enable_vfp(void) 882 { 883 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 884 struct thread_ctx *thr = threads + thread_get_id(); 885 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 886 887 assert(!vfp_is_enabled()); 888 889 if (!thr->vfp_state.ns_saved) { 890 vfp_lazy_save_state_final(&thr->vfp_state.ns); 891 thr->vfp_state.ns_saved = true; 892 } else if (thr->vfp_state.sec_lazy_saved && 893 !thr->vfp_state.sec_saved) { 894 /* 895 * This happens when we're handling an abort while the 896 * thread was using the VFP state. 897 */ 898 vfp_lazy_save_state_final(&thr->vfp_state.sec); 899 thr->vfp_state.sec_saved = true; 900 } else if (tuv && tuv->lazy_saved && !tuv->saved) { 901 /* 902 * This can happen either during syscall or abort 903 * processing (while processing a syscall). 904 */ 905 vfp_lazy_save_state_final(&tuv->vfp); 906 tuv->saved = true; 907 } 908 909 vfp_enable(); 910 return exceptions; 911 } 912 913 void thread_kernel_disable_vfp(uint32_t state) 914 { 915 uint32_t exceptions; 916 917 assert(vfp_is_enabled()); 918 919 vfp_disable(); 920 exceptions = thread_get_exceptions(); 921 assert(exceptions & THREAD_EXCP_IRQ); 922 exceptions &= ~THREAD_EXCP_IRQ; 923 exceptions |= state & THREAD_EXCP_IRQ; 924 thread_set_exceptions(exceptions); 925 } 926 927 void thread_kernel_save_vfp(void) 928 { 929 struct thread_ctx *thr = threads + thread_get_id(); 930 931 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 932 if (vfp_is_enabled()) { 933 vfp_lazy_save_state_init(&thr->vfp_state.sec); 934 thr->vfp_state.sec_lazy_saved = true; 935 } 936 } 937 938 void thread_kernel_restore_vfp(void) 939 { 940 struct thread_ctx *thr = threads + thread_get_id(); 941 942 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 943 assert(!vfp_is_enabled()); 944 if (thr->vfp_state.sec_lazy_saved) { 945 vfp_lazy_restore_state(&thr->vfp_state.sec, 946 thr->vfp_state.sec_saved); 947 thr->vfp_state.sec_saved = false; 948 thr->vfp_state.sec_lazy_saved = false; 949 } 950 } 951 952 void thread_user_enable_vfp(struct thread_user_vfp_state *uvfp) 953 { 954 struct thread_ctx *thr = threads + thread_get_id(); 955 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 956 957 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 958 assert(!vfp_is_enabled()); 959 960 if (!thr->vfp_state.ns_saved) { 961 vfp_lazy_save_state_final(&thr->vfp_state.ns); 962 thr->vfp_state.ns_saved = true; 963 } else if (tuv && uvfp != tuv) { 964 if (tuv->lazy_saved && !tuv->saved) { 965 vfp_lazy_save_state_final(&tuv->vfp); 966 tuv->saved = true; 967 } 968 } 969 970 if (uvfp->lazy_saved) 971 vfp_lazy_restore_state(&uvfp->vfp, uvfp->saved); 972 uvfp->lazy_saved = false; 973 uvfp->saved = false; 974 975 thr->vfp_state.uvfp = uvfp; 976 vfp_enable(); 977 } 978 979 void thread_user_save_vfp(void) 980 { 981 struct thread_ctx *thr = threads + thread_get_id(); 982 struct thread_user_vfp_state *tuv = thr->vfp_state.uvfp; 983 984 assert(thread_get_exceptions() & THREAD_EXCP_IRQ); 985 if (!vfp_is_enabled()) 986 return; 987 988 assert(tuv && !tuv->lazy_saved && !tuv->saved); 989 vfp_lazy_save_state_init(&tuv->vfp); 990 tuv->lazy_saved = true; 991 } 992 993 void thread_user_clear_vfp(struct thread_user_vfp_state *uvfp) 994 { 995 struct thread_ctx *thr = threads + thread_get_id(); 996 997 if (uvfp == thr->vfp_state.uvfp) 998 thr->vfp_state.uvfp = NULL; 999 uvfp->lazy_saved = false; 1000 uvfp->saved = false; 1001 } 1002 #endif /*CFG_WITH_VFP*/ 1003 1004 #ifdef ARM32 1005 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1006 { 1007 uint32_t s; 1008 1009 if (!is_32bit) 1010 return false; 1011 1012 s = read_spsr(); 1013 s &= ~(CPSR_MODE_MASK | CPSR_T | CPSR_IT_MASK1 | CPSR_IT_MASK2); 1014 s |= CPSR_MODE_USR; 1015 if (entry_func & 1) 1016 s |= CPSR_T; 1017 *spsr = s; 1018 return true; 1019 } 1020 #endif 1021 1022 #ifdef ARM64 1023 static bool get_spsr(bool is_32bit, unsigned long entry_func, uint32_t *spsr) 1024 { 1025 uint32_t s; 1026 1027 if (is_32bit) { 1028 s = read_daif() & (SPSR_32_AIF_MASK << SPSR_32_AIF_SHIFT); 1029 s |= SPSR_MODE_RW_32 << SPSR_MODE_RW_SHIFT; 1030 s |= (entry_func & SPSR_32_T_MASK) << SPSR_32_T_SHIFT; 1031 } else { 1032 s = read_daif() & (SPSR_64_DAIF_MASK << SPSR_64_DAIF_SHIFT); 1033 } 1034 1035 *spsr = s; 1036 return true; 1037 } 1038 #endif 1039 1040 uint32_t thread_enter_user_mode(unsigned long a0, unsigned long a1, 1041 unsigned long a2, unsigned long a3, unsigned long user_sp, 1042 unsigned long entry_func, bool is_32bit, 1043 uint32_t *exit_status0, uint32_t *exit_status1) 1044 { 1045 uint32_t spsr; 1046 1047 if (!get_spsr(is_32bit, entry_func, &spsr)) { 1048 *exit_status0 = 1; /* panic */ 1049 *exit_status1 = 0xbadbadba; 1050 return 0; 1051 } 1052 return __thread_enter_user_mode(a0, a1, a2, a3, user_sp, entry_func, 1053 spsr, exit_status0, exit_status1); 1054 } 1055 1056 void thread_add_mutex(struct mutex *m) 1057 { 1058 struct thread_core_local *l = thread_get_core_local(); 1059 int ct = l->curr_thread; 1060 1061 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1062 assert(m->owner_id == -1); 1063 m->owner_id = ct; 1064 TAILQ_INSERT_TAIL(&threads[ct].mutexes, m, link); 1065 } 1066 1067 void thread_rem_mutex(struct mutex *m) 1068 { 1069 struct thread_core_local *l = thread_get_core_local(); 1070 int ct = l->curr_thread; 1071 1072 assert(ct != -1 && threads[ct].state == THREAD_STATE_ACTIVE); 1073 assert(m->owner_id == ct); 1074 m->owner_id = -1; 1075 TAILQ_REMOVE(&threads[ct].mutexes, m, link); 1076 } 1077 1078 bool thread_disable_prealloc_rpc_cache(uint64_t *cookie) 1079 { 1080 bool rv; 1081 size_t n; 1082 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1083 1084 lock_global(); 1085 1086 for (n = 0; n < CFG_NUM_THREADS; n++) { 1087 if (threads[n].state != THREAD_STATE_FREE) { 1088 rv = false; 1089 goto out; 1090 } 1091 } 1092 1093 rv = true; 1094 for (n = 0; n < CFG_NUM_THREADS; n++) { 1095 if (threads[n].rpc_arg) { 1096 *cookie = threads[n].rpc_carg; 1097 threads[n].rpc_carg = 0; 1098 threads[n].rpc_arg = NULL; 1099 goto out; 1100 } 1101 } 1102 1103 *cookie = 0; 1104 thread_prealloc_rpc_cache = false; 1105 out: 1106 unlock_global(); 1107 thread_unmask_exceptions(exceptions); 1108 return rv; 1109 } 1110 1111 bool thread_enable_prealloc_rpc_cache(void) 1112 { 1113 bool rv; 1114 size_t n; 1115 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_IRQ); 1116 1117 lock_global(); 1118 1119 for (n = 0; n < CFG_NUM_THREADS; n++) { 1120 if (threads[n].state != THREAD_STATE_FREE) { 1121 rv = false; 1122 goto out; 1123 } 1124 } 1125 1126 rv = true; 1127 thread_prealloc_rpc_cache = true; 1128 out: 1129 unlock_global(); 1130 thread_unmask_exceptions(exceptions); 1131 return rv; 1132 } 1133 1134 static uint32_t rpc_cmd_nolock(uint32_t cmd, size_t num_params, 1135 struct optee_msg_param *params) 1136 { 1137 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1138 struct thread_ctx *thr = threads + thread_get_id(); 1139 struct optee_msg_arg *arg = thr->rpc_arg; 1140 uint64_t carg = thr->rpc_carg; 1141 const size_t params_size = sizeof(struct optee_msg_param) * num_params; 1142 size_t n; 1143 1144 TEE_ASSERT(arg && carg && num_params <= RPC_MAX_NUM_PARAMS); 1145 1146 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(RPC_MAX_NUM_PARAMS)); 1147 arg->cmd = cmd; 1148 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1149 arg->num_params = num_params; 1150 memcpy(OPTEE_MSG_GET_PARAMS(arg), params, params_size); 1151 1152 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1153 thread_rpc(rpc_args); 1154 for (n = 0; n < num_params; n++) { 1155 switch (params[n].attr & OPTEE_MSG_ATTR_TYPE_MASK) { 1156 case OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT: 1157 case OPTEE_MSG_ATTR_TYPE_VALUE_INOUT: 1158 case OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT: 1159 case OPTEE_MSG_ATTR_TYPE_RMEM_INOUT: 1160 case OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT: 1161 case OPTEE_MSG_ATTR_TYPE_TMEM_INOUT: 1162 memcpy(params + n, OPTEE_MSG_GET_PARAMS(arg) + n, 1163 sizeof(struct optee_msg_param)); 1164 break; 1165 default: 1166 break; 1167 } 1168 } 1169 return arg->ret; 1170 } 1171 1172 uint32_t thread_rpc_cmd(uint32_t cmd, size_t num_params, 1173 struct optee_msg_param *params) 1174 { 1175 uint32_t ret; 1176 1177 ret = rpc_cmd_nolock(cmd, num_params, params); 1178 1179 return ret; 1180 } 1181 1182 void thread_rpc_alloc_arg(size_t size, paddr_t *arg, uint64_t *cookie) 1183 { 1184 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1185 OPTEE_SMC_RETURN_RPC_ALLOC, size}; 1186 1187 thread_rpc(rpc_args); 1188 *arg = reg_pair_to_64(rpc_args[1], rpc_args[2]); 1189 *cookie = reg_pair_to_64(rpc_args[4], rpc_args[5]); 1190 } 1191 1192 /** 1193 * Allocates shared memory buffer via RPC 1194 * 1195 * @size: size in bytes of shared memory buffer 1196 * @align: required alignment of buffer 1197 * @bt: buffer type OPTEE_MSG_RPC_SHM_TYPE_* 1198 * @payload: returned physical pointer to buffer, 0 if allocation 1199 * failed. 1200 * @cookie: returned cookie used when freeing the buffer 1201 */ 1202 static void thread_rpc_alloc(size_t size, size_t align, unsigned bt, 1203 paddr_t *payload, uint64_t *cookie) 1204 { 1205 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { OPTEE_SMC_RETURN_RPC_CMD }; 1206 struct thread_ctx *thr = threads + thread_get_id(); 1207 struct optee_msg_arg *arg = thr->rpc_arg; 1208 uint64_t carg = thr->rpc_carg; 1209 struct optee_msg_param *params = OPTEE_MSG_GET_PARAMS(arg); 1210 1211 memset(arg, 0, OPTEE_MSG_GET_ARG_SIZE(1)); 1212 arg->cmd = OPTEE_MSG_RPC_CMD_SHM_ALLOC; 1213 arg->ret = TEE_ERROR_GENERIC; /* in case value isn't updated */ 1214 arg->num_params = 1; 1215 1216 params[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT; 1217 params[0].u.value.a = bt; 1218 params[0].u.value.b = size; 1219 params[0].u.value.c = align; 1220 1221 reg_pair_from_64(carg, rpc_args + 1, rpc_args + 2); 1222 thread_rpc(rpc_args); 1223 if (arg->ret != TEE_SUCCESS) 1224 goto fail; 1225 1226 if (arg->num_params != 1) 1227 goto fail; 1228 1229 if (params[0].attr != OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT) 1230 goto fail; 1231 1232 *payload = params[0].u.tmem.buf_ptr; 1233 *cookie = params[0].u.tmem.shm_ref; 1234 return; 1235 fail: 1236 *payload = 0; 1237 *cookie = 0; 1238 } 1239 1240 void thread_rpc_free(uint64_t cookie) 1241 { 1242 if (cookie) { 1243 uint32_t rpc_args[THREAD_RPC_NUM_ARGS] = { 1244 OPTEE_SMC_RETURN_RPC_FREE}; 1245 1246 reg_pair_from_64(cookie, rpc_args + 1, rpc_args + 2); 1247 thread_rpc(rpc_args); 1248 } 1249 } 1250 1251 void thread_rpc_alloc_payload(size_t size, paddr_t *payload, uint64_t *cookie) 1252 { 1253 thread_rpc_alloc(size, 8, OPTEE_MSG_RPC_SHM_TYPE_APPL, payload, cookie); 1254 } 1255