| 71716c2a | 03-Dec-2020 |
Vahid Dukandar <vahidd@microsoft.com> |
spi: pl022: expose internal fifo flush API
We identified that the caller of the pl022 driver needs to flush the pl022's internal fifo to make sure next transaction starts clean.
This PR expose exis
spi: pl022: expose internal fifo flush API
We identified that the caller of the pl022 driver needs to flush the pl022's internal fifo to make sure next transaction starts clean.
This PR expose existing pl022_flush_fifo API to caller via spi_ops.
The validation is performed on bcm platform.
Signed-off-by: Vahid Dukandar <vahidd@microsoft.com> Reviewed-by: Victor Chong <victor.chong@linaro.org>
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| 5cc9ca58 | 04-Dec-2020 |
Marouene Boubakri <marouene.boubakri@nxp.com> |
core: kernel: link.mk: make path to kernel linker script generic
The path to kernel script is hard-coded. Despite it is in a arch specific folder, it should use defined variables. This is helpful in
core: kernel: link.mk: make path to kernel linker script generic
The path to kernel script is hard-coded. Despite it is in a arch specific folder, it should use defined variables. This is helpful in case of porting OP-TEE OS to a new architecture such we make maximum reuse of existing sources.
Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| d53c0183 | 05-Jul-2019 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: add support for MT8183 SoC
Add OP-TEE support for MT8183 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 1dd81b50 | 13-Feb-2020 |
Fabien Parent <fparent@baylibre.com> |
plat-mediatek: Add support for GIC
Add the support for the GIC for the MediaTek platforms.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.or
plat-mediatek: Add support for GIC
Add the support for the GIC for the MediaTek platforms.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 814fc2e8 | 01-Dec-2020 |
Jerome Forissier <jerome@forissier.org> |
core: keep.h: set SHF_ALLOC flag in all __keep_meta_vars_pager sections
The DECLARE_KEEP_PAGER() and DECLARE_KEEP_INIT() macros create symbols in a special section called __keep_meta_vars_pager. The
core: keep.h: set SHF_ALLOC flag in all __keep_meta_vars_pager sections
The DECLARE_KEEP_PAGER() and DECLARE_KEEP_INIT() macros create symbols in a special section called __keep_meta_vars_pager. The behavior differs slightly in C and assembler:
- In C, the section is of type SHT_PROGBITS and has (SHF_ALLOC | SHF_WRITE) flags, - In assembler, the section is also SHT_PROGBITS but has no flags.
Enter the Clang linker, ld.lld. When used with --gc-sections, all sections without the SHF_ALLOC flag (and a few other conditions) are marked "live" in a first pass before dependencies on other sections are considered. A side effect is that the reference to the symbol given in DECLARE_KEEP_*() is ignored and the macro does not pull the desired section in the link. That section is garbage collected instead.
Whether or not it is a bug in the linker is slightly above my level of expertise. However, the DECLARE_KEEP_*() macros declare global symbols that reference other symbols, so it really is allocatable stuff and having the SHF_ALLOC flag does make sense. It is also consistent with the C version. Note that adding the flag does not take more space in the final executable since core/arch/arm/kernel/kern.ld.S discards the __keep_meta_vars_pager output section anyways.
Therefore, add "a" to the .section command in DECLARE_KEEP_*().
Fixes a core crash which may be reproduced on QEMUv8 with xtest 1013 when OP-TEE is compiled with Clang 11 and CFG_WITH_PAGER=y.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f3368ec8 | 27-Nov-2020 |
Jerome Forissier <jerome@forissier.org> |
core: arm: kern.ld.S: fix ROUNDUP() and ROUNDDOWN() for Clang
Fixes exceptions on boot when CFG_WITH_ASLR=y CFG_WITH_PAGER=y and the Clang toolchain is used (tested with QEMUv8 and Clang 11.0.0).
T
core: arm: kern.ld.S: fix ROUNDUP() and ROUNDDOWN() for Clang
Fixes exceptions on boot when CFG_WITH_ASLR=y CFG_WITH_PAGER=y and the Clang toolchain is used (tested with QEMUv8 and Clang 11.0.0).
The Clang linker happens to generate non-relocatable references to symbols defined by expressions in the linker script which involve some arithmetic operations on another symbol. More specifically, when rounding up or down addresses to page boundaries using the expressions defined in <util.h>. This commit introduces different ways of doing ROUNDUP() and ROUNDDOWN() which work with both Clang and GCC: - ROUNDUP() is replaced with the linker ALIGN() built-in function, - ROUNDDOWN() is rewritten as 'symbol - something'.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| eb5f87aa | 26-Nov-2020 |
Jerome Forissier <jerome@forissier.org> |
core: arm: kern.ld.S: remove redundant line
__rodata_init_end is defined twice. Remove one instance.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wikland
core: arm: kern.ld.S: remove redundant line
__rodata_init_end is defined twice. Remove one instance.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 3ecd96bb | 22-Nov-2020 |
Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> |
core: Add support to import external TA signing public key
Build process requires that private key is present when signing TAs.
In order to support external HSM based re-signing of the TAs, add sup
core: Add support to import external TA signing public key
Build process requires that private key is present when signing TAs.
In order to support external HSM based re-signing of the TAs, add support to import different TA signing public key into TEE OS binary by introducing TA_PUBLIC_KEY.
By default TA_PUBLIC_KEY gets the value of TA_SIGN_KEY.
Re-signing of the TA's works by first signing TA during the build with private key readily available during the build process (TA_SIGN_KEY). Private key can in example be bundled key in keys/default_ta.pem.
Build will generate TA binary with signature embedded matching provided private key.
This TA binary will be sent for HSM re-signing process where digest will be calculated from the binary to get digest which will be signed with private key protected by HSM. New signature will replaced the old signature in the TA binary.
This re-signed TA will need to be deployed into the device for execution.
In order for OP-TEE OS to load the TA it needs to have the matching public key from the HSM. Public key needs to be available during the build process (TA_PUBLIC_KEY).
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
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| c232eb8d | 12-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: stmm: remove useless return values to local svc handlers
Remove the boolean return value from local functions stmm_handle_mem_mgr_service(), stmm_handle_storage_service(), spm_eret_error() and
core: stmm: remove useless return values to local svc handlers
Remove the boolean return value from local functions stmm_handle_mem_mgr_service(), stmm_handle_storage_service(), spm_eret_error() and spm_handle_direct_req() that all end returning to secure partition (StMM) execution. Rename return_helper() to return_from_sp_helper() and remove its return value as it only prepare returning to SP caller. No functional change.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4348e834 | 17-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: stmm: set panic flag when secure partition panics
Set the panic flag, that is in struct ta_ctx of the ts_ctx (trusted service context) instance, when the secure partition panics. This allows g
core: stmm: set panic flag when secure partition panics
Set the panic flag, that is in struct ta_ctx of the ts_ctx (trusted service context) instance, when the secure partition panics. This allows generic sequence to possibly release resources related to the secure partition instance.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d9339333 | 11-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: stmm: support 32bit execution
Add support for 32bit EL0 secure partition StMM when Core is 32bit.
Defines 32bit FFA identifiers FFA_SVC_*_32 and FFA_MSG_*_32. Defines SVC_REGS_Ax() macros to
core: stmm: support 32bit execution
Add support for 32bit EL0 secure partition StMM when Core is 32bit.
Defines 32bit FFA identifiers FFA_SVC_*_32 and FFA_MSG_*_32. Defines SVC_REGS_Ax() macros to wrap 32b/64b thread_svc_regs structure fields in StMM secure partition driver. Defines __FFA_* local macros to wrap 32b/64b service IDs.
Save usr_sp banked register in return_helper() has it shall be preserved when we will enter again the secure partition.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c899c027 | 11-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: stmm: fix storage syscalls return value
Fix the return value for the RPMB storage service where syscalls returned a TEE_Result value instead of a STMM_RET_* value.
Fixes: 42471ecf25b7 ("core:
core: stmm: fix storage syscalls return value
Fix the return value for the RPMB storage service where syscalls returned a TEE_Result value instead of a STMM_RET_* value.
Fixes: 42471ecf25b7 ("core: load stmm via secure partition") Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 2dfd8eef | 12-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: arm: helper function to read 32bit usr_sp banked register
Helper function thread_get_usr_sp() allows Core threaded execution to read usr_sp CPU register. This is needed as part of the secure p
core: arm: helper function to read 32bit usr_sp banked register
Helper function thread_get_usr_sp() allows Core threaded execution to read usr_sp CPU register. This is needed as part of the secure partition execution context when a secure partition execution is about to return to normal world.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 03889d54 | 24-Sep-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: se050: glue layer
The glue layer implements functionality required by the Plug And Trust library from OP-TEE.
1) user crypto operations: these operations must run outside the SE050 in orde
drivers: se050: glue layer
The glue layer implements functionality required by the Plug And Trust library from OP-TEE.
1) user crypto operations: these operations must run outside the SE050 in order to implement SCP03.
2) i2c operations: these operations provide access to the I2C bus to communicate with the SE050.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 60c2d1df | 24-Sep-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: build: se050 driver
Core work to support building the platform independent se050 crypto driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@fori
core: build: se050 driver
Core work to support building the platform independent se050 crypto driver.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| edd69b57 | 18-Nov-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
plat-imx: conf: don't force CRYPTO_DRIVER
A platform independent driver could be providing the CRYPTO_DRIVER functionality.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etie
plat-imx: conf: don't force CRYPTO_DRIVER
A platform independent driver could be providing the CRYPTO_DRIVER functionality.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 87d9fe00 | 18-Nov-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
plat-imx: conf: don't force SOFTWARE_PRNG
A platform independent driver could be providing a real RNG and therefore have different requirements with respect to the PRNG.
Signed-off-by: Jorge Ramire
plat-imx: conf: don't force SOFTWARE_PRNG
A platform independent driver could be providing a real RNG and therefore have different requirements with respect to the PRNG.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 5dfe86d0 | 25-Aug-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: svc store: delete keys from secure elements
The cryptographic API provides an interface for the creation of cryptographic keys.
These keys can be stored in secure elements and handlers to the
core: svc store: delete keys from secure elements
The cryptographic API provides an interface for the creation of cryptographic keys.
These keys can be stored in secure elements and handlers to these keys (since the keys themselves can not be read from the secure elements) given back to the caller.
When the object holding a key is being deleted, the cryptographic API must be informed in order to proceed with the deletion of the real key from the secure element.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| cb1b1ecd | 25-Aug-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: pta: SCP03 pseudo trusted application
Implement GlobalPlatform Secure Channel Protocol 3 control from REE. Secure boot requires that SCP03 is enabled as soon as secure storage is available (ie
core: pta: SCP03 pseudo trusted application
Implement GlobalPlatform Secure Channel Protocol 3 control from REE. Secure boot requires that SCP03 is enabled as soon as secure storage is available (ie RPMB).
Host side example: github.com/foundriesio/optee-scp03
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a3ca687d | 24-Sep-2020 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: implement se050 driver
Add AES_CTR/RSA/RNG/HUK support for NXP SE050 via the Plug And Trust library.
Tested on imx8mm LPDDR EVK and imx6ull EVK.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@
drivers: implement se050 driver
Add AES_CTR/RSA/RNG/HUK support for NXP SE050 via the Plug And Trust library.
Tested on imx8mm LPDDR EVK and imx6ull EVK.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6bd234d8 | 09-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: scmi: remove unused references
SCMI power domain and performance monitoring protocols are not implemented hence removing related references in STM32MP1 SCMI server.
Acked-by: Jerome
plat-stm32mp1: scmi: remove unused references
SCMI power domain and performance monitoring protocols are not implemented hence removing related references in STM32MP1 SCMI server.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 46dc38cb | 09-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: scmi: make local arrays static
Change local structures to static attribute since not exported outside scmi_server.c
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: E
plat-stm32mp1: scmi: make local arrays static
Change local structures to static attribute since not exported outside scmi_server.c
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 53ce77be | 05-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: scmi: handlers for STPMIC1 regulators
Add SCMI regulator platform handlers for regulators driven from STPMIC1 companion power chip.
STPMIC1 is under secure world exclusive access whe
plat-stm32mp1: scmi: handlers for STPMIC1 regulators
Add SCMI regulator platform handlers for regulators driven from STPMIC1 companion power chip.
STPMIC1 is under secure world exclusive access when its bus interface is secure. In such case voltage regulators controller by STPMIC1 can still be assigned to non-secure world control using SCMI Voltage Domain protocol to expose services for these regulators.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 2462139c | 14-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: stub stm32mp_nsec_can_access_pmic_regu() when no PMIC
Define a stub implementation for stm32mp_nsec_can_access_pmic_regu() when the platform does not embed its PMIC driver.
Acked-by:
plat-stm32mp1: stub stm32mp_nsec_can_access_pmic_regu() when no PMIC
Define a stub implementation for stm32mp_nsec_can_access_pmic_regu() when the platform does not embed its PMIC driver.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 301ade76 | 05-Nov-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: ltc: fix return value in crypto API SM2 PKA decrypt
Fix calloc() failure case in core crypto API function for SM2 PKE decryption. Prior this change the function failed but return 0/OK. This ch
core: ltc: fix return value in crypto API SM2 PKA decrypt
Fix calloc() failure case in core crypto API function for SM2 PKE decryption. Prior this change the function failed but return 0/OK. This change sets the return value to TEE_ERROR_OUT_OF_MEMORY before reaching the function exit sequence.
Fixes: f9a78287dd12 (core: ltc: add support for SM2 PKE) Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org>
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