core: move debug info and CC optimization level to config.mk

Move configuration switches CFG_DEBUG_INFO and CFG_CC_OPT_LEVEL
default values from arm.mk to config.mk and add a short description.

Sig

core: move debug info and CC optimization level to config.mk

Move configuration switches CFG_DEBUG_INFO and CFG_CC_OPT_LEVEL
default values from arm.mk to config.mk and add a short description.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: remove deprecated CFG_CC_OPTIMIZE_FOR_SIZE

Remove CFG_CC_OPTIMIZE_FOR_SIZE configuration size that is not used
and is incorrectly tested here (should be tested against != y).

Signed-off-

core: arm: remove deprecated CFG_CC_OPTIMIZE_FOR_SIZE

Remove CFG_CC_OPTIMIZE_FOR_SIZE configuration size that is not used
and is incorrectly tested here (should be tested against != y).

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-vexpress: enable CFG_ENABLE_EMBEDDED_TESTS by default

The vexpress platform family is mainly used for development and testing
so it makes sense to enable internal tests by default. What this do

plat-vexpress: enable CFG_ENABLE_EMBEDDED_TESTS by default

The vexpress platform family is mainly used for development and testing
so it makes sense to enable internal tests by default. What this does
currently is xtest 1001 runs core internal tests and xtest 1006 runs
TA bget tests.

As a result, remove redundant CFG_ENABLE_EMBEDDED_TESTS=y in the Azure
CI build script and add one configuration with tests disabled.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: new config switch CFG_PREALLOC_RPC_CACHE

CFG_PREALLOC_RPC_CACHE=y enables preallocation of an RPC shared memory
reference per secure thread. It is default enabled for backward
configuration co

core: new config switch CFG_PREALLOC_RPC_CACHE

CFG_PREALLOC_RPC_CACHE=y enables preallocation of an RPC shared memory
reference per secure thread. It is default enabled for backward
configuration compatibility.

Disabling CFG_PREALLOC_RPC_CACHE can be useful when CFG_WITH_PAGER=y
and the pager page pool is somewhat small as RPC cache shm consumes
several kByte of unpaged memory.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: arm: mm: add pager constraint on dynamic shm release functions

Fix missing pager constraints on dynamic shm release function. These
are needed since SMC function ID OPTEE_SMC_DISABLE_SHM_CACHE

core: arm: mm: add pager constraint on dynamic shm release functions

Fix missing pager constraints on dynamic shm release function. These
are needed since SMC function ID OPTEE_SMC_DISABLE_SHM_CACHE executes
in a fastcall SMC unpaged context and may call dynamic shm release
functions to release RPC preallocated shm.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: imx: add OCOTP driver

Add OCOTP driver for imx6, imx7, imx7ulp and imx8m platforms.
The implementation only supports the read of OCOTP shadow registers.
It also implements the tee_otp_get_d

drivers: imx: add OCOTP driver

Add OCOTP driver for imx6, imx7, imx7ulp and imx8m platforms.
The implementation only supports the read of OCOTP shadow registers.
It also implements the tee_otp_get_die_id() function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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poplar: disable CFG_SECURE_DATA_PATH by default

Since linaro-swg/linux.git branch optee [1] was rebased onto kernel
v5.12, Secure Data Path is broken in xtest [2] because the client side
is based on

poplar: disable CFG_SECURE_DATA_PATH by default

Since linaro-swg/linux.git branch optee [1] was rebased onto kernel
v5.12, Secure Data Path is broken in xtest [2] because the client side
is based on the ION allocator, which was removed from the kernel.

Therefore, disable SDP support by default.

Link: [1] https://github.com/linaro-swg/linux/tree/optee-v5.12-20210628
Link: [2] https://github.com/OP-TEE/optee_test/blob/3.13.0/host/xtest/regression_1000.c#L1220-L1263

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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core: imx: disable SNVS for imx8qx

Disable SNVS as it is not supported by i.MX8QX platforms.

Fixes: d3bf580a67 ("core: imx: add support for i.MX 8QxP")
Signed-off-by: Clement Faure <clement.faure@n

core: imx: disable SNVS for imx8qx

Disable SNVS as it is not supported by i.MX8QX platforms.

Fixes: d3bf580a67 ("core: imx: add support for i.MX 8QxP")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: workaround PL310 errata 752271

Under very rare circumstances and under the following conditions, the
double linefill can cause data corruption.

Conditions:
* The double linefill feature

core: imx: workaround PL310 errata 752271

Under very rare circumstances and under the following conditions, the
double linefill can cause data corruption.

Conditions:
* The double linefill feature is enabled.
* The L2 cache contains dirty data.

This fault is present in PL310 revisions r3p0, r3p1, r3p1-50rel0.
This fault is fixed in r3p2.

The only workaround to this errata is to disable the double linefill
feature. [1]

Link: [1] https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: tune PL310 configuration for mx6sll

Tune PL310 L2 cache controller for better performances:
* Enable double linefill
* Disable prefetch drop
* Set prefetch offset to 0xF

Fixes: 4dac83

core: imx: tune PL310 configuration for mx6sll

Tune PL310 L2 cache controller for better performances:
* Enable double linefill
* Disable prefetch drop
* Set prefetch offset to 0xF

Fixes: 4dac83288 ("core: imx: add imx6sll evk board support")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: enable CFG_NO_SMP for imx6sll

i.MX 6SLL does not have SMP extension.

Fixes: 4dac83288b ("core: imx: add imx6sll evk board support")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
A

core: imx: enable CFG_NO_SMP for imx6sll

i.MX 6SLL does not have SMP extension.

Fixes: 4dac83288b ("core: imx: add imx6sll evk board support")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: remove useless header include

Remove #include <arm32.h> since arm.h is already included.

Fixes: f51f270a70 ("core: arm: imx: get mmdc type")
Signed-off-by: Clement Faure <clement.faure@n

core: imx: remove useless header include

Remove #include <arm32.h> since arm.h is already included.

Fixes: f51f270a70 ("core: arm: imx: get mmdc type")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: crypto: fix ECC key size bytes to bits conversion

Convert the ECC key size from bytes to bits.
By adding the new key_size variable, it also fixes the crypto driver
traces bellow printing th

drivers: crypto: fix ECC key size bytes to bits conversion

Convert the ECC key size from bytes to bits.
By adding the new key_size variable, it also fixes the crypto driver
traces bellow printing the ECC key size from the variable that was
missing.

Fixes: d29cd2e ("core: driver: generic resources for crypto device driver - ECC")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: crypto: acipher: fix traces compilation

Cast key pointers to uintptr_t to avoid compilation warnings when crypto
driver traces are enabled (CFG_CRYPTO_DRIVER_DEBUG=0x1)

Fixes: 62590f0 ("dr

drivers: crypto: acipher: fix traces compilation

Cast key pointers to uintptr_t to avoid compilation warnings when crypto
driver traces are enabled (CFG_CRYPTO_DRIVER_DEBUG=0x1)

Fixes: 62590f0 ("drivers: crypto: implement crypto device driver - DSA")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: dma: fix copy data size

After each crypto operation that involves a DMA output, the content of
the SGT buffer is copied to the actual output buffer. Fix the DMA copy
function where th

drivers: caam: dma: fix copy data size

After each crypto operation that involves a DMA output, the content of
the SGT buffer is copied to the actual output buffer. Fix the DMA copy
function where the size of the data to be copied is either the full size
of the data processed by the CAAM (obj->sgtbuf.length) or the size of
the output buffer.

In some cases, the output buffer is smaller than the CAAM output. The
size of data to be copied is the smallest size between the CAAM output
data size and the output buffer size.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: imx: crypto_conf: i.mx 7ulp does not support CAAM PKHA

There is no support for CAAM PKHA in i.MX 7ULP SOC.

Fixes: c3d61ba ("core: imx: Add imx7ulp evk board support")
Signed-off-by: Silvano d

core: imx: crypto_conf: i.mx 7ulp does not support CAAM PKHA

There is no support for CAAM PKHA in i.MX 7ULP SOC.

Fixes: c3d61ba ("core: imx: Add imx7ulp evk board support")
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896

drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR

drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR
structure.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Sig

drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit

drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit 14 (SPLIT_KEY) that indicates the support for the split key.

Fixes: 81ab436 ("drivers: caam: implement NXP CAAM Driver - HMAC")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-T

drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-TEE
when resuming.
Modifying the TRNG "sample size" (the total number of entropy samples that
will be taken during entropy generation) from it's default conservative
value of 2500 to be more in line with the "sample size" that the caam
driver in U-boot/Linux kernel select(512) will solve the performance hit.

Changed the default minimum entropy delay value for I.MX 6SX from 4800
to 3200 to be in line with U-boot and Kernel setting for this value.
The higher default entropy delay value for OP-TEE would have caused a
perceived performance hit after/suspend resume.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Dragos Rosioru <dragos.rosioru@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must

drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must be 16 bytes
aligned.
The CAAM DMA object is adding the required bytes if the signature
output buffer is too short. The issue is that this additional
bytes were not added in the DMA buffer to be allocated.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is

drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is acked when leaving
caam_jr_dequeue() function.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: imx: rework digprog driver

Rework digprog read value for all i.MX platforms.
Add the distinction between i.MX8MQ B0 and B1 platforms.
Add soc_is_*() functions for all i.MX8mscale platforms.

F

core: imx: rework digprog driver

Rework digprog read value for all i.MX platforms.
Add the distinction between i.MX8MQ B0 and B1 platforms.
Add soc_is_*() functions for all i.MX8mscale platforms.

Fixes: 247f081a95 ("core: imx: re-work SoC version detection")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: introduce CFG_MX8M compilation flag

Introduce the CFG_MX8M compilation flag that designates the following
platforms:
* mx8mmevk
* mx8mnevk
* mx8mpevk
* mx8mqevk
It is used to define c

core: imx: introduce CFG_MX8M compilation flag

Introduce the CFG_MX8M compilation flag that designates the following
platforms:
* mx8mmevk
* mx8mnevk
* mx8mpevk
* mx8mqevk
It is used to define code and features common to i.MX8mscale
platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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