1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (C) 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017-2019, 2021 NXP 5 * 6 * Peng Fan <peng.fan@nxp.com> 7 */ 8 9 #include <config.h> 10 #include <console.h> 11 #include <io.h> 12 #include <imx.h> 13 #include <mm/core_mmu.h> 14 #include <mm/core_memprot.h> 15 #include <platform_config.h> 16 17 #define SOC_TYPE(reg) (((reg) & (0x00FF0000)) >> 16) 18 #define SOC_REV_MAJOR(reg) (((reg) & (0x0000FF00)) >> 8) 19 #define SOC_REV_MINOR(reg) ((reg) & (0x0000000F)) 20 #define SOC_REV_MINOR_MX7(reg) ((reg) & (0x000000FF)) 21 22 static uint32_t imx_digprog; 23 24 #ifdef ANATOP_BASE 25 uint32_t imx_get_digprog(void) 26 { 27 vaddr_t addr = 0; 28 29 if (imx_digprog) 30 return imx_digprog; 31 32 addr = core_mmu_get_va(ANATOP_BASE, MEM_AREA_IO_SEC, 0x1000); 33 if (!addr) 34 return 0; 35 36 imx_digprog = io_read32(addr + DIGPROG_OFFSET); 37 38 #ifdef CFG_MX8MQ 39 /* 40 * On the i.MX8MQ, the minor revision number must be updated to make 41 * the difference between B0 chip and the newer chips. 42 */ 43 addr = core_mmu_get_va(OCOTP_BASE, MEM_AREA_IO_SEC, OCOTP_SIZE); 44 if (!addr) 45 return 0; 46 47 if (io_read32(addr + OCOTP_SW_INFO_B1) == OCOTP_SW_MAGIC_B1) 48 imx_digprog |= BIT32(0); 49 #endif /* CFG_MX8MQ */ 50 51 return imx_digprog; 52 } 53 #else /* ANATOP_BASE */ 54 uint32_t imx_get_digprog(void) 55 { 56 if (imx_digprog) 57 return imx_digprog; 58 59 if (IS_ENABLED(CFG_MX7ULP)) 60 imx_digprog = SOC_MX7ULP << 16; 61 else if (IS_ENABLED(CFG_MX8QX)) 62 imx_digprog = SOC_MX8QX << 16; 63 else if (IS_ENABLED(CFG_MX8QM)) 64 imx_digprog = SOC_MX8QM << 16; 65 66 return imx_digprog; 67 } 68 #endif /* ANATOP_BASE */ 69 70 uint32_t imx_soc_rev_major(void) 71 { 72 if (imx_digprog == 0) 73 imx_get_digprog(); 74 75 return SOC_REV_MAJOR(imx_digprog); 76 } 77 78 uint32_t imx_soc_rev_minor(void) 79 { 80 if (imx_digprog == 0) 81 imx_get_digprog(); 82 83 if (IS_ENABLED(CFG_MX7)) 84 return SOC_REV_MINOR_MX7(imx_digprog); 85 else 86 return SOC_REV_MINOR(imx_digprog); 87 } 88 89 uint32_t imx_soc_type(void) 90 { 91 if (imx_digprog == 0) 92 imx_get_digprog(); 93 94 return SOC_TYPE(imx_digprog); 95 } 96 97 bool soc_is_imx6sl(void) 98 { 99 return imx_soc_type() == SOC_MX6SL; 100 } 101 102 bool soc_is_imx6sll(void) 103 { 104 return imx_soc_type() == SOC_MX6SLL; 105 } 106 107 bool soc_is_imx6sx(void) 108 { 109 return imx_soc_type() == SOC_MX6SX; 110 } 111 112 bool soc_is_imx6ul(void) 113 { 114 return imx_soc_type() == SOC_MX6UL; 115 } 116 117 bool soc_is_imx6ull(void) 118 { 119 return imx_soc_type() == SOC_MX6ULL; 120 } 121 122 bool soc_is_imx6sdl(void) 123 { 124 return imx_soc_type() == SOC_MX6DL; 125 } 126 127 bool soc_is_imx6dq(void) 128 { 129 return (imx_soc_type() == SOC_MX6Q) && (imx_soc_rev_major() == 0); 130 } 131 132 bool soc_is_imx6dqp(void) 133 { 134 return (imx_soc_type() == SOC_MX6Q) && (imx_soc_rev_major() == 1); 135 } 136 137 bool soc_is_imx6(void) 138 { 139 return ((imx_soc_type() == SOC_MX6SX) || 140 (imx_soc_type() == SOC_MX6UL) || 141 (imx_soc_type() == SOC_MX6ULL) || 142 (imx_soc_type() == SOC_MX6DL) || 143 (imx_soc_type() == SOC_MX6Q)); 144 } 145 146 bool soc_is_imx7ds(void) 147 { 148 return imx_soc_type() == SOC_MX7D; 149 } 150 151 bool soc_is_imx7ulp(void) 152 { 153 return imx_soc_type() == SOC_MX7ULP; 154 } 155 156 bool soc_is_imx8mq(void) 157 { 158 return imx_soc_type() == SOC_MX8M && imx_soc_rev_major() == 0x40; 159 } 160 161 bool soc_is_imx8mm(void) 162 { 163 return imx_soc_type() == SOC_MX8M && imx_soc_rev_major() == 0x41; 164 } 165 166 bool soc_is_imx8mn(void) 167 { 168 return imx_soc_type() == SOC_MX8M && imx_soc_rev_major() == 0x42; 169 } 170 171 bool soc_is_imx8mp(void) 172 { 173 return imx_soc_type() == SOC_MX8M && imx_soc_rev_major() == 0x43; 174 } 175 176 bool soc_is_imx8m(void) 177 { 178 return soc_is_imx8mq() || soc_is_imx8mm() || soc_is_imx8mn() || 179 soc_is_imx8mp(); 180 } 181 182 bool soc_is_imx8mq_b0_layer(void) 183 { 184 if (soc_is_imx8mq() && imx_soc_rev_minor() == 0x0) 185 return true; 186 else 187 return false; 188 } 189