| c689b8ee | 19-Jan-2022 |
Jelle Sels <jelle.sels@arm.com> |
core: spmc: Fix flags and tag in retrieve request
Inside check_retrieve_request() the flags and tag where swapped. Store them in the correct variable.
Fixes: de66193d9849 ("core: FF-A: ADD FFA_MEM_
core: spmc: Fix flags and tag in retrieve request
Inside check_retrieve_request() the flags and tag where swapped. Store them in the correct variable.
Fixes: de66193d9849 ("core: FF-A: ADD FFA_MEM_RETRIEVE for SPs") Signed-off-by: Jelle Sels <jelle.sels@arm.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8f3a1455 | 18-Jan-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
plat-stm32mp1: allow non-secure to read DDR registers
Changes stm32mp1 ETZPC configuration to allow non-secure read access to DDRCTRL and DDRPHYC interface register. This change will be needed by ne
plat-stm32mp1: allow non-secure to read DDR registers
Changes stm32mp1 ETZPC configuration to allow non-secure read access to DDRCTRL and DDRPHYC interface register. This change will be needed by next U-Boot release v2022.04 since merge of [1] in order to dynamically compute the DDR size.
Link: [1] https://source.denx.de/u-boot/u-boot/-/commit/d72e7bbe7c2841f161848d57b723495a731d0121 Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 2a7ffe2f | 28-Feb-2020 |
Silvano di Ninno <silvano.dininno@nxp.com> |
core: imx: add support for i.MX8DXL
Add the i.MX 8DXL SoC support.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org> |
| 8280ec5d | 13-Mar-2020 |
Silvano di Ninno <silvano.dininno@nxp.com> |
core: imx: crypto_conf: change CAAM default job ring for mscale platforms
Change the default CAAM job ring index from 0 to 2 for the following platforms: * imx8mmevk * imx8mnevk * imx8mpevk * im
core: imx: crypto_conf: change CAAM default job ring for mscale platforms
Change the default CAAM job ring index from 0 to 2 for the following platforms: * imx8mmevk * imx8mnevk * imx8mpevk * imx8mqevk It leaves JR0 available for the HAB to authenticate and decrypt boot images.
Fixes: 2d7a8964 ("driver: implement CAAM driver") Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 9567aeeb | 14-Jan-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx_wdog: fix compilation warning on watchdog driver
$ make PLATFORM=imx-mx7ulpevk CFG_DT=n core/drivers/imx_wdog.c:42:13: warning: ext_reset_output defined but not used [-Wunused-variable]
drivers: imx_wdog: fix compilation warning on watchdog driver
$ make PLATFORM=imx-mx7ulpevk CFG_DT=n core/drivers/imx_wdog.c:42:13: warning: ext_reset_output defined but not used [-Wunused-variable] 42 | static bool ext_reset_output; | ^~~~~~~~~~~~~~~~
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| c54ad22a | 17-Jan-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx_wdog: fix compilation watchdog driver on mx7ulp
Define WDOG_BASE and WDOG_SIZE value for mx7ulp platform.
$ make PLATFORM=imx-mx7ulpevk CFG_DT=n core/drivers/imx_wdog.c:151:42: error:
drivers: imx_wdog: fix compilation watchdog driver on mx7ulp
Define WDOG_BASE and WDOG_SIZE value for mx7ulp platform.
$ make PLATFORM=imx-mx7ulpevk CFG_DT=n core/drivers/imx_wdog.c:151:42: error: WDOG_BASE undeclared here (not in a function); did you mean WDOG_CS? 151 | register_phys_mem_pgdir(MEM_AREA_IO_SEC, WDOG_BASE, CORE_MMU_PGDIR_SIZE); |
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 42e17e72 | 25-Oct-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: enable the CAAM on imx8q platforms
Enabled the CAAM on the following platforms: * imx8qm * imx8qxp
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jero
core: imx: enable the CAAM on imx8q platforms
Enabled the CAAM on the following platforms: * imx8qm * imx8qxp
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 833c7e36 | 13-Mar-2020 |
Remi Koman <remi.koman@nxp.com> |
drivers: caam: fix aligned buffer allocation for DMA
For aligned memory buffer and DMA CAAM access, the allocated buffer size must be rounded up to a certain value depending of the DMA behaviour on
drivers: caam: fix aligned buffer allocation for DMA
For aligned memory buffer and DMA CAAM access, the allocated buffer size must be rounded up to a certain value depending of the DMA behaviour on the platform. For the imx8qm/qxp, the allocated aligned buffer size must be rounded up to 4 bytes.
Signed-off-by: Remi Koman <remi.koman@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 96ae1d34 | 25-Oct-2021 |
Clement Faure <clement.faure@nxp.com> |
core: imx: set CAAM configuration for imx8q platforms
Define the JR block size, JR index and the JR interruption number for the following platforms: * imx8qm * imx8qxp
Signed-off-by: Clement Faur
core: imx: set CAAM configuration for imx8q platforms
Define the JR block size, JR index and the JR interruption number for the following platforms: * imx8qm * imx8qxp
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 6b651796 | 17-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: clk: move stm32mp1 clock driver to clock drivers directory
Moves stm32mp15 clock driver to core/drivers/clk and adds configuration switch CFG_STM32MP15_CLK to embed or not the driver. Platf
drivers: clk: move stm32mp1 clock driver to clock drivers directory
Moves stm32mp15 clock driver to core/drivers/clk and adds configuration switch CFG_STM32MP15_CLK to embed or not the driver. Platform stm32mp1 mandates CFG_STM32MP15_CLK=y.
Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 551cc4e3 | 03-Dec-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: mandate generic clock driver support
Changes stm32mp1 platform to mandate use of the generic clock driver (CFG_DRVIERS_CLK=y). The platform clock driver implementation is updated to r
plat-stm32mp1: mandate generic clock driver support
Changes stm32mp1 platform to mandate use of the generic clock driver (CFG_DRVIERS_CLK=y). The platform clock driver implementation is updated to remove all implementation related to when CFG_DRVIERS_CLK is disabled.
CFG_DRIVERS_CLK_DT must be disabled if there is no embedded DTB for that platform.
Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 5709a67c | 30-Oct-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: register to clock framework
Changes stm32mp1 clock driver to register clocks in the clk framework upon CFG_DRIVERS_CLK=y. CFG_DRIVERS_CLK=y mandates CFG_EMBED_DTB=y for that platform.
plat-stm32mp1: register to clock framework
Changes stm32mp1 clock driver to register clocks in the clk framework upon CFG_DRIVERS_CLK=y. CFG_DRIVERS_CLK=y mandates CFG_EMBED_DTB=y for that platform.
When CFG_DRIVERS_CLK=y, static array stm32mp1_clk[] holds all registered clock instances, relating to either a clock gate referred in array stm32mp1_clk_gate[] and an always on clock from array stm32mp1_clk_on[].
Defines local helper functions clock_id_to_gate_index() and clock_id_to_always_on_index() to convert generic clock references into a platform local clock identifier that is the index of the target clock in its relative clock references array.
When CFG_DRIVERS_CLK is disabled, stm32mp1 clock legacy functions stm32_clock_*() call local clock driver. When CFG_DRIVERS_CLK=y, they call the generic clock API functions clk_*(). These platform clock legacy functions are preserved since used in platform specific functions implementation.
To optimize unpaged memory footprint, only few clock names are embedded and only upon debug trace level and only required clk_ops operators are linked in an unpaged memory section.
Acked-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 61487fe8 | 14-Jan-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: link: platform can define pager dummy resources
Allows platform to define paged and init dummy resources to allows platform specific resources to be linked in unpaged memory sections without p
core: link: platform can define pager dummy resources
Allows platform to define paged and init dummy resources to allows platform specific resources to be linked in unpaged memory sections without propagating their unpaged constraint to the resources they depend on.
Platform should implement source files link_dummies_paged.c and/or link_dummies_init.c from their platform directory when needed.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c78b2c66 | 17-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: add reset controller framework
Adds a common reset controller framework rstctrl for interfacing reset controllers exposed by a platform.
Reset controller consumers can act on relate reset
drivers: add reset controller framework
Adds a common reset controller framework rstctrl for interfacing reset controllers exposed by a platform.
Reset controller consumers can act on relate reset level with rstctrl_assert(), rstctrl_deassert() and friends.
Reset controller consumers can claim exclusive access to the reset level woth rstctrl_get_exclusive(), rstctrl_put_exclusive().
Reset controller provider drivers call rstctrl_register_provider() to allow other drivers to get a reset control reference from a devicetree reference. Reset controller driver are identified with type DT_DRIVER_RSTCTRL.
A reset controller provider exposes struct rstctrl instances made of an opaque private reference (a private data pointer or an unsigned integer identifier), an reset controller operators reference and the exclusive claim state.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4d3ad62d | 03-Dec-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
io.h: add WRITE_ONCE macro
Implements WRITE_ONCE() macro that ensures compiler will write memory only once. It is simple wrapper over __compiler_atomic_store() but its name emphasizes its purpose.
io.h: add WRITE_ONCE macro
Implements WRITE_ONCE() macro that ensures compiler will write memory only once. It is simple wrapper over __compiler_atomic_store() but its name emphasizes its purpose.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 27f5d377 | 14-Jan-2022 |
Jerome Forissier <jerome@forissier.org> |
core: remove __rodata_dtdrv_start and __rodata_dtdrv_end
Commit 61bdedea9452 ("core: define DT drivers using scattered arrays") omitted to remove the declarations and "dummy" definitions for symbols
core: remove __rodata_dtdrv_start and __rodata_dtdrv_end
Commit 61bdedea9452 ("core: define DT drivers using scattered arrays") omitted to remove the declarations and "dummy" definitions for symbols __rodata_dtdrv_start and __rodata_dtdrv_end, which are not used anymore. Remove them.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 61bdedea | 13-Jan-2022 |
Jerome Forissier <jerome@forissier.org> |
core: define DT drivers using scattered arrays
Replace the specific mechanism used to define and enumerate DT drivers with scattered arrays. Doing so simplifies the TEE linker file a bit.
Signed-of
core: define DT drivers using scattered arrays
Replace the specific mechanism used to define and enumerate DT drivers with scattered arrays. Doing so simplifies the TEE linker file a bit.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9e6889eb | 17-Dec-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: arm: mmu: fix find_map_by_pa() on areas end addresses
Fix find_map_by_pa() to test the inclusive end address of an area to prevent issues when end address overlaps size field byte size.
Revie
core: arm: mmu: fix find_map_by_pa() on areas end addresses
Fix find_map_by_pa() to test the inclusive end address of an area to prevent issues when end address overlaps size field byte size.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6b1672ef | 21-Oct-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: the FF-A ABI is now a stable ABI
The OP-TEE FF-A driver in the Linux kernel has been merged, so the changes in the ABI towards the Linux kernel from now on have to be backwards compatible.
Ac
core: the FF-A ABI is now a stable ABI
The OP-TEE FF-A driver in the Linux kernel has been merged, so the changes in the ABI towards the Linux kernel from now on have to be backwards compatible.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 869e41bf | 06-Jan-2022 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: drivers: se050: ecc shared secret
Allow clients to inject their own keypairs to derive the secret - the previous implementation only allowed for secure element NVM based keypairs to be used.
crypto: drivers: se050: ecc shared secret
Allow clients to inject their own keypairs to derive the secret - the previous implementation only allowed for secure element NVM based keypairs to be used.
By default, the secure element does not store all the possible EC curves in its internal memory; however attempting to inject a keypair when the curve is not in the secure element would cause the injection to fail.
This commit addresses that situation by generating those curves in the SE whenever they are not available.
Tested with TEE_ALG_ECDH_P192, TEE_ALG_ECDH_P224, TEE_ALG_ECDH_P256 and TEE_ALG_ECDH_P384 and TEE_ALG_ECDH_P521 (xtest 4009 passing)
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 3d02add2 | 11-Jan-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix race in ffa_inc_map()
Fixes a race in ffa_inc_map() when mapcount is 0. The problem goes like:
Thread 1 and 2 calls ffa_inc_map() at the same time and mapcount is 0. Thread 1 takes the lo
core: fix race in ffa_inc_map()
Fixes a race in ffa_inc_map() when mapcount is 0. The problem goes like:
Thread 1 and 2 calls ffa_inc_map() at the same time and mapcount is 0. Thread 1 takes the lock first and initializes mapcount to 1 and map the mobj etc.
When thread 2 has the lock it discovers that mapcount has been initialize while it was waiting for the lock.
Prior to this patch we where exiting the function doing nothing more since the mobj was mapped, but by doing so we'll miss to increase mapcount.
Fix this by restarting the call to refcount_inc() using a loop.
Fixes: 73e1d3f398b0 ("core: add mobj_ffa") Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 06ea466f | 29-Dec-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix race in mobj_reg_shm_inc_map()
Fixes a race in mobj_reg_shm_inc_map() when mapcount is 0. The problem goes like:
Thread 1 and 2 calls mobj_reg_shm_inc_map() at the same time and mapcount
core: fix race in mobj_reg_shm_inc_map()
Fixes a race in mobj_reg_shm_inc_map() when mapcount is 0. The problem goes like:
Thread 1 and 2 calls mobj_reg_shm_inc_map() at the same time and mapcount is 0. Thread 1 takes the lock first and initializes mapcount to 1 and map the mobj etc.
When thread 2 has the lock it discovers that mapcount has been initialize while it was waiting for the lock.
Prior to this patch we where exiting the function doing nothing more since the mobj was mapped, but by doing so we'll miss to increase mapcount.
Fix this by restarting the call to refcount_inc() using a loop.
Fixes: 37a6b717787b ("core: introduce CFG_CORE_DYN_SHM") Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8ae7e418 | 14-Dec-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: fix result argument description get_of_device_func
Fixes inline description of type get_of_device_func that falsely mentions TEE_ERROR_BUSY instead of TEE_ERROR_DEFER_DRIVER_INIT wh
core: dt_driver: fix result argument description get_of_device_func
Fixes inline description of type get_of_device_func that falsely mentions TEE_ERROR_BUSY instead of TEE_ERROR_DEFER_DRIVER_INIT when expected resource requests deferral of the driver probing.
Fixes: d8b14b46af9d ("core: dt_driver: get return code when querying a device") Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 45f25897 | 10-Jan-2022 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: crypto: rsa: handle not implemented sign/verify operations
Route the unimplemented RSA sign/verify optional cases to their software implementations.
Signed-off-by: Jorge Ramirez-Ortiz <jor
drivers: crypto: rsa: handle not implemented sign/verify operations
Route the unimplemented RSA sign/verify optional cases to their software implementations.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9c4aaf67 | 11-Jan-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make mobj_get_va() more secure
Adds a length parameter to allow mobj_get_va() to check that the entire va range requested is available.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.
core: make mobj_get_va() more secure
Adds a length parameter to allow mobj_get_va() to check that the entire va range requested is available.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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