| c413678c | 01-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_risab: add RISAB internal memory firewall driver
This driver implements the RISAB driver. Through RISAB registers, a
trusted compartment, or the compartment to which the page configur
drivers: stm32_risab: add RISAB internal memory firewall driver
This driver implements the RISAB driver. Through RISAB registers, a
trusted compartment, or the compartment to which the page configuration
has been delegated, configures the firewall attributes necessary to
access a page.
Each RISAB is dedicated to a internal memory and can cover 128KBytes of
data, separated in 32 pages of 4 KBytes, containing 8 blocks each.
It is possible to align a RISAB secure and privilege regions
allocations with an ARM Cortex M, which defines in its address space
configurable regions with a 256Bytes granularity. The configuration
would be 512Bytes block-based in order to align the two.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a6a331e5 | 02-Sep-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rifsc: restrain access on non secure peripherals for OP-TEE
Implement a driver specific firewall bus probe that will
only probe secure peripherals and implement firewall exceptions fo
drivers: stm32_rifsc: restrain access on non secure peripherals for OP-TEE
Implement a driver specific firewall bus probe that will
only probe secure peripherals and implement firewall exceptions for
which no firewall operations will be done when CFG_INSECURE is set.
This allows, for example, to share a console with the non-secure world
for development purposes.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 471cec14 | 29-Aug-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rifsc: update RIFSC as a firewall controller
Use the new firewall API to populate the firewall bus and register
the RIFSC as a firewall provider.
While there, update device tree RIF
drivers: stm32_rifsc: update RIFSC as a firewall controller
Use the new firewall API to populate the firewall bus and register
the RIFSC as a firewall provider.
While there, update device tree RIF macros and sort them in the correct
files. Register bit-field macros should be present in the driver while
device tree macros should be present in device tree bindings files.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1c32a0ea | 02-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rif: add stm32_rif_access_violation_action()
This function should be used by peripherals capable on raising
access violation interrupts (SERC, IAC). The behavior of the platform
on su
drivers: stm32_rif: add stm32_rif_access_violation_action()
This function should be used by peripherals capable on raising
access violation interrupts (SERC, IAC). The behavior of the platform
on such event is platform-specific. Therefore, its definition must be
done at platform level.
Also add CFG_STM32_PANIC_ON_IAC_EVENT and CFG_STM32_PANIC_ON_SERC_EVENT
to choose if the platform should panic upon receiving an IAC or a
SERC event.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 612f3e4f | 08-Jul-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: firewall: add stm32 SERC support
Add stm32 SERC driver support. The SERC driver collects accesses to
target peripherals that are either shutdown (computing clock off),
or under reset. Upon
drivers: firewall: add stm32 SERC support
Add stm32 SERC driver support. The SERC driver collects accesses to
target peripherals that are either shutdown (computing clock off),
or under reset. Upon such event, the platform panics as it is an
undesired event.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| cd187630 | 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: add stm32 RIFSC support
Add the RIFSC new driver support.
RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed
drivers: add stm32 RIFSC support
Add the RIFSC new driver support.
RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed of:
-RISC registers(slave peripherals) with RISUP(Resource Isolation
Slave Unit for Peripherals) OR RISAL(Resource Isolation Slave Unit
for Address space - Lite) logics.
-RIMC registers(Non RIF-Aware masters counterpart) with RIMU
(Resource Isolation Master Unit) logic. It is possible for a master to
inherit from its slave port(RISUP) configuration.
This driver parses the RIFSC device tree configuration and applies
it to put the firewall in place. Therefore, the device tree is
mandatory.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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