core: arm: mm: refactor LPAE translation table handling

Refactor translation table handling to use a more flexible layout of the
translation tables in memory. Instead of relying on multidimensional

core: arm: mm: refactor LPAE translation table handling

Refactor translation table handling to use a more flexible layout of the
translation tables in memory. Instead of relying on multidimensional
array use helper functions to calculate the address of each translation
table as needed.

Preparing for future changes, no change in behaviour.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: add boot mem paddings to the heap

Add the paddings added due to requested alignment in boot mem
allocations to the heap.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-b

core: arm: add boot mem paddings to the heap

Add the paddings added due to requested alignment in boot mem
allocations to the heap.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-rockchip: rk3588: add TRNG support

Add TRNG support for Rockchip rk3588

Signed-off-by: Ed Tubbs <ectubbs@gmail.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wik

plat-rockchip: rk3588: add TRNG support

Add TRNG support for Rockchip rk3588

Signed-off-by: Ed Tubbs <ectubbs@gmail.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-sam: enable SCMI reset domain management protocol and rstctrl driver

Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienn

plat-sam: enable SCMI reset domain management protocol and rstctrl driver

Enable CFG_SCMI_MSG_RESET_DOMAIN and CFG_DRIVERS_RSTCTRL.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5

Enable "reset domain management protocol", add reset domains to SCMI
channel and add functions for SCMI reset domain.

Signed-of

plat-sam: scmi_server: use SCMI reset to manage USB reset for sama7g5

Enable "reset domain management protocol", add reset domains to SCMI
channel and add functions for SCMI reset domain.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: guest ID test for notif and VM creation

Block normal world from calling OPTEE_SMC_VM_CREATED with reserved
hypervisor client-id (0) as VMID parameter.

Normal world calls OPTEE_SMC_VM_CRE

core: arm: guest ID test for notif and VM creation

Block normal world from calling OPTEE_SMC_VM_CREATED with reserved
hypervisor client-id (0) as VMID parameter.

Normal world calls OPTEE_SMC_VM_CREATED with guest VMID in a1 and
HYP_CLNT_ID in a7. This eventually leads to copying of __data_start
to __data_end from the default partition to the guest's MMU partition.
Everything goes well until normal world passes HYP_CLNT_ID into a1 which
goes unchecked in OPTEE. When the "second VM" is created from normal
world, the first VM's MMU partition's __data_start is copied into
the new VM's MMU partition which eventually breaks the bpool freelist
pointers.

This can deliberately be used by normal world to put OP-TEE into panic.

Set guest ID when NOTIF_EVENT_STARTED is called preventing assetion
failure in get_notif_data().

Fixes: d237e616e155 ("core: make generic notifications virtualization-aware")
Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF

notif_deliver_atomic_event() expects guest_id which
is used to retrieve struct guest_partition* from
virt_get_guest(). The guest_id passed is stati

core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF

notif_deliver_atomic_event() expects guest_id which
is used to retrieve struct guest_partition* from
virt_get_guest(). The guest_id passed is static (0),
which causes trouble when OPTEE_SMC_ENABLE_ASYNC_NOTIF
comes from a guest. When this happens, virt_get_guest()
returns NULL which fails the assertion in get_notif_data()
which exclusively checks for CONFIG_NS_VIRTUALIZATION.

Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Je

tree-wide: use ROUNDUP_DIV() where applicable

Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108

plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108 test cases of which 0 failed
| 0 test cases were skipped
| TEE test application done!

* Compiled with:
| make PLATFORM=telechips-tcc805x

Signed-off-by: Sungmin Han <sungminhan@telechips.com>
Signed-off-by: GY Hwang <gy.hwang@telechips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: hisilicon: add pbkdf2 algorithm

Add pbkdf2 algorithm for hisilicon SEC driver.

Signed-off-by: leisen <leisen1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@mi

drivers: microchip_pit: add driver for sama7g54's pit64b

Add support for the peripheral PIT64B in sama7g54. In the driver the clocks
are initialized for PIT64B.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-

plat-versal2: config to select console uart

Add configuration to select console uart for AMD Versal Gen 2 platform.
Console UART can be selected through CFG_CONSOLE_UART.
Defaults to UART0.

Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>

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vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when

vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE

Increase the emulated TrustZone SRAM size from 512 to 640 KB for the
vexpress-qemu_armv8a. This drastically improves the execution speed when
pager is enabled. For example, without this change the command
"time xtest regression_1006" takes around 3 minutes on my build machine,
but it takes only 9 seconds with the increased TZSRAM. Similarly, the
same test on the GitHub CI runners needs 10 minutes before the change
and only 15 seconds after.

This is related to commit 46fdfeea761f ("vexpress-qemu_armv8a: increase
CFG_CORE_HEAP_SIZE to 131072") and commit b4ed37a8c754 ("plat-vexpress:
increase QEMU heap size") which effectively took away 64K + 64KB from
the pager.

This is expected to solve the occasional timeouts that we see occurring
with the QEMUv8_check1 CI job.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: remove incr_refcnt()/decr_refcnt()

Remove platform specific refcount helper functions incr_refcnt()
and decr_refcnt() and related that are no more used since commit
f63f11bd1763 ("dri

plat-stm32mp1: remove incr_refcnt()/decr_refcnt()

Remove platform specific refcount helper functions incr_refcnt()
and decr_refcnt() and related that are no more used since commit
f63f11bd1763 ("drivers: stm32_rng: keep rng enable from initialization")
merged in OP-TEE tag 3.21.0.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: stm32_util.h: remove unused include files

Remove inclusion of header files no more needed in
plat-stm32mp1/stm32_util.h.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com

plat-stm32mp1: stm32_util.h: remove unused include files

Remove inclusion of header files no more needed in
plat-stm32mp1/stm32_util.h.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp2: remove deprecated shared_resource stub functions

Remove stm32mp2 platform shared_resources driver stub functions
stm32mp_register_secure_periph_iomem(),
stm32mp_register_non_secure_pe

plat-stm32mp2: remove deprecated shared_resource stub functions

Remove stm32mp2 platform shared_resources driver stub functions
stm32mp_register_secure_periph_iomem(),
stm32mp_register_non_secure_periph_iomem() and
stm32mp_register_gpioz_pin_count() since shared_resources platform driver,
inherited from stm32mp1, has been fully removed in the source tree.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked

plat-stm32mp1: remove deprecated shared_resource driver

Remove stm32mp1 platform shared_resources.c driver that is no more used.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()

Remove unused platform functions stm32mp_nsec_can_access_reset()
and stm32mp_gpio_bank_is_non_secure().

Signed-off-by: Etienne Carriere

plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()

Remove unused platform functions stm32mp_nsec_can_access_reset()
and stm32mp_gpio_bank_is_non_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()

Remove unused platform functions stm32mp_nsec_can_access_clock()
and stm32mp_gpio_bank_is_secure().

Signed-off-by: Etienne Carriere <eti

plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()

Remove unused platform functions stm32mp_nsec_can_access_clock()
and stm32mp_gpio_bank_is_secure().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config

Check whether or not an SCMI clock or SCMI reset domain can be accessed
using the firewall API instead of relying on shared_r

plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config

Check whether or not an SCMI clock or SCMI reset domain can be accessed
using the firewall API instead of relying on shared_resources.c driver.
This latter is not useless since integration of the firewall framework
and will be soon removed.

Remove also the buggy tests on SCMI reset being exposed that relied
on wrong API function stm32mp_nsec_can_access_clock(). Test on reset
domain being accessible or not is now dynamically handled with
nsec_can_access_resource().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework

plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework and
will soon be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework a

drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER

plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER

Driver stm32_iwdg only aims at exposing an OP-TEE watchdog
service hence declare CFG_STM32_IWDG dependency on CFG_WDT and
CFG_WDT_SM_HANDLER in stm32mp1 platform configuration file.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
-

plat-vexpress: increase QEMU heap size

The core heap usage is increased by around 20kB with fTPM enabled so it
makes sense if this has to be compensated.

Increase heap size for the QEMU variants:
- QEMU v7 from 64kB to 96kB
- QEMU v8 from 128kB to 192kB

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509

Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to
embed this feature in the TA test environment. Raw RSA is no more
a rec

plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509

Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to
embed this feature in the TA test environment. Raw RSA is no more
a recommended feature but can be required for some TLS v1.2
feature support. Therefore CFG_PKCS11_TA_RSA_X_509 has been disable
in PKCS#11 TA default configuration but should still be supported
hence we enable it in vexpress platforms that are intended to
test and development environments.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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