1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2018-2022, STMicroelectronics 4 */ 5 6 #ifndef __STM32_UTIL_H__ 7 #define __STM32_UTIL_H__ 8 9 #include <assert.h> 10 #include <drivers/clk.h> 11 #include <drivers/pinctrl.h> 12 #include <drivers/stm32_bsec.h> 13 #include <kernel/panic.h> 14 #include <stdint.h> 15 #include <tee_api_types.h> 16 #include <types_ext.h> 17 18 /* Backup registers and RAM utils */ 19 vaddr_t stm32mp_bkpreg(unsigned int idx); 20 21 /* Platform util for the RCC drivers */ 22 vaddr_t stm32_rcc_base(void); 23 24 /* Platform util for the GIC */ 25 vaddr_t get_gicd_base(void); 26 27 /* Platform util for PMIC support */ 28 bool stm32mp_with_pmic(void); 29 30 /* Power management service */ 31 #ifdef CFG_PSCI_ARM32 32 void stm32mp_register_online_cpu(void); 33 #else 34 static inline void stm32mp_register_online_cpu(void) 35 { 36 } 37 #endif 38 39 /* 40 * Generic spinlock function that bypass spinlock if MMU is disabled or 41 * lock is NULL. 42 */ 43 uint32_t may_spin_lock(unsigned int *lock); 44 void may_spin_unlock(unsigned int *lock, uint32_t exceptions); 45 46 /* Helper from platform RCC clock driver */ 47 struct clk *stm32mp_rcc_clock_id_to_clk(unsigned long clock_id); 48 49 extern const struct clk_ops stm32mp1_clk_ops; 50 51 /* Return rstctrl instance related to RCC reset controller DT binding ID */ 52 struct rstctrl *stm32mp_rcc_reset_id_to_rstctrl(unsigned int binding_id); 53 54 /* 55 * Structure and API function for BSEC driver to get some platform data. 56 * 57 * @base: BSEC interface registers physical base address 58 * @upper_start: Base ID for the BSEC upper words in the platform 59 * @max_id: Max value for BSEC word ID for the platform 60 */ 61 struct stm32_bsec_static_cfg { 62 paddr_t base; 63 unsigned int upper_start; 64 unsigned int max_id; 65 }; 66 67 void stm32mp_get_bsec_static_cfg(struct stm32_bsec_static_cfg *cfg); 68 69 /* 70 * Shared reference counter: increments by 2 on secure increment 71 * request, decrements by 2 on secure decrement request. Bit #0 72 * is set to 1 on non-secure increment request and reset to 0 on 73 * non-secure decrement request. These counters initialize to 74 * either 0, 1 or 2 upon their expect default state. 75 * Counters saturate to UINT_MAX / 2. 76 */ 77 #define SHREFCNT_NONSECURE_FLAG 0x1ul 78 #define SHREFCNT_SECURE_STEP 0x2ul 79 #define SHREFCNT_MAX (UINT_MAX / 2) 80 81 /* Return 1 if refcnt increments from 0, else return 0 */ 82 static inline int incr_shrefcnt(unsigned int *refcnt, bool secure) 83 { 84 int rc = !*refcnt; 85 86 if (secure) { 87 if (*refcnt < SHREFCNT_MAX) { 88 *refcnt += SHREFCNT_SECURE_STEP; 89 assert(*refcnt < SHREFCNT_MAX); 90 } 91 } else { 92 *refcnt |= SHREFCNT_NONSECURE_FLAG; 93 } 94 95 return rc; 96 } 97 98 /* Return 1 if refcnt decrements to 0, else return 0 */ 99 static inline int decr_shrefcnt(unsigned int *refcnt, bool secure) 100 { 101 int rc = 0; 102 103 if (secure) { 104 if (*refcnt < SHREFCNT_MAX) { 105 if (*refcnt < SHREFCNT_SECURE_STEP) 106 panic(); 107 108 *refcnt -= SHREFCNT_SECURE_STEP; 109 rc = !*refcnt; 110 } 111 } else { 112 rc = (*refcnt == SHREFCNT_NONSECURE_FLAG); 113 *refcnt &= ~SHREFCNT_NONSECURE_FLAG; 114 } 115 116 return rc; 117 } 118 119 static inline int incr_refcnt(unsigned int *refcnt) 120 { 121 return incr_shrefcnt(refcnt, true); 122 } 123 124 static inline int decr_refcnt(unsigned int *refcnt) 125 { 126 return decr_shrefcnt(refcnt, true); 127 } 128 129 bool stm32mp_allow_probe_shared_device(const void *fdt, int node); 130 131 #if defined(CFG_STM32MP15) && defined(CFG_WITH_PAGER) 132 /* 133 * Return the SRAM alias physical address related to @pa when applicable or 134 * @pa if it does not relate to an SRAMx non-aliased memory address. 135 */ 136 paddr_t stm32mp1_pa_or_sram_alias_pa(paddr_t pa); 137 138 /* Return whether or not the physical address range intersec pager secure RAM */ 139 bool stm32mp1_ram_intersect_pager_ram(paddr_t base, size_t size); 140 #else 141 static inline paddr_t stm32mp1_pa_or_sram_alias_pa(paddr_t pa) 142 { 143 return pa; 144 } 145 146 static inline bool stm32mp1_ram_intersect_pager_ram(paddr_t base __unused, 147 size_t size __unused) 148 { 149 return false; 150 } 151 #endif /*CFG_STM32MP15 && CFG_WITH_PAGER*/ 152 #endif /*__STM32_UTIL_H__*/ 153