History log of /optee_os/core/arch/ (Results 1351 – 1375 of 4104)
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495c0cbd08-Jul-2022 Sahil Malhotra <sahil.malhotra@nxp.com>

core: plat-ls: remove OP-TEE support for LS1012A-FRWY platform

LS1012A-FRWY does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: J

core: plat-ls: remove OP-TEE support for LS1012A-FRWY platform

LS1012A-FRWY does not support OP-TEE anymore, removing its
support.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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69ecfb9207-Jul-2022 Sahil Malhotra <sahil.malhotra@nxp.com>

core: plat-ls: set CFG_NUM_THREADS ?= 2 for LS1012ARDB

xtest regression_1009.3 fails on LS1012ARDB because the test needs
at least two threads but the default configuration for the platform
enables

core: plat-ls: set CFG_NUM_THREADS ?= 2 for LS1012ARDB

xtest regression_1009.3 fails on LS1012ARDB because the test needs
at least two threads but the default configuration for the platform
enables only one. Set CFG_NUM_THREADS ?= 2 to fix the issue.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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4dfc95b730-Jun-2022 Jens Wiklander <jens.wiklander@linaro.org>

core: pager: fix tzsram_end in init_runtime()

With pager enabled tzsram_end in init_runtime() is supposed to be a
virtual address. However TZSRAM_BASE is a physical address so this only
works as lon

core: pager: fix tzsram_end in init_runtime()

With pager enabled tzsram_end in init_runtime() is supposed to be a
virtual address. However TZSRAM_BASE is a physical address so this only
works as long as virtual and physical addresses can be used
interchangeably. With ASLR enabled this is not the case so fix this to
compensate for the offset between physical and virtual addresses.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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5c64ea9c11-Mar-2022 Clément Léger <clement.leger@bootlin.com>

plat-sam: nsec-service: handle SMC to set USB suspend

Handle the SMC that allows Linux to set USB suspend mode using the SFR.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne

plat-sam: nsec-service: handle SMC to set USB suspend

Handle the SMC that allows Linux to set USB suspend mode using the SFR.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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9ee6746511-Mar-2022 Clément Léger <clement.leger@bootlin.com>

plat-sam: sfr: add function to set usb suspend

This function allows to set the usb suspend mode using the SFR
peripheral. This will be used to execute a SMC that is going to be
issued by Linux sama5

plat-sam: sfr: add function to set usb suspend

This function allows to set the usb suspend mode using the SFR
peripheral. This will be used to execute a SMC that is going to be
issued by Linux sama5 USB driver.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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bbbbab0e06-Jun-2022 Clément Léger <clement.leger@bootlin.com>

plat-sam: sfr: set as secure if specified by the device-tree

The SFR can be set as secure using the matrix peripheral. If set as
secure-status = "okay" and status = "disabled" in the device-tree, th

plat-sam: sfr: set as secure if specified by the device-tree

The SFR can be set as secure using the matrix peripheral. If set as
secure-status = "okay" and status = "disabled" in the device-tree, then
configure the SFR as secure.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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2ac0535906-Jun-2022 Clément Léger <clement.leger@bootlin.com>

plat-sam: sfr: simplify code for sam_sfr_base()

Simplify the code logic to have less imbricated if().

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carrie

plat-sam: sfr: simplify code for sam_sfr_base()

Simplify the code logic to have less imbricated if().

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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0a03b33d28-Jun-2021 Clément Léger <clement.leger@bootlin.com>

plat-sam: split SFR code out of main.c file

Move SFR specific code to sam_sfr.c file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
S

plat-sam: split SFR code out of main.c file

Move SFR specific code to sam_sfr.c file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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b41798fa28-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: support rng pta with secure RNG source

Changes platform stm32mp1 configuration to default enable RNG PTA
support when CFG_WITH_SOFTWARE_PRNG is disable. This configuration
mandates st

plat-stm32mp1: support rng pta with secure RNG source

Changes platform stm32mp1 configuration to default enable RNG PTA
support when CFG_WITH_SOFTWARE_PRNG is disable. This configuration
mandates stm32mp1 RNG device and its resources to be assigned to the
secure world to be accessible at runtime.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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cd45149828-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

drivers: stm32_rng: implement plat_rng_init()

Moves plat_rng_init() definition from platform source file rng_seed.c
to core driver source stm32_rng.c. There is no platform magic needed
in this funct

drivers: stm32_rng: implement plat_rng_init()

Moves plat_rng_init() definition from platform source file rng_seed.c
to core driver source stm32_rng.c. There is no platform magic needed
in this function. As a result, seed_rng.c source file is removed.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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e25e30c728-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: seed PRNG with initialized rng device

Simplifies platform rng_seed.c implementation. Since a previous change
initializes stm32_rng driver before plat_rng_init() is called, it is now
p

plat-stm32mp1: seed PRNG with initialized rng device

Simplifies platform rng_seed.c implementation. Since a previous change
initializes stm32_rng driver before plat_rng_init() is called, it is now
possible to use stm32_rng_read() to get PRNG seed. The sequence is
simplified as stm32_rng_read() takes care of device resource dependencies.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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3c34b07c30-Jun-2022 Michael Doran <michael.doran@dornerworks.com>

plat-zynqmp: Added __nex_bss symbol for virtualization support

Without the __nex_bss symbol added to gic_data and console_data
the zynqmp platform results in a deadlock when attempting
to write to t

plat-zynqmp: Added __nex_bss symbol for virtualization support

Without the __nex_bss symbol added to gic_data and console_data
the zynqmp platform results in a deadlock when attempting
to write to the serial device on the platform. This fix resolves
the deadlock issue. More details can be found in the referred link.

Link: https://github.com/OP-TEE/optee_os/issues/5384
Signed-off-by: Michael Doran <michael.doran@dornerworks.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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15da69cf30-Jun-2022 Jelle Sels <jelle.sels@arm.com>

core: ffa: Enable handling 64-bit direct messages

Enable using the 64-bit version of the FF-A direct request and response
calls.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Et

core: ffa: Enable handling 64-bit direct messages

Enable using the 64-bit version of the FF-A direct request and response
calls.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jelle Sels <jelle.sels@arm.com>

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a9d09ada28-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

plat-synquacer: rename rng_pta.h to synquacer_rng_pta.h

Renames plat-synquacer rng_pta.h to synquacer_rng_pta.h to prevent
confusion with generic RNG PTA header file pta_rng.h.

Acked-by: Jerome For

plat-synquacer: rename rng_pta.h to synquacer_rng_pta.h

Renames plat-synquacer rng_pta.h to synquacer_rng_pta.h to prevent
confusion with generic RNG PTA header file pta_rng.h.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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e27e865a28-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

pta: rng: rename rng_pta_client.h to pta_rng.h

Renames RNG PTA exported header file from rng_pta_client.h to pta_rng.h
as the later follows PTAs header file name convention in optee_os
that is pta_x

pta: rng: rename rng_pta_client.h to pta_rng.h

Renames RNG PTA exported header file from rng_pta_client.h to pta_rng.h
as the later follows PTAs header file name convention in optee_os
that is pta_xxx.h.

Preserve rng_pta_client.h for backward compatibility. That header file
only includes pta_rng.h.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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3fc5c28713-May-2022 Clement Faure <clement.faure@nxp.com>

drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation

Disable the use of DCP unique key (0xfe in the DCP key selection) after
the HUK generation.
The DCP unique key is used to genera

drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation

Disable the use of DCP unique key (0xfe in the DCP key selection) after
the HUK generation.
The DCP unique key is used to generate the HUK at boot time. Disabling
the use of the unique key prevents the non-secure world from
re-generating the HUK.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx-mx6ullevk)

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976cbc5c27-Jun-2022 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: restore reserved shared memory

Restores OP-TEE reserved shared memory (the last MBytes of DRAM located
on top of the secure DDR) in STM32MP15 default configuration. This
default confi

plat-stm32mp1: restore reserved shared memory

Restores OP-TEE reserved shared memory (the last MBytes of DRAM located
on top of the secure DDR) in STM32MP15 default configuration. This
default configuration is needed to support mainline TF-A in conjunction
with mainline Linux kernel.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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513b074830-May-2022 Olivier Masse <olivier.masse@nxp.com>

plat-hikey: Add embedded DTB to define SDP

For Hikey, the Secure Data Path memory region definition is
done in an embedded dtb as defined in
Documentation/devicetree/bindings/reserved-memory/linaro,

plat-hikey: Add embedded DTB to define SDP

For Hikey, the Secure Data Path memory region definition is
done in an embedded dtb as defined in
Documentation/devicetree/bindings/reserved-memory/linaro,secure-heap.yaml

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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e2e497d407-Jun-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: introduce CFG_STM32MP1_SHARED_RESOURCES

It is now mandatory to enable CFG_STM32MP1_SHARED_RESOURCES to embed
shared_resources.c.

It is forced enabled for STM32MP15x boards and forced

plat-stm32mp1: introduce CFG_STM32MP1_SHARED_RESOURCES

It is now mandatory to enable CFG_STM32MP1_SHARED_RESOURCES to embed
shared_resources.c.

It is forced enabled for STM32MP15x boards and forced disabled for
STM32MP13x boards.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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1e1e5a4d07-Jun-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_shared_io: introduce shared io driver

This commit implements shared registers support, previously handled in
core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.

Defaul

drivers: stm32_shared_io: introduce shared io driver

This commit implements shared registers support, previously handled in
core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.

Default enable CFG_STM32_SHARED_IO.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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505c8fc407-Jun-2022 Jens Wiklander <jens.wiklander@linaro.org>

core: handle large holes in S-EL0 map

Prior to this patch it was assumed that the memory map of a user mode
context had no holes or very small holes. This leads to a higher pressure
on the translati

core: handle large holes in S-EL0 map

Prior to this patch it was assumed that the memory map of a user mode
context had no holes or very small holes. This leads to a higher pressure
on the translation tables than necessary.

So fix this by skipping to allocate translation tables for holes in the
memory map of a user mode context where possible.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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0117a8ef30-May-2022 Clement Faure <clement.faure@nxp.com>

core: ls: add CAAM_SIZE values for LS platforms

Add CAAM_SIZE values for all LS platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

2866fd9630-May-2022 Clement Faure <clement.faure@nxp.com>

core: imx: add CAAM_SIZE values for i.MX platforms

Add CAAM_SIZE values for all i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.

core: imx: add CAAM_SIZE values for i.MX platforms

Add CAAM_SIZE values for all i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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9272d51424-Jun-2022 Clément Léger <clement.leger@bootlin.com>

dts: sama5d2: Set tcb1 as secure

Add missing status-okay line to enable tcb1 for OP-TEE usage. Indeed,
the TCB block is used to provide a secure time source to OP-TEE TA.

Signed-off-by: Clément Lég

dts: sama5d2: Set tcb1 as secure

Add missing status-okay line to enable tcb1 for OP-TEE usage. Indeed,
the TCB block is used to provide a secure time source to OP-TEE TA.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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77b091e124-Jun-2022 Jerome Forissier <jerome.forissier@linaro.org>

core: make sure build date is always in English

Setting LANG=C before invoking the date command doesn't always result in
the "C" (English) locale being selected. The correct way is to set
LC_ALL. As

core: make sure build date is always in English

Setting LANG=C before invoking the date command doesn't always result in
the "C" (English) locale being selected. The correct way is to set
LC_ALL. As explained in the locale(7) man page:

If the second argument to setlocale(3) is an empty string, "", for the
default locale, it is determined using the following steps:

1. If there is a non-null environment variable LC_ALL, the value of
LC_ALL is used.

2. If an environment variable with the same name as one of the
categories above exists and is non-null, its value is used for that
category.

3. If there is a non-null environment variable LANG, the value of LANG
is used.

Fixes: 3e2b963515c1 ("core: use C locale when generating the build date")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Tested-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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