| 3399e5c1 | 18-Dec-2024 |
Yuvraj Sakshith <ysakshith@gmail.com> |
core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF
notif_deliver_atomic_event() expects guest_id which is used to retrieve struct guest_partition* from virt_get_guest(). The guest_id passed is stati
core: arm: pass guest ID to SMC_ENABLE_ASYNC_NOTIF
notif_deliver_atomic_event() expects guest_id which is used to retrieve struct guest_partition* from virt_get_guest(). The guest_id passed is static (0), which causes trouble when OPTEE_SMC_ENABLE_ASYNC_NOTIF comes from a guest. When this happens, virt_get_guest() returns NULL which fails the assertion in get_notif_data() which exclusively checks for CONFIG_NS_VIRTUALIZATION.
Signed-off-by: Yuvraj Sakshith <ysakshith@gmail.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 04e46975 | 16-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
tree-wide: use ROUNDUP_DIV() where applicable
Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Je
tree-wide: use ROUNDUP_DIV() where applicable
Use ROUNDUP_DIV() instead of ROUNDUP(..., size) / size where applicable.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c1e65709 | 23-Dec-2024 |
Sungmin Han <sungminhan@telechips.com> |
plat-telechips: Add initial support for Telechips platform (TCC805x)
This is the initial support for Telechips Platform (TCC805x).
* xtest results (-l 15): | 334474 subtests of which 0 failed | 108
plat-telechips: Add initial support for Telechips platform (TCC805x)
This is the initial support for Telechips Platform (TCC805x).
* xtest results (-l 15): | 334474 subtests of which 0 failed | 108 test cases of which 0 failed | 0 test cases were skipped | TEE test application done!
* Compiled with: | make PLATFORM=telechips-tcc805x
Signed-off-by: Sungmin Han <sungminhan@telechips.com> Signed-off-by: GY Hwang <gy.hwang@telechips.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7122f387 | 14-Dec-2024 |
leisen <leisen1@huawei.com> |
drivers: crypto: hisilicon: add pbkdf2 algorithm
Add pbkdf2 algorithm for hisilicon SEC driver.
Signed-off-by: leisen <leisen1@huawei.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> |
| 8796ab4a | 04-Nov-2024 |
Tony Han <tony.han@microchip.com> |
drivers: microchip_pit: add driver for sama7g54's pit64b
Add support for the peripheral PIT64B in sama7g54. In the driver the clocks are initialized for PIT64B.
Signed-off-by: Tony Han <tony.han@mi
drivers: microchip_pit: add driver for sama7g54's pit64b
Add support for the peripheral PIT64B in sama7g54. In the driver the clocks are initialized for PIT64B.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 79ea7b0a | 10-Dec-2024 |
Akshay Belsare <akshay.belsare@amd.com> |
plat-versal2: config to select console uart
Add configuration to select console uart for AMD Versal Gen 2 platform. Console UART can be selected through CFG_CONSOLE_UART. Defaults to UART0.
Signed-
plat-versal2: config to select console uart
Add configuration to select console uart for AMD Versal Gen 2 platform. Console UART can be selected through CFG_CONSOLE_UART. Defaults to UART0.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com>
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| c2e42a8f | 20-Dec-2024 |
Jerome Forissier <jerome.forissier@linaro.org> |
vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE
Increase the emulated TrustZone SRAM size from 512 to 640 KB for the vexpress-qemu_armv8a. This drastically improves the execution speed when
vexpress-qemu_armv8a: increase CFG_CORE_TZSRAM_EMUL_SIZE
Increase the emulated TrustZone SRAM size from 512 to 640 KB for the vexpress-qemu_armv8a. This drastically improves the execution speed when pager is enabled. For example, without this change the command "time xtest regression_1006" takes around 3 minutes on my build machine, but it takes only 9 seconds with the increased TZSRAM. Similarly, the same test on the GitHub CI runners needs 10 minutes before the change and only 15 seconds after.
This is related to commit 46fdfeea761f ("vexpress-qemu_armv8a: increase CFG_CORE_HEAP_SIZE to 131072") and commit b4ed37a8c754 ("plat-vexpress: increase QEMU heap size") which effectively took away 64K + 64KB from the pager.
This is expected to solve the occasional timeouts that we see occurring with the QEMUv8_check1 CI job.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| ccb65ffa | 18-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove incr_refcnt()/decr_refcnt()
Remove platform specific refcount helper functions incr_refcnt() and decr_refcnt() and related that are no more used since commit f63f11bd1763 ("dri
plat-stm32mp1: remove incr_refcnt()/decr_refcnt()
Remove platform specific refcount helper functions incr_refcnt() and decr_refcnt() and related that are no more used since commit f63f11bd1763 ("drivers: stm32_rng: keep rng enable from initialization") merged in OP-TEE tag 3.21.0.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 7fac2ff8 | 17-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: stm32_util.h: remove unused include files
Remove inclusion of header files no more needed in plat-stm32mp1/stm32_util.h.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com
plat-stm32mp1: stm32_util.h: remove unused include files
Remove inclusion of header files no more needed in plat-stm32mp1/stm32_util.h.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 0ba375c0 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp2: remove deprecated shared_resource stub functions
Remove stm32mp2 platform shared_resources driver stub functions stm32mp_register_secure_periph_iomem(), stm32mp_register_non_secure_pe
plat-stm32mp2: remove deprecated shared_resource stub functions
Remove stm32mp2 platform shared_resources driver stub functions stm32mp_register_secure_periph_iomem(), stm32mp_register_non_secure_periph_iomem() and stm32mp_register_gpioz_pin_count() since shared_resources platform driver, inherited from stm32mp1, has been fully removed in the source tree.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 1d4d2421 | 22-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove deprecated shared_resource driver
Remove stm32mp1 platform shared_resources.c driver that is no more used.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked
plat-stm32mp1: remove deprecated shared_resource driver
Remove stm32mp1 platform shared_resources.c driver that is no more used.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 90c3f137 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()
Remove unused platform functions stm32mp_nsec_can_access_reset() and stm32mp_gpio_bank_is_non_secure().
Signed-off-by: Etienne Carriere
plat-stm32mp1: remove unused stm32mp_nsec_can_access_reset()
Remove unused platform functions stm32mp_nsec_can_access_reset() and stm32mp_gpio_bank_is_non_secure().
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| ded57353 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()
Remove unused platform functions stm32mp_nsec_can_access_clock() and stm32mp_gpio_bank_is_secure().
Signed-off-by: Etienne Carriere <eti
plat-stm32mp1: remove unused stm32mp_nsec_can_access_clock()
Remove unused platform functions stm32mp_nsec_can_access_clock() and stm32mp_gpio_bank_is_secure().
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| b18ace9b | 22-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config
Check whether or not an SCMI clock or SCMI reset domain can be accessed using the firewall API instead of relying on shared_r
plat-stm32mp1: scmi_server: test reset/clock access against ETZPC config
Check whether or not an SCMI clock or SCMI reset domain can be accessed using the firewall API instead of relying on shared_resources.c driver. This latter is not useless since integration of the firewall framework and will be soon removed.
Remove also the buggy tests on SCMI reset being exposed that relied on wrong API function stm32mp_nsec_can_access_clock(). Test on reset domain being accessible or not is now dynamically handled with nsec_can_access_resource().
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| dd6b0423 | 09-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: remove PMIC registering to shared_resources driver
Remove registering of STM32MP1 PMIC driver to shared_resources driver that is deprecated since integration of the firewall framework
plat-stm32mp1: remove PMIC registering to shared_resources driver
Remove registering of STM32MP1 PMIC driver to shared_resources driver that is deprecated since integration of the firewall framework and will soon be removed.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 7a1f6540 | 22-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework a
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework and will soon be removed.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| d97509bf | 10-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER
Driver stm32_iwdg only aims at exposing an OP-TEE watchdog service hence declare CFG_STM32_IWDG dependency on CFG_WDT and CFG_WDT_SM_HANDLER
plat-stm32mp1: CFG_STM32_IWDG requires CFG_WDT_SM_HANDLER
Driver stm32_iwdg only aims at exposing an OP-TEE watchdog service hence declare CFG_STM32_IWDG dependency on CFG_WDT and CFG_WDT_SM_HANDLER in stm32mp1 platform configuration file.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| b4ed37a8 | 13-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-vexpress: increase QEMU heap size
The core heap usage is increased by around 20kB with fTPM enabled so it makes sense if this has to be compensated.
Increase heap size for the QEMU variants: -
plat-vexpress: increase QEMU heap size
The core heap usage is increased by around 20kB with fTPM enabled so it makes sense if this has to be compensated.
Increase heap size for the QEMU variants: - QEMU v7 from 64kB to 96kB - QEMU v8 from 128kB to 192kB
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 3672a61b | 11-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509
Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to embed this feature in the TA test environment. Raw RSA is no more a rec
plat-vexpress: conf: default enable CFG_PKCS11_TA_RSA_X_509
Default enable PKCS#11 TA config switch CFG_PKCS11_TA_RSA_X_509 to embed this feature in the TA test environment. Raw RSA is no more a recommended feature but can be required for some TLS v1.2 feature support. Therefore CFG_PKCS11_TA_RSA_X_509 has been disable in PKCS#11 TA default configuration but should still be supported hence we enable it in vexpress platforms that are intended to test and development environments.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| c1e499ae | 09-Dec-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32: disable stm32mp15 SD switch regulator node
SD switch regulator is not used by OP-TEE on STM32MP15 based boards hence disable this node in the OP-TEE secure device tree for boards DHCOR A
dts: stm32: disable stm32mp15 SD switch regulator node
SD switch regulator is not used by OP-TEE on STM32MP15 based boards hence disable this node in the OP-TEE secure device tree for boards DHCOR Avenger96 (stm32mp15xx-dhcor-avenger96.dtsi) ST ED1/EV1 (stm32mp157c-ed1.dts).
This change fixes a issue related to the integration of stm32_gpio driver as a firewall controller, which is highlighted by ab error trace message like:
E/TC:0 0 stm32_gpio_get_dt:837 node regulator-sd_switch requests secure GPIO F14 that cannot be secured E/TC:0 0 Panic
Fixes: 4675225ed84f ("drivers: stm32_gpio: check secure state of consumed GPIOs") Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 3ab39d2d | 20-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: add CFG_NS_VIRTUALIZATION boot log
Add a log entry when CFG_NS_VIRTUALIZATION is enabled, for example: D/TC:0 0 boot_init_primary_late:1028 NS-Virtualization enabled, supporting 2 guest
core: arm: add CFG_NS_VIRTUALIZATION boot log
Add a log entry when CFG_NS_VIRTUALIZATION is enabled, for example: D/TC:0 0 boot_init_primary_late:1028 NS-Virtualization enabled, supporting 2 guests
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8fda89c7 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()
Moves the implementation of core_mmu_init_virtualization() into core_mmu_init_phys_mem().
This simplifies init_primary() in c
core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()
Moves the implementation of core_mmu_init_virtualization() into core_mmu_init_phys_mem().
This simplifies init_primary() in core/arch/arm/kernel/boot.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e712be7a | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: initialize guest physical memory early
Initialize guest physical memory in virt_guest_created() before the first entry into the guest from normal world. This replaces the call to core_mmu_init
core: initialize guest physical memory early
Initialize guest physical memory in virt_guest_created() before the first entry into the guest from normal world. This replaces the call to core_mmu_init_phys_mem() in init_tee_runtime().
Remove unused code in core_mmu_init_phys_mem() and the now unused functions core_mmu_get_ta_range() and virt_get_ta_ram().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f1284346 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: allocate temporary memory map array
With CFG_BOOT_MEM enabled, allocate a temporary memory map array using boot_mem_alloc_tmp() instead of using the global static_mmap_regions[]. core_mmu_
core: mm: allocate temporary memory map array
With CFG_BOOT_MEM enabled, allocate a temporary memory map array using boot_mem_alloc_tmp() instead of using the global static_mmap_regions[]. core_mmu_save_mem_map() is added and called from boot_init_primary_late() before the temporary memory is reused.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d461c892 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: enable CFG_BOOT_MEM unconditionally
Enable CFG_BOOT_MEM unconditionally and call the boot_mem_*() functions as needed from entry_*.S and boot.c.
The pager will reuse all boot_mem memory
core: arm: enable CFG_BOOT_MEM unconditionally
Enable CFG_BOOT_MEM unconditionally and call the boot_mem_*() functions as needed from entry_*.S and boot.c.
The pager will reuse all boot_mem memory internally when configured. The non-pager configuration will unmap the memory and make it available for TAs if needed.
__FLATMAP_PAGER_TRAILING_SPACE is removed from the link script, collect_mem_ranges() in core/mm/core_mmu.c maps the memory following VCORE_INIT_RO automatically.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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