| d45fc140 | 26-Nov-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: add missing field in memory access descriptor
FF-A v1.2 introduced a 16 byte implementation-defined field in the endpoint memory access descriptor. Update all handling of struct ffa_mem_a
core: ffa: add missing field in memory access descriptor
FF-A v1.2 introduced a 16 byte implementation-defined field in the endpoint memory access descriptor. Update all handling of struct ffa_mem_access to for correct access regardless of FF-A version.
With this patch, OP-TEE will use the updated memory access descriptor, but ignore the impdef field.
Suggested-by: Olivier Deprez <olivier.deprez@arm.com> Fixes: bef959c837fe ("core: arm: ffa: switch to FF-A version 1.2") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| c5dcc5a1 | 15-Nov-2025 |
Aleksandr Iashchenko <aleksandr.iashchenko@linutronix.de> |
core: arm64: increase thread stack size with KASAN/check-stacks
Increase STACK_THREAD_SIZE from 10 KiB to 12 KiB when CFG_CORE_SANITIZE_KADDRESS is enabled.
With the previous size, some regression
core: arm64: increase thread stack size with KASAN/check-stacks
Increase STACK_THREAD_SIZE from 10 KiB to 12 KiB when CFG_CORE_SANITIZE_KADDRESS is enabled.
With the previous size, some regression tests (for example regression_1006 "Test Basic OS features") may fail due to stack canary corruption caused by the additional stack usage from instrumentation.
Signed-off-by: Aleksandr Iashchenko <aleksandr.iashchenko@linutronix.de> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8c8f3bae | 24-Oct-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: verify thread ID before resuming S-EL0 SP
Check that the thread ID for an S-EL0 SP is correct before trying to resume it. This guards against resuming an unrelated thread.
Signed-off-by:
core: ffa: verify thread ID before resuming S-EL0 SP
Check that the thread ID for an S-EL0 SP is correct before trying to resume it. This guards against resuming an unrelated thread.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 6af74df5 | 24-Oct-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: fix direct request error code for S-EL0 SP
Direct requests to S-EL0 SPs are delivered using a thread. If no thread is available return FFA_BUSY, to let the caller know that it should try
core: ffa: fix direct request error code for S-EL0 SP
Direct requests to S-EL0 SPs are delivered using a thread. If no thread is available return FFA_BUSY, to let the caller know that it should try again. This should normally never happen, but let's do our best for a corner case.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 00338334 | 31-Oct-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: support dynamic protected memory lending
With CFG_CORE_DYN_PROTMEM=y support dynamic protected memory lending.
A new internal struct mobj_ffa_rsm is added to handle dynamic protected memory f
core: support dynamic protected memory lending
With CFG_CORE_DYN_PROTMEM=y support dynamic protected memory lending.
A new internal struct mobj_ffa_rsm is added to handle dynamic protected memory for FF-A.
A new internal struct mobj_protmem is add to handle dynamic protected memory without FF-A.
Lending non-secure memory to OP-TEE to use it as protected memory means that it should to become inaccessible by the normal world as part of the process. This part is currently not supported, since it must be done in a platform specific way for platforms that support that. QEMU don't support that.
Adding two platform specific functions, plat_get_protmem_config() and plat_set_protmem_range() for dynamic protected memory. The functions has __weak implementation to allow easier testing. However, plat_set_protmem_range() requires CFG_INSECURE=y since it doesn't change memory protection.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 3c2e09b3 | 31-Oct-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ABI description for dynamic protected memory
Extend the SMC and FF-A ABI to handle dynamic protected memory lending. The capability bits OPTEE_SMC_SEC_CAP_DYNAMIC_PROTMEM and OPTEE_FFA_SEC_CAP
core: ABI description for dynamic protected memory
Extend the SMC and FF-A ABI to handle dynamic protected memory lending. The capability bits OPTEE_SMC_SEC_CAP_DYNAMIC_PROTMEM and OPTEE_FFA_SEC_CAP_PROTMEM respectively tells its availability.
OPTEE_MSG_CMD_GET_PROTMEM_CONFIG tells the minimal size and required alignment of protected memory to lend.
For the SMC ABI, OPTEE_MSG_CMD_LEND_PROTMEM lends protected memory and OPTEE_MSG_CMD_RECLAIM_PROTMEM returns the memory to normal world use.
For the FF-A ABI, FFA_LEND framework request followed by OPTEE_MSG_CMD_ASSIGN_PROTMEM lends protected memory and OPTEE_FFA_RELEASE_PROTMEM followed by the FFA_RECLAIM framework request returns the memory to normal world use.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 89f492f5 | 01-Oct-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: SMC ABI to return protected memory configuration
Extend the SMC ABI to return the protect memory configuration.
A capability bit, OPTEE_SMC_SEC_CAP_PROTMEM, is added to announce that the
core: arm: SMC ABI to return protected memory configuration
Extend the SMC ABI to return the protect memory configuration.
A capability bit, OPTEE_SMC_SEC_CAP_PROTMEM, is added to announce that the new SMC fast call OPTEE_SMC_GET_PROTMEM_CONFIG is available. OPTEE_SMC_GET_PROTMEM_CONFIG returns the physical memory range of reserved protected memory.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 0cbde272 | 26-Nov-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: sync ABI description files
Syncs the ABI description files optee_ffa.h and optee_msg.h with their counterpart in the Linux kernel driver. Small changes in comments and introduction of uint8_t
core: sync ABI description files
Syncs the ABI description files optee_ffa.h and optee_msg.h with their counterpart in the Linux kernel driver. Small changes in comments and introduction of uint8_t octets[24] as an alternative to struct optee_msg_param_value value.
No ABI changes or extensions.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| cd2d617e | 25-Jun-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64.h: add {read,write}_cntp_{ct,tva,cva}l()
Add wrapper functions to read and write to the EL1 physical timer registers cntp_ctl_el0, cntp_tval_el0, and cntp_cval_el0. These registers are u
core: arm64.h: add {read,write}_cntp_{ct,tva,cva}l()
Add wrapper functions to read and write to the EL1 physical timer registers cntp_ctl_el0, cntp_tval_el0, and cntp_cval_el0. These registers are used when using the Arm Generic Timer with CFG_CORE_SEL2_SPMC=y (Hafnium as SPMC at S-EL2).
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 26685a91 | 15-Mar-2025 |
Yu-Chien Peter Lin <peter.lin@sifive.com> |
core: mm: factor out virtual address range validation to arch code
Move virtual address range validation into architecture-specific code since different architectures have different constraints on v
core: mm: factor out virtual address range validation to arch code
Move virtual address range validation into architecture-specific code since different architectures have different constraints on valid VA ranges:
- For ARM, addresses must be within the VA width supported by the MMU - For RISC-V, additional checks are needed on RV64 to ensure addresses are canonically valid
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Reviewed-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 59724f22 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: dynamic allocation of thread_core_local and its stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local and the two stacks, tmp_stack and abt_stack, recorded in it.
Si
core: dynamic allocation of thread_core_local and its stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local and the two stacks, tmp_stack and abt_stack, recorded in it.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| a2b343ee | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: increase tmp stack size for debug
Increase STACK_TMP_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jero
core: arm64: increase tmp stack size for debug
Increase STACK_TMP_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ecf08061 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: add framework for Logical SPs
Add a framework to register Logical Secure Partitions in parallel with OP-TEE at S-EL1. This is akin to Pseudo TAs, it provides an ABI but it's part of
core: arm: ffa: add framework for Logical SPs
Add a framework to register Logical Secure Partitions in parallel with OP-TEE at S-EL1. This is akin to Pseudo TAs, it provides an ABI but it's part of the OP-TEE binary. A critical difference is that it's only available for FF-A and can only use the non-threaded environment, that is, no mutexes or RPC.
The logical OP-TEE core partition is registered in the framework. The SPMC is also registered in the framework, but with a nil UUID so it's not returned by FFA_PARTITION_INFO_GET.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| 5c85c87e | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: sp_partition_info_get() takes uuid_words[]
Replace the TEE_UUID *ffa_uuid parameter with uint32_t ffa_uuid_words[4] to simplify how sp_partition_info_get() is called.
Signed-off-by: Jens
core: ffa: sp_partition_info_get() takes uuid_words[]
Replace the TEE_UUID *ffa_uuid parameter with uint32_t ffa_uuid_words[4] to simplify how sp_partition_info_get() is called.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| fc6415c4 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: add spmc_is_reserved_id()
Add spmc_is_reserved_id() and replace direct checks against spmd_id and spmc_id. spmd_id and spmc_id are changed to static variables since they don't need to be
core: ffa: add spmc_is_reserved_id()
Add spmc_is_reserved_id() and replace direct checks against spmd_id and spmc_id. spmd_id and spmc_id are changed to static variables since they don't need to be exported any longer.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| 325d4963 | 11-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: add platform-specific abort handler
Platforms may have specific code to handle an abort when fault type is FAULT_TYPE_IGNORE. Add plat_abort_handler() that can be overridden at platform level
core: add platform-specific abort handler
Platforms may have specific code to handle an abort when fault type is FAULT_TYPE_IGNORE. Add plat_abort_handler() that can be overridden at platform level.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bef959c8 | 02-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: switch to FF-A version 1.2
Update FF-A minor version from 1 to 2. spmc_exchange_version() is updated to take the new version into account when negotiating with a caller.
Configurati
core: arm: ffa: switch to FF-A version 1.2
Update FF-A minor version from 1 to 2. spmc_exchange_version() is updated to take the new version into account when negotiating with a caller.
Configurations with SPMC at EL3 and S-EL2 supplies an SP manifest when booting OP-TEE, read the FF-A version to use from the manifest instead of using the hard coded version.
The configuration with SPMC at S-EL1, part of OP-TEE, keep the FF-A version at version 1.1 when configured with CFG_NS_VIRTUALIZATION=y as workaround to remain compatible with Xen. This workaround will not be needed after the next Xen release and can be removed then.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ddec5d6b | 04-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs
Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The extended ABI is only used for FF-A v1.2 SPs .
Signed-off-by: Jens Wiklande
core: ffa: update FFA_CONSOLE_LOG_64 for v1.2 SPs
Update FFA_CONSOLE_LOG_64 to handle the ABI extension for FF-A v1.2. The extended ABI is only used for FF-A v1.2 SPs .
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 750a54aa | 03-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: add FF-A version 1.2 defines
Add defines for SMC IDs introduced with FF-A version 1.2.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.
core: arm: ffa: add FF-A version 1.2 defines
Add defines for SMC IDs introduced with FF-A version 1.2.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| d17db2af | 03-Dec-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs covers the registers
core: arm: ffa: use SMC Calling Convention 1.2
Add struct thread_smc_1_2_regs as a replacement for struct thread_smc_args when dealing with FF-A SMCs. struct thread_smc_1_2_regs covers the registers x0-x17 to support passing arguments and results according to SMC Calling Convention (SMCCC) version 1.2.
The difference is that before this change x8-x17 couldn't be used as argument nor result and the content was preserved. With this patch are x8-x17 returned as zeroes. New FF-A SMCs can take and return values in the full range x0-x17.
64-bit SMCCC version 1.1 and earlier specified x4-x17 as unpredictable or scratch registers. FF-A has specified x0-x7 as argument and result registers, regardless of SMCCC. This has changed with SMCCC version 1.2 where the two standards harmonize on this.
struct thread_smc_1_2_regs is added in a 32-bit version for compatibility, but it only covers r0-r7.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 18715752 | 09-Jul-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: refactor LPAE translation table handling
Refactor translation table handling to use a more flexible layout of the translation tables in memory. Instead of relying on multidimensional
core: arm: mm: refactor LPAE translation table handling
Refactor translation table handling to use a more flexible layout of the translation tables in memory. Instead of relying on multidimensional array use helper functions to calculate the address of each translation table as needed.
Preparing for future changes, no change in behaviour.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 03f158e9 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: increase thread stack size for debug
Increase STACK_THREAD_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Foriss
core: arm64: increase thread stack size for debug
Increase STACK_THREAD_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f0489baa | 04-Nov-2024 |
Sungbae Yoo <sungbaey@nvidia.com> |
core: change get_core_pos_mpidr() to support hypervisor
The secure hypervisor, such as Hafnium, is expected to manipulate MPIDR_EL1 to indicate a VCPU ID.
This commit makes get_core_pos_mpidr() not
core: change get_core_pos_mpidr() to support hypervisor
The secure hypervisor, such as Hafnium, is expected to manipulate MPIDR_EL1 to indicate a VCPU ID.
This commit makes get_core_pos_mpidr() not calculate a CPU ID using the affinity bitfields of MPIDR_EL1 when there is a hypervisor in SEL2.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Sungbae Yoo <sungbaey@nvidia.com>
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| b1e25277 | 14-Aug-2024 |
Yu Chien Peter Lin <peterlin@andestech.com> |
core: mm: core_mmu: add core_mmu_user_va_range_is_defined() for RISC-V
The function hasn't been implemented for RISC-V, so move the core_mmu_user_va_range_is_defined() definition to generic core_mmu
core: mm: core_mmu: add core_mmu_user_va_range_is_defined() for RISC-V
The function hasn't been implemented for RISC-V, so move the core_mmu_user_va_range_is_defined() definition to generic core_mmu.h and function implementations to arch-specific files.
Also, update the assertions where checks if user va range is defined.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Alvin Chang <alvinga@andestech.com> Tested-by: Alvin Chang <alvinga@andestech.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8dfdf392 | 19-Jan-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rpmb: probe for kernel RPMB driver
Three RPC functions are added to support RPMB probing and properly align RPMB frames, OPTEE_RPC_CMD_RPMB_PROBE_RESET, OPTEE_RPC_CMD_RPMB_PROBE_NEXT, and OPTE
core: rpmb: probe for kernel RPMB driver
Three RPC functions are added to support RPMB probing and properly align RPMB frames, OPTEE_RPC_CMD_RPMB_PROBE_RESET, OPTEE_RPC_CMD_RPMB_PROBE_NEXT, and OPTEE_RPC_CMD_RPMB_FRAMES.
OPTEE_RPC_CMD_RPMB_PROBE_RESET resets probing to a well known state and returns the shared memory type needed when allocating shared memory for communication with later RPMB functions.
OPTEE_RPC_CMD_RPMB_PROBE_NEXT selects the next RPMB device and returns its device information. Later calls to OPTEE_RPC_CMD_RPMB will use this selected device.
OPTEE_RPC_CMD_RPMB_FRAMES sends the raw RPMB frames to normal world for further routing to the RPMB device.
tee_rpmb_reinit() is added to allow re-initializing the RPMB FS if a boot stage has used RPMB.
Backwards compatibility is maintained by falling back to the old type of initialization if OPTEE_RPC_CMD_RPMB_PROBE_RESET returns TEE_ERROR_NOT_SUPPORTED.
Whether RPMB devices are probed by the kernel or tee-supplicant is decided by the kernel driver where the shared memory type returned by OPTEE_RPC_CMD_RPMB_PROBE_RESET plays a vital role.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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