1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20ifeq ($(ARCH),arm) 21CROSS_COMPILE ?= arm-linux-gnueabihf- 22CROSS_COMPILE64 ?= aarch64-linux-gnu- 23endif 24ifeq ($(ARCH),riscv) 25CROSS_COMPILE ?= riscv-linux-gnu- 26CROSS_COMPILE64 ?= riscv64-linux-gnu- 27endif 28CROSS_COMPILE32 ?= $(CROSS_COMPILE) 29COMPILER ?= gcc 30 31# For convenience 32ifdef CFLAGS 33CFLAGS32 ?= $(CFLAGS) 34CFLAGS64 ?= $(CFLAGS) 35endif 36 37# Compiler warning level. 38# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 39WARNS ?= 3 40 41# Path to the Python interpreter used by the build system. 42# This variable is set to the default python3 interpreter in the user's 43# path. But build environments that require more explicit control can 44# set the path to a specific interpreter through this variable. 45PYTHON3 ?= python3 46 47# Define DEBUG=1 to compile without optimization (forces -O0) 48# DEBUG=1 49ifeq ($(DEBUG),1) 50# For backwards compatibility 51$(call force,CFG_CC_OPT_LEVEL,0) 52$(call force,CFG_DEBUG_INFO,y) 53endif 54 55# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 56# Optimize for size by default, usually gives good performance too. 57CFG_CC_OPT_LEVEL ?= s 58 59# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 60CFG_DEBUG_INFO ?= y 61 62# If y, enable debug features of the TEE core (assertions and lock checks 63# are enabled, panic and assert messages are more verbose, data and prefetch 64# aborts show a stack dump). When disabled, the NDEBUG directive is defined 65# so assertions are disabled. 66CFG_TEE_CORE_DEBUG ?= y 67 68# Log levels for the TEE core. Defines which core messages are displayed 69# on the secure console. Disabling core log (level set to 0) also disables 70# logs from the TAs. 71# 0: none 72# 1: error 73# 2: error + info 74# 3: error + info + debug 75# 4: error + info + debug + flow 76CFG_TEE_CORE_LOG_LEVEL ?= 2 77 78# TA log level 79# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 80# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 81# when the TA is built. 82CFG_TEE_TA_LOG_LEVEL ?= 1 83 84# TA enablement 85# When defined to "y", TA traces are output according to 86# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 87CFG_TEE_CORE_TA_TRACE ?= y 88 89# If y, enable the memory leak detection feature in the bget memory allocator. 90# When this feature is enabled, calling mdbg_check(1) will print a list of all 91# the currently allocated buffers and the location of the allocation (file and 92# line number). 93# Note: make sure the log level is high enough for the messages to show up on 94# the secure console! For instance: 95# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 96# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 97# - To debug TEE core allocations: build OP-TEE with: 98# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 99CFG_TEE_CORE_MALLOC_DEBUG ?= n 100CFG_TEE_TA_MALLOC_DEBUG ?= n 101# Prints an error message and dumps the stack on failed memory allocations 102# using malloc() and friends. 103CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 104 105# Mask to select which messages are prefixed with long debugging information 106# (severity, core ID, thread ID, component name, function name, line number) 107# based on the message level. If BIT(level) is set, the long prefix is shown. 108# Otherwise a short prefix is used (severity and component name only). 109# Levels: 0=none 1=error 2=info 3=debug 4=flow 110CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 111 112# Number of threads 113CFG_NUM_THREADS ?= 2 114 115# API implementation version 116CFG_TEE_API_VERSION ?= GPD-1.1-dev 117 118# Implementation description (implementation-dependent) 119CFG_TEE_IMPL_DESCR ?= OPTEE 120 121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 122# World? 123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 124 125# The following values are not extracted from the "git describe" output because 126# we might be outside of a Git environment, or the tree may have been cloned 127# with limited depth not including any tag, so there is really no guarantee 128# that TEE_IMPL_VERSION contains the major and minor revision numbers. 129CFG_OPTEE_REVISION_MAJOR ?= 4 130CFG_OPTEE_REVISION_MINOR ?= 6 131CFG_OPTEE_REVISION_EXTRA ?= 132 133# Trusted OS implementation version 134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 135 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 136 137# Trusted OS implementation manufacturer name 138CFG_TEE_MANUFACTURER ?= LINARO 139 140# Trusted firmware version 141CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 142 143# Trusted OS implementation manufacturer name 144CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 145 146# Rich Execution Environment (REE) file system support: normal world OS 147# provides the actual storage. 148# This is the default FS when enabled (i.e., the one used when 149# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 150CFG_REE_FS ?= y 151 152# CFG_REE_FS_HTREE_HASH_SIZE_COMPAT, when enabled, supports the legacy 153# REE FS hash tree tagging implementation that uses a truncated hash. 154# Be warned that disabling this config could break accesses to existing 155# REE FS content. 156CFG_REE_FS_HTREE_HASH_SIZE_COMPAT ?= y 157 158# RPMB file system support 159CFG_RPMB_FS ?= n 160 161# Enable roll-back protection of REE file system using RPMB. 162# Roll-back protection only works if CFG_RPMB_FS = y. 163CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 164$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 165 166# Device identifier used when CFG_RPMB_FS = y. 167# The exact meaning of this value is platform-dependent. On Linux, the 168# tee-supplicant process will open /dev/mmcblk<id>rpmb 169CFG_RPMB_FS_DEV_ID ?= 0 170 171# This config variable determines the number of entries read in from RPMB at 172# once whenever a function traverses the RPMB FS. Increasing the default value 173# has the following consequences: 174# - More memory required on heap. A single FAT entry currently has a size of 175# 256 bytes. 176# - Potentially significant speed-ups for RPMB I/O. Depending on how many 177# entries a function needs to traverse, the number of time-consuming RPMB 178# read-in operations can be reduced. 179# Chosing a proper value is both platform- (available memory) and use-case- 180# dependent (potential number of FAT fs entries), so overwrite in platform 181# config files 182CFG_RPMB_FS_RD_ENTRIES ?= 8 183 184# Enables caching of FAT FS entries when set to a value greater than zero. 185# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 186# entries. The cache is populated when FAT FS entries are initially read in. 187# When traversing the FAT FS entries, we read from the cache instead of reading 188# in the entries from RPMB storage. Consequently, when a FAT FS entry is 189# written, the cache is updated. In scenarios where an estimate of the number 190# of FAT FS entries can be made, the cache may be specifically tailored to 191# store all entries. The caching can improve RPMB I/O at the cost 192# of additional memory. 193# Without caching, we temporarily require 194# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 195# while traversing the FAT FS (e.g. in read_fat). 196# For example 8*256 bytes = 2kB while in read_fat. 197# With caching, we constantly require up to 198# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 199# depending on how many elements are in the cache, and additional temporary 200# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 201# in case the cache is too small to hold all elements when traversing. 202CFG_RPMB_FS_CACHE_ENTRIES ?= 0 203 204# Print RPMB data frames sent to and received from the RPMB device 205CFG_RPMB_FS_DEBUG_DATA ?= n 206 207# Clear RPMB content at cold boot 208CFG_RPMB_RESET_FAT ?= n 209 210# Use a hard coded RPMB key instead of deriving it from the platform HUK 211CFG_RPMB_TESTKEY ?= n 212 213# Enables RPMB key programming by the TEE, in case the RPMB partition has not 214# been configured yet. 215# !!! Security warning !!! 216# Do *NOT* enable this in product builds, as doing so would allow the TEE to 217# leak the RPMB key. 218# This option is useful in the following situations: 219# - Testing 220# - RPMB key provisioning in a controlled environment (factory setup) 221CFG_RPMB_WRITE_KEY ?= n 222 223# For the kernel driver to enable in-kernel RPMB routing it must know in 224# advance that OP-TEE supports it. Setting CFG_RPMB_ANNOUNCE_PROBE_CAP=y 225# will announce OP-TEE's capability for RPMB probing to the kernel and it 226# will use in-kernel RPMB routing, without it all RPMB commands will be 227# routed to tee-supplicant. This option is intended give some control over 228# how the RPMB commands are routed to simplify testing. 229CFG_RPMB_ANNOUNCE_PROBE_CAP ?= y 230 231_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 232 233# Signing key for OP-TEE TA's 234# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 235# key and then set TA_PUBLIC_KEY to match public key from the HSM. 236# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 237TA_SIGN_KEY ?= keys/default_ta.pem 238TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 239 240# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used 241# to verify a TA instead. To sign a TA using a previously prepared subkey 242# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS. It is 243# typically used by assigning the following in the TA Makefile: 244# BINARY = <TA-uuid-string> 245# TA_SIGN_KEY = subkey.pem 246# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta 247# TA_SUBKEY_DEPS = subkey.bin 248# See the documentation for more details on subkeys. 249 250# Include lib/libutils/isoc in the build? Most platforms need this, but some 251# may not because they obtain the isoc functions from elsewhere 252CFG_LIBUTILS_WITH_ISOC ?= y 253 254# Include lib/libutils/compiler-rt in the build. Most platforms need this. 255# Provides some functions called "compiler builtins", which the compiler 256# may invoke to perform low-level operations such as long long division 257# etc. Such functions typically come with compiler runtime libraires (GCC 258# has libgcc, Clang has compiler-rt). OP-TEE often can't use them because 259# they may be Linux-specific or bring unwanted dependencies. Therefore, 260# this imports and builds only what's needed. 261CFG_LIBUTILS_WITH_COMPILER_RT ?= y 262 263# Enables floating point support for user TAs 264# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 265# hard-float is basically a super set of soft-float. Hard-float 266# requires all the support routines provided for soft-float, but the 267# compiler may choose to optimize to not use some of them and use 268# the floating-point registers instead. 269# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 270# nothing with ` -mgeneral-regs-only`) 271# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 272CFG_TA_FLOAT_SUPPORT ?= y 273 274# Stack unwinding: print a stack dump to the console on core or TA abort, or 275# when a TA panics. 276# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 277# unwound (not paged TAs, however). 278# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 279# this option will increase the size of the 32-bit TEE binary by a few KB. 280# Similarly, TAs have to be compiled with -funwind-tables (default when the 281# option is set) otherwise they can't be unwound. 282# Warning: since the unwind sequence for user-mode (TA) code is implemented in 283# the privileged layer of OP-TEE, enabling this feature will weaken the 284# user/kernel isolation. Therefore it should be disabled in release builds. 285ifeq ($(CFG_TEE_CORE_DEBUG),y) 286CFG_UNWIND ?= y 287endif 288 289# Enable support for dynamically loaded user TAs 290CFG_WITH_USER_TA ?= y 291 292# Build user TAs included in this source tree 293CFG_BUILD_IN_TREE_TA ?= y 294 295# Choosing the architecture(s) of user-mode libraries (used by TAs) 296# 297# Platforms may define a list of supported architectures for user-mode code 298# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 299# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 300# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 301# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 302# The first entry in $(supported-ta-targets) has a special role, see 303# CFG_USER_TA_TARGET_<ta-name> below. 304# 305# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 306# change the order of the values. 307# 308# The list of TA architectures is ultimately stored in $(ta-targets). 309 310# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 311# defined, selects the unique TA architecture mode for building the in-tree TA 312# <ta-name>. Can be either ta_arm32 or ta_arm64. 313# By default, in-tree TAs are built using the first architecture specified in 314# $(ta-targets). 315 316# Address Space Layout Randomization for user-mode Trusted Applications 317# 318# When this flag is enabled, the ELF loader will introduce a random offset 319# when mapping the application in user space. ASLR makes the exploitation of 320# memory corruption vulnerabilities more difficult. 321CFG_TA_ASLR ?= y 322 323# How much ASLR may shift the base address (in pages). The base address is 324# randomly shifted by an integer number of pages comprised between these two 325# values. Bigger ranges are more secure because they make the addresses harder 326# to guess at the expense of using more memory for the page tables. 327CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 328CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 329 330# Address Space Layout Randomization for TEE Core 331# 332# When this flag is enabled, the early init code will introduce a random 333# offset when mapping TEE Core. ASLR makes the exploitation of memory 334# corruption vulnerabilities more difficult. 335CFG_CORE_ASLR ?= y 336 337# Stack Protection for TEE Core 338# This flag enables the compiler stack protection mechanisms -fstack-protector. 339# It will check the stack canary value before returning from a function to 340# prevent buffer overflow attacks. Stack protector canary logic will be added 341# for vulnerable functions that contain: 342# - A character array larger than 8 bytes. 343# - An 8-bit integer array larger than 8 bytes. 344# - A call to alloca() with either a variable size or a constant size bigger 345# than 8 bytes. 346CFG_CORE_STACK_PROTECTOR ?= n 347# This enable stack protector flag -fstack-protector-strong. Stack protector 348# canary logic will be added for vulnerable functions that contain: 349# - An array of any size and type. 350# - A call to alloca(). 351# - A local variable that has its address taken. 352CFG_CORE_STACK_PROTECTOR_STRONG ?= y 353# This enable stack protector flag -fstack-protector-all. Stack protector canary 354# logic will be added to all functions regardless of their vulnerability. 355CFG_CORE_STACK_PROTECTOR_ALL ?= n 356# Stack Protection for TA 357CFG_TA_STACK_PROTECTOR ?= n 358CFG_TA_STACK_PROTECTOR_STRONG ?= y 359CFG_TA_STACK_PROTECTOR_ALL ?= n 360 361_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \ 362 CFG_CORE_STACK_PROTECTOR_STRONG \ 363 CFG_CORE_STACK_PROTECTOR_ALL) 364_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \ 365 CFG_TA_STACK_PROTECTOR_STRONG \ 366 CFG_TA_STACK_PROTECTOR_ALL) 367 368# Load user TAs from the REE filesystem via tee-supplicant 369CFG_REE_FS_TA ?= y 370 371# Pre-authentication of TA binaries loaded from the REE filesystem 372# 373# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 374# "Secure DDR" pool, check the signature, then process the file only if it is 375# valid. 376# - If disabled: hash the binaries as they are being processed and verify the 377# signature as a last step. 378CFG_REE_FS_TA_BUFFERED ?= n 379$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 380 381# When CFG_REE_FS=y: 382# Allow secure storage in the REE FS to be entirely deleted without causing 383# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 384# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 385# can be used to reset the secure storage to a clean, empty state. 386# Intended to be used for testing only since it weakens storage security. 387# Warning: If enabled for release build then it will break rollback protection 388# of TAs and the entire REE FS secure storage. 389CFG_REE_FS_ALLOW_RESET ?= n 390 391# Support for loading user TAs from a special section in the TEE binary. 392# Such TAs are available even before tee-supplicant is available (hence their 393# name), but note that many services exported to TAs may need tee-supplicant, 394# so early use is limited to a subset of the TEE Internal Core API (crypto...) 395# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 396# file(s). For example: 397# $ make ... \ 398# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 399# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 400# Typical build steps: 401# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 402# # headers, makefiles), ready to build TAs. 403# # CFG_EARLY_TA=y is optional, it prevents 404# # later library recompilations. 405# <build some TAs> 406# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 407# 408# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 409# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 410# <name-of-ta>/<uuid> 411# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 412ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 413$(call force,CFG_EARLY_TA,y) 414else 415CFG_EARLY_TA ?= n 416endif 417 418ifeq ($(CFG_EARLY_TA),y) 419$(call force,CFG_EMBEDDED_TS,y) 420endif 421 422ifneq ($(SP_PATHS),) 423$(call force,CFG_EMBEDDED_TS,y) 424else 425CFG_SECURE_PARTITION ?= n 426endif 427 428ifeq ($(CFG_SECURE_PARTITION),y) 429$(call force,CFG_EMBEDDED_TS,y) 430endif 431 432ifeq ($(CFG_EMBEDDED_TS),y) 433$(call force,CFG_ZLIB,y) 434endif 435 436# By default the early TAs are compressed in the TEE binary, it is possible to 437# not compress them with CFG_EARLY_TA_COMPRESS=n 438CFG_EARLY_TA_COMPRESS ?= y 439 440# Enable paging, requires SRAM, can't be enabled by default 441CFG_WITH_PAGER ?= n 442 443# Use the pager for user TAs 444CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 445 446# If paging of user TAs, that is, R/W paging default to enable paging of 447# TAG and IV in order to reduce heap usage. 448CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 449 450# Runtime lock dependency checker: ensures that a proper locking hierarchy is 451# used in the TEE core when acquiring and releasing mutexes. Any violation will 452# cause a panic as soon as the invalid locking condition is detected. If 453# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 454# records the call stacks when locks are taken, and prints them when a 455# potential deadlock is found. 456# Expect a significant performance impact when enabling this. 457CFG_LOCKDEP ?= n 458CFG_LOCKDEP_RECORD_STACK ?= y 459 460# BestFit algorithm in bget reduces the fragmentation of the heap when running 461# with the pager enabled or lockdep 462CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 463 464# Enable support for detected undefined behavior in C 465# Uses a lot of memory, can't be enabled by default 466CFG_CORE_SANITIZE_UNDEFINED ?= n 467CFG_TA_SANITIZE_UNDEFINED ?= n 468 469# Enable Kernel Address sanitizer, has a huge performance impact, uses a 470# lot of memory and need platform specific adaptations, can't be enabled by 471# default 472CFG_CORE_SANITIZE_KADDRESS ?= n 473 474ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR)) 475$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible) 476endif 477 478# Add stack guards before/after stacks and periodically check them 479CFG_WITH_STACK_CANARIES ?= y 480 481# Use compiler instrumentation to troubleshoot stack overflows. 482# When enabled, most C functions check the stack pointer against the current 483# stack limits on entry and panic immediately if it is out of range. 484CFG_CORE_DEBUG_CHECK_STACKS ?= n 485 486# Use when the default stack allocations are not sufficient. 487CFG_STACK_THREAD_EXTRA ?= 0 488CFG_STACK_TMP_EXTRA ?= 0 489 490# Device Tree support 491# 492# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 493# device tree blob (DTB) parsing from the core. 494# 495# When CFG_DT is enabled, the TEE _start function expects to find 496# the address of a DTB in register X2/R2 provided by the early boot stage 497# or value 0 if boot stage provides no DTB. 498# 499# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 500# and the external device tree is expected to be used/modified. Its value 501# defaults to CFG_DT. 502# 503# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 504# be in the secure memory. 505# 506# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 507# relative path of a DTS file located in core/arch/$(ARCH)/dts. 508# The DTS file is compiled into a DTB file which content is embedded in a 509# read-only section of the core. 510ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 511CFG_EMBED_DTB ?= y 512endif 513ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 514 $(CFG_CORE_EL3_SPMC)),y) 515$(call force,CFG_DT,y) 516endif 517CFG_EMBED_DTB ?= n 518CFG_DT ?= n 519CFG_EXTERNAL_DT ?= $(CFG_DT) 520CFG_MAP_EXT_DT_SECURE ?= n 521ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 522$(call force,CFG_DT,y) 523endif 524 525# This option enables OP-TEE to support boot arguments handover via Transfer 526# List defined in Firmware Handoff specification. 527# Note: This is an experimental feature and incompatible ABI changes can be 528# expected. It should be off by default until Firmware Handoff specification 529# has a stable release. 530# This feature requires the support of Device Tree. 531CFG_TRANSFER_LIST ?= n 532$(eval $(call cfg-enable-all-depends,CFG_TRANSFER_LIST, \ 533 CFG_DT CFG_EXTERNAL_DT CFG_MAP_EXT_DT_SECURE)) 534 535# Maximum size of the Device Tree Blob, has to be large enough to allow 536# editing of the supplied DTB. 537CFG_DTB_MAX_SIZE ?= 0x10000 538 539# CFG_DT_CACHED_NODE_INFO, when enabled, parses the embedded DT at boot 540# time and caches some information to speed up retrieve of DT node data, 541# more specifically those for which libfdt parses the full DTB to find 542# the target node information. 543CFG_DT_CACHED_NODE_INFO ?= $(CFG_EMBED_DTB) 544$(eval $(call cfg-depends-all,CFG_DT_CACHED_NODE_INFO,CFG_EMBED_DTB)) 545 546# Maximum size of the init info data passed to Secure Partitions. 547CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 548 549# Device Tree Overlay support. 550# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 551# external DTB. The overlay is created when no valid DTB overlay is found. 552# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 553# DTB location. 554# External DTB location (physical address) is provided either by boot 555# argument arg2 or from CFG_DT_ADDR if defined. 556# A subsequent boot stage can then merge the generated overlay DTB into a main 557# DTB using the standard fdt_overlay_apply() method. 558CFG_EXTERNAL_DTB_OVERLAY ?= n 559CFG_GENERATE_DTB_OVERLAY ?= n 560 561ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 562$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 563endif 564_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 565 CFG_GENERATE_DTB_OVERLAY) 566 567# All embedded tests are supposed to be disabled by default, this flag 568# is used to control the default value of all other embedded tests 569CFG_ENABLE_EMBEDDED_TESTS ?= n 570 571# Enable core self tests and related pseudo TAs 572CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 573# Embed transfer list support self test when enabled 574CFG_TRANSFER_LIST_TEST ?= $(call cfg-all-enabled,CFG_TRANSFER_LIST \ 575 CFG_TEE_CORE_EMBED_INTERNAL_TESTS) 576 577# Compiles bget_main_test() to be called from a test TA 578CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 579 580# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests. 581# This also requires embedding a DTB with expected content. 582# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 583# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 584CFG_DT_DRIVER_EMBEDDED_TEST ?= n 585ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 586CFG_DRIVERS_CLK ?= y 587CFG_DRIVERS_GPIO ?= y 588CFG_DRIVERS_RSTCTRL ?= y 589CFG_DRIVERS_CLK_EARLY_PROBE ?= n 590$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 591endif 592 593# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure 594# clients to retrieve debug and statistics information on core and loaded TAs. 595CFG_WITH_STATS ?= n 596 597# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 598# parsing in the embedded DTB for driver probing. The alternative is 599# an exploration based on compatible drivers found. It is default disabled. 600CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 601 602# This option enables OP-TEE to respond to SMP boot request: the Rich OS 603# issues this to request OP-TEE to release secondaries cores out of reset, 604# with specific core number and non-secure entry address. 605CFG_BOOT_SECONDARY_REQUEST ?= n 606 607# Default heap size for Core, 64 kB 608CFG_CORE_HEAP_SIZE ?= 65536 609 610# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION 611# is enabled 612CFG_CORE_NEX_HEAP_SIZE ?= 16384 613 614# TA profiling. 615# When this option is enabled, OP-TEE can execute Trusted Applications 616# instrumented with GCC's -pg flag and will output profiling information 617# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 618# tee-supplicant) 619# Note: this does not work well with shared libraries at the moment for a 620# couple of reasons: 621# 1. The profiling code assumes a unique executable section in the TA VA space. 622# 2. The code used to detect at run time if the TA is intrumented assumes that 623# the TA is linked statically. 624CFG_TA_GPROF_SUPPORT ?= n 625 626# TA function tracing. 627# When this option is enabled, OP-TEE can execute Trusted Applications 628# instrumented with GCC's -pg flag and will output function tracing 629# information for all functions compiled with -pg to 630# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant). 631CFG_FTRACE_SUPPORT ?= n 632 633# Core syscall function tracing. 634# When this option is enabled, OP-TEE core is instrumented with GCC's 635# -pg flag and will output syscall function graph in user TA ftrace 636# buffer 637CFG_SYSCALL_FTRACE ?= n 638$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 639 640# Enable to compile user TA libraries with profiling (-pg). 641# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 642CFG_ULIBS_MCOUNT ?= n 643# Profiling/tracing of syscall wrapper (utee_*) 644CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 645 646ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 647ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 648$(error Cannot instrument user libraries if user mode profiling is disabled) 649endif 650endif 651 652# Build libutee, libutils, libmbedtls as shared libraries. 653# - Static libraries are still generated when this is enabled, but TAs will use 654# the shared libraries unless explicitly linked with the -static flag. 655# - Shared libraries are made of two files: for example, libutee is 656# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 657# is a totally standard shared object, and should be used to link against. 658# The '.ta' file is a signed version of the '.so' and should be installed 659# in the same way as TAs so that they can be found at runtime. 660CFG_ULIBS_SHARED ?= n 661 662ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 663$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 664endif 665 666# CFG_GP_SOCKETS 667# Enable Global Platform Sockets support 668CFG_GP_SOCKETS ?= y 669 670# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 671# invocation parameters referring to specific secure memories). 672CFG_SECURE_DATA_PATH ?= n 673 674# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 675# TA binaries are stored encrypted in the REE FS and are protected by 676# metadata in secure storage. 677CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 678$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 679 680# Enable the pseudo TA that managages TA storage in secure storage 681CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 682$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 683 684# Enable the pseudo TA for misc. auxilary services, extending existing 685# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 686# pool etc...) 687CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 688$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 689 690# Enable the pseudo TA for enumeration of TEE based devices for the normal 691# world OS. 692CFG_DEVICE_ENUM_PTA ?= y 693 694# The attestation pseudo TA provides an interface to request measurements of 695# a TA or the TEE binary. 696CFG_ATTESTATION_PTA ?= n 697$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 698 699# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 700# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 701# note that such a low value is not secure. 702# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 703# https://tools.ietf.org/html/rfc8017#section-9.1.1 704# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 705# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 706CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 707 708# Define the number of cores per cluster used in calculating core position. 709# The cluster number is shifted by this value and added to the core ID, 710# so its value represents log2(cores/cluster). 711# Default is 2**(2) = 4 cores per cluster. 712CFG_CORE_CLUSTER_SHIFT ?= 2 713 714# Define the number of threads per core used in calculating processing 715# element's position. The core number is shifted by this value and added to 716# the thread ID, so its value represents log2(threads/core). 717# Default is 2**(0) = 1 threads per core. 718CFG_CORE_THREAD_SHIFT ?= 0 719 720# Enable support for dynamic shared memory (shared memory anywhere in 721# non-secure memory). 722CFG_CORE_DYN_SHM ?= y 723 724# Enable support for reserved shared memory (shared memory in a carved out 725# memory area). 726CFG_CORE_RESERVED_SHM ?= y 727 728# Enables support for larger physical addresses, that is, it will define 729# paddr_t as a 64-bit type. 730CFG_CORE_LARGE_PHYS_ADDR ?= n 731 732# Define the maximum size, in bits, for big numbers in the Internal Core API 733# Arithmetical functions. This does *not* influence the key size that may be 734# manipulated through the Cryptographic API. 735# Set this to a lower value to reduce the TA memory footprint. 736CFG_TA_BIGNUM_MAX_BITS ?= 2048 737 738# Not used since libmpa was removed. Force the values to catch build scripts 739# that would set = n. 740$(call force,CFG_TA_MBEDTLS_MPI,y) 741$(call force,CFG_TA_MBEDTLS,y) 742 743# Compile the TA library mbedTLS with self test functions, the functions 744# need to be called to test anything 745CFG_TA_MBEDTLS_SELF_TEST ?= y 746 747# By default use tomcrypt as the main crypto lib providing an implementation 748# for the API in <crypto/crypto.h> 749# CFG_CRYPTOLIB_NAME is used as libname and 750# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 751# 752# It's also possible to configure to use mbedtls instead of tomcrypt. 753# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 754# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 755CFG_CRYPTOLIB_NAME ?= tomcrypt 756CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 757 758# Not used since libmpa was removed. Force the value to catch build scripts 759# that would set = n. 760$(call force,CFG_CORE_MBEDTLS_MPI,y) 761 762# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in 763# the non-secure world. OP-TEE will not work without a compatible hypervisor 764# in the non-secure world if this option is enabled. 765# 766# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is 767# deprecated as the configuration switch name was ambiguous regarding which 768# world has virtualization enabled. 769ifneq (undefined,$(flavor CFG_VIRTUALIZATION)) 770$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead) 771CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION) 772ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION)) 773$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION)) 774endif 775endif # CFG_VIRTUALIZATION defined 776CFG_NS_VIRTUALIZATION ?= n 777 778ifeq ($(CFG_NS_VIRTUALIZATION),y) 779$(call force,CFG_CORE_RODATA_NOEXEC,y) 780$(call force,CFG_CORE_RWDATA_NOEXEC,y) 781 782# Default number of virtual guests 783CFG_VIRT_GUEST_COUNT ?= 2 784endif 785 786# Enables backwards compatible derivation of RPMB and SSK keys 787CFG_CORE_HUK_SUBKEY_COMPAT ?= y 788 789# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 790# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 791CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 792 793# Compress and encode conf.mk into the TEE core, and show the encoded string on 794# boot (with severity TRACE_INFO). 795CFG_SHOW_CONF_ON_BOOT ?= n 796 797# Enables support for passing a TPM Event Log stored in secure memory 798# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 799# taken before the service was up and running. 800CFG_CORE_TPM_EVENT_LOG ?= n 801 802# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 803# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 804# 805# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 806# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 807# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 808# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 809# CFG_SCMI_MSG_PERF_DOMAIN embeds SCMI performance domain management protocol 810# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 811# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 812# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 813# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 814CFG_SCMI_MSG_DRIVERS ?= n 815ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 816CFG_SCMI_MSG_CLOCK ?= n 817CFG_SCMI_MSG_RESET_DOMAIN ?= n 818CFG_SCMI_MSG_SHM_MSG ?= n 819CFG_SCMI_MSG_SMT ?= n 820CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 821CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 822CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 823CFG_SCMI_MSG_THREAD_ENTRY ?= n 824CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 825CFG_SCMI_MSG_PERF_DOMAIN ?= n 826$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 827$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 828$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 829ifeq ($(CFG_SCMI_MSG_SMT),y) 830_CFG_SCMI_PTA_SMT_HEADER := y 831endif 832ifeq ($(CFG_SCMI_MSG_SHM_MSG),y) 833_CFG_SCMI_PTA_MSG_HEADER := y 834endif 835endif 836 837# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation 838# from SCP-firmware package as an built-in SCMI stack in core. This 839# configuration mandates target product identifier is configured with 840# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with 841# CFG_SCP_FIRMWARE. 842CFG_SCMI_SCPFW ?= n 843 844ifeq ($(CFG_SCMI_SCPFW),y) 845$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW) 846ifeq (,$(CFG_SCMI_SCPFW_PRODUCT)) 847$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration) 848endif 849ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt)) 850$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration) 851endif 852endif #CFG_SCMI_SCPFW 853 854ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y) 855$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive) 856endif 857 858# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for 859# the platform SCMI server and implements the platform plat_scmi_clock_*() 860# functions. 861CFG_SCMI_MSG_USE_CLK ?= n 862$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS)) 863 864# Enable SCMI PTA interface for REE SCMI agents 865CFG_SCMI_PTA ?= n 866ifeq ($(CFG_SCMI_PTA),y) 867_CFG_SCMI_PTA_SMT_HEADER ?= n 868_CFG_SCMI_PTA_MSG_HEADER ?= n 869endif 870 871ifneq ($(CFG_STMM_PATH),) 872$(call force,CFG_WITH_STMM_SP,y) 873$(call force,CFG_EFILIB,y) 874else 875CFG_WITH_STMM_SP ?= n 876endif 877ifeq ($(CFG_WITH_STMM_SP),y) 878$(call force,CFG_ZLIB,y) 879endif 880 881# When enabled checks that buffers passed to the GP Internal Core API 882# comply with the rules added as annotations as part of the definition of 883# the API. For example preventing buffers in non-secure shared memory when 884# not allowed. 885CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 886 887# When enabled accepts the DES key sizes excluding parity bits as in 888# the GP Internal API Specification v1.0 889CFG_COMPAT_GP10_DES ?= y 890 891# Defines a limit for many levels TAs may call each others. 892CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 893 894# Pseudo-TA to export hardware RNG output to Normal World 895# RNG characteristics are platform specific 896CFG_HWRNG_PTA ?= n 897ifeq ($(CFG_HWRNG_PTA),y) 898# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 899CFG_HWRNG_RATE ?= 0 900# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 901ifeq (,$(CFG_HWRNG_QUALITY)) 902$(error CFG_HWRNG_QUALITY not defined) 903endif 904endif 905 906# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 907# shared memory for each secure thread. When disabled, RPC shared 908# memory is released once the secure thread has completed is execution. 909ifeq ($(CFG_WITH_PAGER),y) 910CFG_PREALLOC_RPC_CACHE ?= n 911endif 912CFG_PREALLOC_RPC_CACHE ?= y 913 914# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 915# This clock framework allows to describe clock tree and provides functions to 916# get and configure the clocks. 917# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 918# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 919# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 920# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree 921# state on OP-TEE core console with the info trace level. 922CFG_DRIVERS_CLK ?= n 923CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 924CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 925CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 926CFG_DRIVERS_CLK_PRINT_TREE ?= n 927 928$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 929$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 930 931# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 932# OP-TEE core to provide reset controls on subsystems of the devices. 933CFG_DRIVERS_RSTCTRL ?= n 934 935# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in 936# OP-TEE core to provide GPIO support for drivers. 937CFG_DRIVERS_GPIO ?= n 938 939# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support. 940CFG_DRIVERS_I2C ?= n 941 942# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem 943# providers and allow consumer drivers to get NVMEM cells using the Device Tree. 944CFG_DRIVERS_NVMEM ?= n 945 946# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in 947# OP-TEE core to provide drivers a way to apply pin muxing configurations based 948# on device-tree. 949CFG_DRIVERS_PINCTRL ?= n 950 951# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in 952# OP-TEE core to provide drivers a common regulator interface and describe 953# the regulators dependencies using an embedded device tree. 954# 955# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for 956# DT compatible "regulator-fixed" devices. 957# 958# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for 959# DT compatible "regulator-gpio" devices. 960# 961# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the 962# regulator tree state on OP-TEE core console with the info trace level. 963CFG_DRIVERS_REGULATOR ?= n 964CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n 965CFG_REGULATOR_FIXED ?= n 966CFG_REGULATOR_GPIO ?= n 967 968$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \ 969 CFG_DRIVERS_REGULATOR CFG_DT)) 970$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \ 971 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO)) 972 973# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core 974# and shows a print (info level) when booting up the device that 975# indicates that the board runs a standard developer configuration. 976# 977# A developer configuration doesn't necessarily have to be secure. The intention 978# is that the one making products based on OP-TEE should override this flag in 979# plat-xxx/conf.mk for the platform they're basing their products on after 980# they've finalized implementing stubbed functionality (see OP-TEE 981# documentation/Porting guidelines) as well as vendor specific security 982# configuration. 983# 984# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated. 985ifneq (undefined,$(flavor CFG_WARN_INSECURE)) 986$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead) 987CFG_INSECURE ?= $(CFG_WARN_INSECURE) 988ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE)) 989$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE)) 990endif 991endif # CFG_WARN_INSECURE defined 992CFG_INSECURE ?= y 993 994ifneq ($(CFG_INSECURE),y) 995ifneq ($(CFG_CORE_ASLR_SEED),) 996$(error CFG_CORE_ASLR_SEED requires CFG_INSECURE=y) 997endif 998endif 999 1000# Enables warnings for declarations mixed with statements 1001CFG_WARN_DECL_AFTER_STATEMENT ?= y 1002 1003# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 1004# mechanism to limit the set of locations to which computed branch instructions 1005# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 1006# that support it, enable this option. A GCC toolchain built with 1007# --enable-standard-branch-protection is needed to use this option. 1008CFG_CORE_BTI ?= n 1009 1010$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 1011 1012# To make use of BTI in user space libraries and TA's on CPU's that support it, 1013# enable this option. 1014CFG_TA_BTI ?= $(CFG_CORE_BTI) 1015 1016$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 1017 1018ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 1019$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible) 1020endif 1021 1022ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 1023$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 1024endif 1025 1026# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 1027# and key access to memory. This is a hardware supported alternative to 1028# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 1029CFG_MEMTAG ?= n 1030 1031$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 1032ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 1033$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 1034endif 1035ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 1036$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 1037endif 1038 1039# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be 1040# used to restrict accesses to unprivileged memory from privileged mode. 1041# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN. 1042CFG_PAN ?= n 1043 1044$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core)) 1045 1046ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 1047 $(CFG_CORE_EL3_SPMC)),y) 1048# FF-A case, handled via the FF-A ABI 1049CFG_CORE_ASYNC_NOTIF ?= y 1050$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n) 1051else 1052# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support 1053# for sending asynchronous notifications to normal world. 1054# Interrupt ID must be configurged by the platform too. Currently is only 1055# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 1056CFG_CORE_ASYNC_NOTIF ?= n 1057$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF)) 1058endif 1059 1060# Enable callout service 1061CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF) 1062 1063# Enable notification based test watchdog 1064CFG_NOTIF_TEST_WD ?= $(call cfg-all-enabled,CFG_ENABLE_EMBEDDED_TESTS \ 1065 CFG_CALLOUT CFG_CORE_ASYNC_NOTIF) 1066$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \ 1067 CFG_CORE_ASYNC_NOTIF)) 1068 1069$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 1070 CFG_WITH_STATS)) 1071 1072# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 1073# for signing and authenticating pointers against secret keys. These can 1074# be used to mitigate ROP (Return oriented programming) attacks. This is 1075# currently done by instructing the compiler to add paciasp/autiasp at the 1076# begging and end of functions to sign and verify ELR. 1077# 1078# The CFG_CORE_PAUTH enables these instructions for the core parts 1079# executing at EL1, with one secret key per thread and one secret key per 1080# physical CPU. 1081# 1082# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 1083# this option is enabled, TEE core will initialize secret keys per TA. 1084CFG_CORE_PAUTH ?= n 1085CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 1086 1087$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 1088$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 1089 1090ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 1091$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 1092endif 1093ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 1094$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 1095endif 1096 1097ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 1098$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1099endif 1100 1101ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 1102$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1103endif 1104 1105# Enable support for generic watchdog registration 1106# This watchdog will then be usable by non-secure world through SMC calls. 1107CFG_WDT ?= n 1108 1109# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 1110CFG_WDT_SM_HANDLER ?= n 1111 1112$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 1113 1114# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements 1115# arm-smc-wdt service. Platform can also override this ID with a platform 1116# specific SMC function ID to access arm-smc-wdt service thanks to 1117# optional config switch CFG_WDT_SM_HANDLER_ID. 1118CFG_WDT_SM_HANDLER_ID ?= 0x82003D06 1119 1120# Allow using the udelay/mdelay function for platforms without ARM generic timer 1121# extension. When set to 'n', the plat_get_freq() function must be defined by 1122# the platform code 1123CFG_CORE_HAS_GENERIC_TIMER ?= y 1124 1125# Enable RTC API 1126CFG_DRIVERS_RTC ?= n 1127 1128# Enable PTA for RTC access from non-secure world 1129CFG_RTC_PTA ?= n 1130 1131# Enable the FF-A SPMC tests in xtests 1132CFG_SPMC_TESTS ?= n 1133 1134# Allocate the translation tables needed to map the S-EL0 application 1135# loaded 1136CFG_CORE_PREALLOC_EL0_TBLS ?= n 1137ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 1138$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 1139endif 1140 1141# CFG_PGT_CACHE_ENTRIES defines the number of entries on the memory 1142# mapping page table cache used for Trusted Application mapping. 1143# CFG_PGT_CACHE_ENTRIES is ignored when CFG_CORE_PREALLOC_EL0_TBLS 1144# is enabled. 1145# 1146# A proper value for CFG_PGT_CACHE_ENTRIES depends on many factors: 1147# CFG_WITH_LPAE, CFG_TA_ASLR, size of TAs, size of memrefs passed 1148# to TA, CFG_ULIBS_SHARED and possibly others. The default value 1149# is based on the number of threads as an indicator on how large 1150# the system might be. 1151ifeq ($(CFG_NUM_THREADS),1) 1152CFG_PGT_CACHE_ENTRIES ?= 4 1153endif 1154ifeq ($(CFG_NUM_THREADS),2) 1155ifneq ($(CFG_WITH_LPAE),y) 1156CFG_PGT_CACHE_ENTRIES ?= 8 1157endif 1158endif 1159CFG_PGT_CACHE_ENTRIES ?= ($(CFG_NUM_THREADS) * 2) 1160 1161# User TA runtime context dump. 1162# When this option is enabled, OP-TEE provides a debug method for 1163# developer to dump user TA's runtime context, including TA's heap stats. 1164# Developer can open a stats PTA session and then invoke command 1165# STATS_CMD_TA_STATS to get the context of loaded TAs. 1166CFG_TA_STATS ?= n 1167 1168# Enables best effort mitigations against fault injected when the hardware 1169# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h 1170CFG_FAULT_MITIGATION ?= y 1171 1172# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note 1173# that this doesn't affect libutee itself, it's only the TAs compiled with 1174# this set that are affected. Each out-of-tree must set this if to enable 1175# compatibility with version v1.1 as the value of this variable is not 1176# preserved in the TA dev-kit. 1177CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n 1178 1179# Change supported HMAC key size range, from 64 to 1024. 1180# This is needed to pass AOSP Keymaster VTS tests: 1181# Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp 1182# Module: VtsHalKeymasterV3_0TargetTest 1183# Testcases: - PerInstance/SigningOperationsTest# 1184# - PerInstance/NewKeyGenerationTest# 1185# - PerInstance/ImportKeyTest# 1186# - PerInstance/EncryptionOperationsTest# 1187# - PerInstance/AttestationTest# 1188# Note that this violates GP requirements of HMAC size range. 1189CFG_HMAC_64_1024_RANGE ?= n 1190 1191# CFG_RSA_PUB_EXPONENT_3, when enabled, allows RSA public exponents in the 1192# range 3 <= e < 2^256. This is needed to pass AOSP KeyMint VTS tests: 1193# Link to tests: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp 1194# Module: VtsAidlKeyMintTargetTest 1195# Testcases: - PerInstance/EncryptionOperationsTest.RsaNoPaddingSuccess 1196# When CFG_RSA_PUB_EXPONENT_3 is disabled, RSA public exponents must conform 1197# to NIST SP800-56B recommendation and be in the range 65537 <= e < 2^256. 1198CFG_RSA_PUB_EXPONENT_3 ?= n 1199 1200# Enable a hardware pbkdf2 function 1201# By default use standard pbkdf2 implementation 1202CFG_CRYPTO_HW_PBKDF2 ?= n 1203$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2)) 1204 1205# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the 1206# other cores. The feature currently relies on GIC device to trap the other 1207# cores using an SGI interrupt specified by CFG_HALT_CORES_ON_PANIC_SGI. 1208CFG_HALT_CORES_ON_PANIC ?= n 1209CFG_HALT_CORES_ON_PANIC_SGI ?= 15 1210$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_GIC)) 1211 1212# Enable automatic discovery of maximal PA supported by the hardware and 1213# use that. Provides easier configuration of virtual platforms where the 1214# maximal PA can vary. 1215CFG_AUTO_MAX_PA_BITS ?= n 1216 1217# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor 1218# management including generic DT bindings for the configuration. 1219CFG_DRIVERS_REMOTEPROC ?= n 1220 1221# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA 1222# service. 1223CFG_REMOTEPROC_PTA ?= n 1224 1225# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure 1226# DTB as OP-TEE HUK. 1227CFG_WIDEVINE_HUK ?= n 1228$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT)) 1229 1230# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under 1231# DT node "/options/op-tee/widevine" to some specific TAs. 1232CFG_WIDEVINE_PTA ?= n 1233$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK)) 1234 1235# When enabled, CFG_VERAISON_ATTESTATION_PTA embeds remote attestation PTA 1236# service. Note: This is an experimental feature and should be used 1237# with caution in production environments. 1238CFG_VERAISON_ATTESTATION_PTA ?= n 1239ifeq ($(CFG_VERAISON_ATTESTATION_PTA),y) 1240$(call force,CFG_QCBOR,y) 1241endif 1242 1243# When enabled, CFG_VERAISON_ATTESTATION_PTA_TEST_KEY embeds a test key. 1244# Note: CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled for 1245# CFG_VERAISON_ATTESTATION_PTA to work. 1246CFG_VERAISON_ATTESTATION_PTA_TEST_KEY ?= y 1247ifneq ($(CFG_VERAISON_ATTESTATION_PTA_TEST_KEY),y) 1248$(error "CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled") 1249endif 1250 1251# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver. 1252# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes 1253# trace messages from/to the debug terminal of the semihosting host computer. 1254# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console 1255# outputs trace messages to that file. Output to "optee.log" by default. 1256CFG_SEMIHOSTING_CONSOLE ?= n 1257ifeq ($(CFG_SEMIHOSTING_CONSOLE),y) 1258$(call force,CFG_SEMIHOSTING,y) 1259endif 1260CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log" 1261ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),) 1262$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty) 1263endif 1264 1265# Semihosting is a debugging mechanism that enables code running on an embedded 1266# system (also called the target) to communicate with and use the I/O of the 1267# host computer. 1268CFG_SEMIHOSTING ?= n 1269 1270# CFG_FFA_CONSOLE, when enabled, embeds a FFA console driver. OP-TEE console 1271# writes trace messages via FFA interface to the SPM (Secure Partition Manager) 1272# like hafnium. 1273CFG_FFA_CONSOLE ?= n 1274 1275# CFG_CORE_UNSAFE_MODEXP, when enabled, makes modular exponentiation on TEE 1276# core use 'unsafe' algorithm having better performance. To resist against 1277# timing attacks, 'safe' one is designed to take constant-time that is 1278# generally much slower. 1279CFG_CORE_UNSAFE_MODEXP ?= n 1280 1281# CFG_TA_MBEDTLS_UNSAFE_MODEXP, similar to CFG_CORE_UNSAFE_MODEXP, 1282# when enabled, makes MBedTLS library for TAs use 'unsafe' modular 1283# exponentiation algorithm. 1284CFG_TA_MBEDTLS_UNSAFE_MODEXP ?= n 1285 1286# CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL, when enabled, initializes 1287# thread_core_local[current_core_pos] before calling C code. 1288ifeq ($(ARCH),arm) 1289$(call force,CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL,y) 1290else 1291CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL ?= n 1292endif 1293 1294# CFG_DYN_CONFIG, when enabled, use dynamic memory allocation for translation 1295# tables. Not supported with pager. 1296ifeq ($(CFG_WITH_PAGER),y) 1297$(call force,CFG_DYN_CONFIG,n,conflicts with CFG_WITH_PAGER) 1298else 1299CFG_DYN_CONFIG ?= y 1300endif 1301 1302# CFG_EXTERNAL_ABORT_PLAT_HANDLER is used to implement platform-specific 1303# handling of external abort implementing the plat_external_abort_handler() 1304# function. 1305CFG_EXTERNAL_ABORT_PLAT_HANDLER ?= n 1306 1307# CFG_TA_LIBGCC, when enabled, links user mode TAs with libgcc. Linking 1308# TAs with libgcc is deprecated, but keep this flag while sorting out the 1309# out remaining issues with supporting C++. 1310CFG_TA_LIBGCC ?= y 1311