Searched refs:writeb (Results 1 – 7 of 7) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/usb/drv/usb_ecos/newhost/ |
| H A D | drvUSBEntry.c | 566 writeb(readb((void*)(regUHC+0x10*2)) | 0x1, (void*)(regUHC+0x10*2)); //Set UHC run
569 writeb(0x10, (void*)(regUTMI+0x2C*2));
570 writeb(0x00, (void*)(regUTMI+0x2D*2-1));
571 writeb(0x00, (void*)(regUTMI+0x2F*2-1));
572 writeb(0x80 ,(void*)(regUTMI+0x2A*2));
577 writeb(readb((void*)(regUTMI+0x13*2-1))|0x70, (void*)(regUTMI+0x13*2-1));
581 writeb(readb((void*)(regUHC+0x31*2-1)) | 0x01,(void*)(regUHC+0x31*2-1));
584 writeb(0x0 ,(void*)(regUTMI+0x2A*2));
589 writeb(readb((void*)(regUHC+0x31*2-1)) & 0xfe,(void*)(regUHC+0x31*2-1));
603 writeb(readb((void*)(regUHC+0x10*2)) | 0x2,(void*)(regUHC+0x10*2));
[all …]
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| H A D | drvEhciHcd.c | 621 writeb(UTMI_DISCON_LEVEL_2A ,(void*)(u32RegUTMI+0x2A*2)); // disconnect level in ms_hub_control()
633 writeb( UTMI_EYE_SETTING_2C, (void*) (u32RegUTMI+0x2c*2)); // chirp patch in ms_hub_control()
634 writeb( UTMI_EYE_SETTING_2D, (void*) (u32RegUTMI+0x2d*2-1)); // chirp patch in ms_hub_control()
635 writeb( UTMI_EYE_SETTING_2E, (void*) (u32RegUTMI+0x2e*2)); // chirp patch in ms_hub_control()
636 writeb( UTMI_EYE_SETTING_2F, (void*) (u32RegUTMI+0x2f*2-1)); // chirp patch in ms_hub_control()
639 writeb( readb((void*)(u32RegUTMI+0x06*2)) | 0x03, (void*) (u32RegUTMI+0x06*2)); in ms_hub_control()
640 writeb( readb((void*)(u32RegUTMI+0x06*2)) & ~0x03, (void*) (u32RegUTMI+0x06*2)); in ms_hub_control()
763 writeb(0x10, (void*)(u32RegUTMI+0x2C*2)); // chirp patch in ms_hub_control()
764 writeb(0x00, (void*)(u32RegUTMI+0x2D*2-1)); // chirp patch in ms_hub_control()
765 writeb(0x00, (void*)(u32RegUTMI+0x2E*2)); // chirp patch in ms_hub_control()
[all …]
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| H A D | drvUSBHwCtl.c | 371 writeb(readb((void*)(BDMA_RIU_BASE+0x2*2)) | 0x1c, (void*)(BDMA_RIU_BASE+0x2*2));
541 …writeb(readb((void*)(xhci->u3phy_D_base+0x84*2))|0x40, (void*)(xhci->u3phy_D_base+0x84*2)); // ope… in U3phy_MS28_init()
558 …writeb(readb((void*)(xhci->u3phy_A_base+0x3*2-1)) & 0xbb, (void*)(xhci->u3phy_A_base+0x3*2-1))… in U3phy_MS28_init()
560 writeb(0xF4, (void*) (xhci->u3phy_D_base+0x12*2)); //TX lock threshold in U3phy_MS28_init()
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| H A D | drvEHCI.h | 497 #define writeb(data, reg_adr) ( (*( (volatile MS_U8 *) (reg_adr) ) ) = ((MS_U8)data) ) macro
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| /utopia/UTPA2-700.0.x/modules/usb/drv/usb_ecos/usbhost/ |
| H A D | drvUSBEntry.c | 333 …writeb(readb((void*)(USBC_base+0x0A*2)) | 0x40, (void*) (USBC_base+0x0A*2)); //enable short packet… in U4_series_usb_init()
689 writeb(readb((void*)(regUHC+0x10*2)) | 0x1, (void*)(regUHC+0x10*2)); //Set UHC run in PortReset()
692 writeb(0x10, (void*)(regUTMI+0x2C*2)); in PortReset()
693 writeb(0x00, (void*)(regUTMI+0x2D*2-1)); in PortReset()
694 writeb(0x00, (void*)(regUTMI+0x2F*2-1)); in PortReset()
695 writeb(0x80 ,(void*)(regUTMI+0x2A*2)); in PortReset()
700 writeb(readb((void*)(regUTMI+0x13*2-1))|0x70, (void*)(regUTMI+0x13*2-1)); in PortReset()
704 writeb(readb((void*)(regUHC+0x31*2-1)) | 0x01,(void*)(regUHC+0x31*2-1)); in PortReset()
707 writeb(0x0 ,(void*)(regUTMI+0x2A*2)); in PortReset()
712 writeb(readb((void*)(regUHC+0x31*2-1)) & 0xfe,(void*)(regUHC+0x31*2-1)); in PortReset()
[all …]
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| H A D | drvEhciHcd.c | 1573 writeb(0x0 ,(void*)(regUTMI+0x2A*2)); // chirp patch in ehci_hub_control()
1585 writeb(0x10, (void*) (regUTMI+0x2c*2)); // chirp patch in ehci_hub_control()
1586 writeb(0x02, (void*) (regUTMI+0x2d*2-1)); // chirp patch in ehci_hub_control()
1587 writeb(0x81, (void*) (regUTMI+0x2f*2-1)); // chirp patch in ehci_hub_control()
1858 writeb(0x10, (void*)(regUTMI+0x2C*2)); // chirp patch in ehci_hub_control()
1859 writeb(0x00, (void*)(regUTMI+0x2D*2-1)); // chirp patch in ehci_hub_control()
1860 writeb(0x00, (void*)(regUTMI+0x2F*2-1)); // chirp patch in ehci_hub_control()
1861 writeb(0x80 ,(void*)(regUTMI+0x2A*2)); // chirp patch in ehci_hub_control()
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| H A D | drvEHCI.h | 2262 #define writeb(data, reg_adr) ( (*( (volatile MS_U8 *) (reg_adr) ) ) = ((MS_U8)data) ) macro
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