1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
24 // Therefore, you hereby agree it is your sole responsibility to separately
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26 // such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 // MStar`s confidential information and you agree to keep MStar`s
30 // confidential information in strictest confidence and not disclose to any
31 // third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 // kind. Any warranties are hereby expressly disclaimed by MStar, including
35 // without limitation, any warranties of merchantability, non-infringement of
36 // intellectual property rights, fitness for a particular purpose, error free
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40 // In no event shall MStar be liable for any direct, indirect, incidental or
41 // consequential damages, including without limitation, lost of profit or
42 // revenues, lost or damage of data, and unauthorized system use.
43 // You agree that this Section 4 shall still apply without being affected
44 // even if MStar Software has been modified by MStar in accordance with your
45 // request or instruction for your use, except otherwise agreed by both
46 // parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 // services in relation with MStar Software to you for your use of
50 // MStar Software in conjunction with your or your customer`s product
51 // ("Services").
52 // You understand and agree that, except otherwise agreed by both parties in
53 // writing, Services are provided on an "AS IS" basis and the warranty
54 // disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 // or otherwise:
58 // (a) conferring any license or right to use MStar name, trademark, service
59 // mark, symbol or any other identification;
60 // (b) obligating MStar or any of its affiliates to furnish any person,
61 // including without limitation, you and your customers, any assistance
62 // of any kind whatsoever, or any information; or
63 // (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 // of Taiwan, R.O.C., excluding its conflict of law rules.
67 // Any and all dispute arising out hereof or related hereto shall be finally
68 // settled by arbitration referred to the Chinese Arbitration Association,
69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 // Rules of the Association by three (3) arbitrators appointed in accordance
71 // with the said Rules.
72 // The place of arbitration shall be in Taipei, Taiwan and the language shall
73 // be English.
74 // The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78
79 #include "include/drvConfig.h"
80
81 #ifdef CONFIG_USB_DEBUG
82 #define DEBUG
83 #else
84 #undef DEBUG
85 #endif
86
87 //#include <MsCommon.h> // NUSED
88 //#include "include/drvCompiler.h" // NUSED
89 //#include "include/drvPorts.h" // NUSED
90 #include "include/drvErrno.h"
91 //#include "include/drvPCIMEM.h" // NUSED
92 //#include "include/drvList.h" // NUSED
93 //#include "include/drvTimer.h" // NUSED
94 //#include "include/drvKernel.h" // NUSED
95 // USB related implemented header files
96 #include "include/drvUSBHost.h"
97 #include "drvUsbd.h"
98 //#include "include/drvCPE_EHCI.h" // NUSED
99 #include "drvEHCI.h"
100 #include "drvUSBHwCtl.h"
101 //#include "include/drvCPE_AMBA.h" // NUSED
102 //#include "drvUSB.h" // NUSED
103 /* should applying drvUsbHostConfig.h (inside drvUSBHwctl.h) */
104
105 /*-------------------------------------------------------------------------*/
106
107
108 #define DRIVER_VERSION "eCos Newhost"
109 #define DRIVER_AUTHOR "Mstar USB Team"
110 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
111
112 // #define EHCI_VERBOSE_DEBUG
113 //#define EHCI_TD_DEBUG
114 #define ENABLE_QH_REFRESH
115
116 #ifdef DEBUG
117 #define EHCI_STATS
118 #endif
119
120 #define EHCI_RL_NAKCNT 4 /* enable nak throttle mode, spec 4.9 */
121 #define EHCI_RL_NAKCNT_TT 0 /* disable nak throttle mode when TT */
122 #define EHCI_HI_BW_MULT_HS 1 /* high bandwidth file, transactions number/uframe, spec 4.10.3 */
123 #define EHCI_HI_BW_MULT_TT 1
124
125 #ifdef CONFIG_HC_TEST
126 #define EHCI_PERIODIC_FLS 0 /* (max) 1024 frame for schedule */
127 #else
128 #define EHCI_PERIODIC_FLS 2 /* (minl) 256 frame schedule */
129 #endif
130 /* Initial IRQ latency: lower than default */
131 static int log2_irq_thresh = 0; // 0 to 6
132 #define INTR_MASK (USBSTS_IAA | USBSTS_FATAL | USBSTS_PCD | USBSTS_ERR | USBSTS_INT)
133
134 #if defined(ENABLE_16US_EOF1)
135 static U32 park_eco = 3;
136 #else
137 static U32 park_eco = 0;
138 #endif
139
140 /* Debug print definition */
141 #define DBG_MSG
142 #define DBG_WARN
143 //#define DBG_FUNC
144 #undef ms_debug_msg
145 #undef ms_debug_warn
146 #undef ms_debug_func
147
148 #ifdef DBG_MSG
149 #define ms_debug_msg(fmt, arg...) \
150 do {diag_printf(fmt, ##arg);} while(0)
151 #else
152 #define ms_debug_msg(fmt, arg...) do {} while (0)
153 #endif
154
155 #ifdef DBG_WARN
156 #define ms_debug_warn(fmt, arg...) \
157 do {diag_printf(fmt, ##arg);} while(0)
158 #else
159 #define ms_debug_warn(fmt, arg...) do {} while (0)
160 #endif
161
162 #ifdef DBG_FUNC
163 #define ms_debug_func(fmt, arg...) \
164 do {diag_printf(fmt, ##arg);} while(0)
165 #else
166 #define ms_debug_func(fmt, arg...) do {} while (0)
167 #endif
168
169 static void ms_unlink_async(struct ehci_hcd *, struct ehci_qh *);
170 static void ms_intr_deschedule(struct ehci_hcd *, struct ehci_qh *);
171 static int ms_qh_schedule(struct ehci_hcd *, struct ehci_qh *);
172
173 void ms_ehci_stoprun_setting(MS_U8 bOption, struct ehci_hcd *ehci);
174 extern void Chip_Flush_Memory(void);
175 extern void Chip_Read_Memory(void);
176
177 #ifdef EHCI_TD_DEBUG
Dump_TD(unsigned int addr,int is_qh)178 void Dump_TD(unsigned int addr, int is_qh)
179 {
180 int i;
181
182 diag_printf("[USB] %s:%x -> \n", is_qh?"QH":"QTD", addr);
183 for (i = 0; i < 0x20 ; i = i+4)
184 {
185 diag_printf("%02x ", *(unsigned char volatile *)(addr + i+ 3));
186 diag_printf("%02x ", *(unsigned char volatile *)(addr + i+ 2));
187 diag_printf("%02x ", *(unsigned char volatile *)(addr + i+ 1));
188 diag_printf("%02x ", *(unsigned char volatile *)(addr + i));
189 diag_printf("\n");
190 }
191 }
192 #endif
193
ms_check_status(U32 * pPtr,U32 u32Mask,U32 u32Done,int us)194 static int ms_check_status (U32 *pPtr, U32 u32Mask, U32 u32Done, int us)
195 {
196 U32 u32regv;
197
198 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
199 do {
200 u32regv = hcd_reg_readl ((U32)pPtr);
201 if (u32regv == ~(U32)0) /* card removed */
202 {
203 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
204 return -ENODEV;
205 }
206
207 u32regv &= u32Mask;
208 if (u32regv == u32Done)
209 return 0;
210
211 udelay (1);
212 us--;
213 } while (us > 0);
214
215 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
216 return -ETIMEDOUT;
217 }
218
ms_ehci_halt(struct ehci_hcd * pEhci)219 static int ms_ehci_halt (struct ehci_hcd *pEhci)
220 {
221 U32 u32regv = hcd_reg_readl ((U32)&pEhci->op_regs->usbsts);
222
223 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
224 if ((u32regv & USBSTS_HALT) != 0)
225 {
226 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
227 return 0;
228 }
229
230 u32regv = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
231 u32regv &= ~USBCMD_RUN;
232 hcd_reg_writel (u32regv, (U32)&pEhci->op_regs->usbcmd);
233
234 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
235 return ms_check_status (&pEhci->op_regs->usbsts, USBSTS_HALT, USBSTS_HALT, 16 * 125);
236 }
237
ms_ehci_reset(struct ehci_hcd * pEhci)238 static int ms_ehci_reset (struct ehci_hcd *pEhci)
239 {
240 int retv;
241 U32 u32regv = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
242
243 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
244 u32regv |= USBCMD_RESET;
245 hcd_reg_writel (u32regv, (U32)&pEhci->op_regs->usbcmd);
246 pEhci->hcd.state = HCD_STATE_HALT;
247 //Wait for HC reset complete
248 retv = ms_check_status (&pEhci->op_regs->usbcmd, USBCMD_RESET, 0, 250 * 1000);
249
250 #if defined(ENABLE_UHC_RUN_BIT_ALWAYS_ON_ECO)
251 /* Don't close RUN bit when device disconnect */
252 {
253 U32 u32hcmisc = hcd_reg_readl ((U32)&pEhci->op_regs->hcmisc);
254 hcd_reg_writel(u32hcmisc | BIT7, (U32)&pEhci->op_regs->hcmisc);
255 }
256 #endif
257
258 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
259 return retv;
260 }
261
ms_ehci_quiesce(struct ehci_hcd * pEhci)262 static void ms_ehci_quiesce (struct ehci_hcd *pEhci)
263 {
264 U32 u32regv;
265
266 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
267
268 /* check if there is any schedule bit set (patch from Linux 2.6.28 */
269 u32regv = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd) << 10;
270 u32regv &= USBSTS_ASS | USBSTS_PSS;
271 if (ms_check_status (&pEhci->op_regs->usbsts, USBSTS_ASS | USBSTS_PSS,
272 0, 16 * 125) != 0)
273 {
274 ms_debug_err("Cannot stop scheduler, force halt - 1\n");
275 ms_ehci_halt(pEhci);
276 pEhci->hcd.state = HCD_STATE_HALT;
277 return;
278 }
279
280 u32regv = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
281 u32regv &= ~(USBCMD_ASE | USBCMD_IAAD | USBCMD_PSE);
282 hcd_reg_writel (u32regv, (U32)&pEhci->op_regs->usbcmd);
283
284 /* wait 16 microframes */
285 if (ms_check_status (&pEhci->op_regs->usbsts, USBSTS_ASS | USBSTS_PSS,
286 0, 16 * 125) != 0)
287 {
288 ms_debug_err("Cannot stop scheduler, force halt - 2\n");
289 /* patch from Linux 2.6.28 */
290 ms_ehci_halt(pEhci);
291 pEhci->hcd.state = HCD_STATE_HALT;
292 return;
293 }
294 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
295 }
296
297 /*
298 * @brief clear reset timer
299 *
300 * @param struct ehci_hcd *pEhci
301 * @param int iIndex
302 * @param int port_status
303 *
304 * @return port_status
305 */
306
ms_reset_complete(struct ehci_hcd * pEhci,int iIndex,int port_status)307 static int ms_reset_complete (
308 struct ehci_hcd *pEhci,
309 int iIndex,
310 int port_status)
311 {
312 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
313
314 if (!(port_status & PORTSC_CONNECT))
315 {
316 //pEhci->u32ResetEnd [iIndex] = 0; // un-patch from Linux 2.6.28
317 return port_status;
318 }
319
320 /* Mstar EHCI is integrated TT */
321 if (!(port_status & PORTSC_PE))
322 {
323 ms_debug_err("TT roothub not enable port\n");
324 }
325
326 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
327 return port_status;
328 }
329
330 /*-------------------------------------------------------------------------*/
331 /*
332 * @brief check hub ports status change
333 * our echi ip (root hub) supports only one port
334 *
335 * @param struct usb_hcd *pHcd
336 * @param char *pBuf
337 *
338 * @return success/false
339 */
ms_hub_status_data(struct usb_hcd * pHcd,char * pBuf)340 int ms_hub_status_data (struct usb_hcd *pHcd, char *pBuf)
341 {
342 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
343 U32 u32Temp, u32Status = 0;
344 U32 u32Flags;
345
346 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
347
348 if (!HCD_IS_RUNNING(pHcd->state)) // patch from 2.6.28
349 return 0;
350
351 /* init u32Status to no-changes */
352 pBuf [0] = 0;
353
354 /* port 1 changes ? */
355 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
356
357 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc[0]);
358
359 /* PCD interrupt mode, not utilize such scheme */
360 //if ( ((u32Temp & PORTSC_CONNECT) == 0) && ((pHcd->pre_sts & PORTSC_CONNECT) != 0) )
361 //{
362 // ms_debug_msg("<ms_hub_status_data> Add CSC @ root hub %d, DISCONNECT! (psc = 0x%x)\n", (int)pHcd->host_id, (unsigned int)u32Temp);
363 // u32Temp |= PORTSC_CSC;
364 //}
365 //pHcd->pre_sts = u32Temp;
366
367 //if (!(u32Temp & PORTSC_CONNECT)) // un-patch from Linux 2.6.28
368 // pEhci->u32ResetEnd [0] = 0;
369
370 /* no need to consider over current for this IP */
371 if ((u32Temp & (PORTSC_CSC) || PORTSC_PEC) != 0 ||
372 (pEhci->u32ResetEnd[0] && ms_time_after_eq(
373 jiffies, pEhci->u32ResetEnd[0])))
374 {
375 /* bit 0 is for hub up port u32Status change */
376 pBuf [0] |= 1 << 1;
377 u32Status = USBSTS_PCD;
378 }
379
380 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
381 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
382 return u32Status ? 1 : 0;
383 }
384
385 /*-------------------------------------------------------------------------*/
386 /*
387 * @brief fill hub descriptor
388 *
389 * @param struct ehci_hcd *pEhci
390 * @param struct usb_hub_descriptor *pDesc
391 *
392 * @return none
393 */
394
ms_get_roothub_desc(struct ehci_hcd * pEhci,struct usb_hub_descriptor * pDesc)395 static void ms_get_roothub_desc (
396 struct ehci_hcd *pEhci,
397 struct usb_hub_descriptor *pDesc
398 )
399 {
400 int iPorts = HCS_N_PORTS (pEhci->hcs_params);
401 U16 u16Temp;
402
403 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
404 pDesc->bDescriptorType = 0x29;
405 pDesc->bPwrOn2PwrGood = 0;
406 pDesc->bHubContrCurrent = 0;
407 pDesc->bNbrPorts = iPorts;
408 u16Temp = 1 + (iPorts / 8);
409 pDesc->bDescLength = 7 + 2 * u16Temp;
410
411 /* two bitmaps: iPorts removable, and usb 1.0 legacy PortPwrCtrlMask */
412 memset (&pDesc->DeviceRemovable [0], 0, u16Temp);
413 memset (&pDesc->DeviceRemovable [u16Temp], 0xff, u16Temp);
414
415 u16Temp = 0x0008; /* Individual Port Over-current Protection */
416 if (HCS_PPC (pEhci->hcs_params))
417 u16Temp |= 0x0001; /* Ganged power switching (all iPorts' power at once) */
418 if (HCS_P_INDICATOR (pEhci->hcs_params))
419 u16Temp |= 0x0080; /* Individual port indicators (LEDs) */
420 pDesc->wHubCharacteristics = u16Temp;
421 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
422 }
423
424 /*-------------------------------------------------------------------------*/
ms_ehci_softrst(struct ehci_hcd * pEhci)425 void ms_ehci_softrst(struct ehci_hcd *pEhci)
426 {
427 U32 regTmp[2];
428
429 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
430
431 /* ensure HC already stopped before HC Reset
432 * otherwise, there will be a fatal error (DMA Error)
433 */
434 ms_ehci_halt(pEhci);
435 /* make sure USB device going to suspend */
436 //mdelay(10); // TBD
437
438 /* iff asynchronous QH head is not pointed to itself, restore it too */
439 if ((pEhci->hcd.rh_disconn == 1) &&
440 (pEhci->stAsync->hw_next_qh != QH_NEXT(pEhci->stAsync->qh_dma_addr)))
441 {
442 ms_debug_err("[EHCI] Head QH not point to itself (%x)!\n\n\n",
443 pEhci->stAsync->hw_next_qh);
444 pEhci->stAsync->hw_next_qh = QH_NEXT(pEhci->stAsync->qh_dma_addr);
445 }
446 if (!hcd_reg_readl((U32)&pEhci->op_regs->asynclistaddr))
447 ms_debug_err("[EHCI] async reg 0!!!\n");
448
449 /* sometimes, replug device quickly crashs aync_base, just restore it */
450 hcd_reg_writel ((U32)pEhci->stAsync->qh_dma_addr, (U32)&pEhci->op_regs->asynclistaddr);
451
452 regTmp[0] = hcd_reg_readl((U32)&pEhci->op_regs->usbcmd);
453 regTmp[1] = hcd_reg_readl((U32)&pEhci->op_regs->usbintr);
454 // HC soft reset
455 ms_ehci_reset(pEhci);
456 // restore regisger setting
457 hcd_reg_writel(regTmp[1],(U32)&pEhci->op_regs->usbintr);
458 hcd_reg_writel(regTmp[0],(U32)&pEhci->op_regs->usbcmd);
459 pEhci->hcd.state = HCD_STATE_RUNNING;
460 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
461 }
462
463 static const char *const speed_name_list[] = {
464 "full-speed",
465 "low-speed",
466 "high-speed",
467 "UNKNOWN",
468 };
469 /*-------------------------------------------------------------------------*/
470 /*
471 * @brief process hub request
472 *
473 * @param struct usb_hcd *pHcd
474 * @param U16 typeReq
475 * @param U16 u16Value
476 * @param U16 u16Index
477 * @param char *pBuf
478 *
479 * @return error code
480 *
481 */
ms_hub_control(struct usb_hcd * pHcd,U16 typeReq,U16 u16Value,U16 u16Index,char * pBuf)482 int ms_hub_control (
483 struct usb_hcd *pHcd,
484 U16 typeReq,
485 U16 u16Value,
486 U16 u16Index,
487 char *pBuf
488 )
489 {
490 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
491 int iPorts = HCS_N_PORTS (pEhci->hcs_params);
492 U32 u32Temp, u32Status, u32Bus_monitor;
493 U32 u32Flags;
494 int iRetval = 0;
495 int time_out;
496 struct cpe_dev *dev;
497 const struct device_s *__mptr = pHcd->controller;
498 dev = (struct cpe_dev *)( (char *)__mptr - offsetof(struct cpe_dev,dev) );
499 U32 u32RegUTMI = dev->utmibase;
500 U32 u32Temp2, u32Speed;
501
502 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
503 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
504 switch (typeReq)
505 {
506 case Req_ClearHubFeature:
507 if ((u16Value != C_HUB_LOCAL_POWER)&&(u16Value != C_HUB_OVER_CURRENT))
508 goto error;
509 break;
510 case Req_ClearPortFeature:
511 if (!u16Index || u16Index > iPorts)
512 goto error;
513 u16Index--;
514 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc [u16Index]);
515 u32Temp &= ~PORTSC_RWC_BITS;
516
517 if (u32Temp & PORTSC_OWNER)
518 break;
519
520 switch (u16Value)
521 {
522 case USB_PORT_FEAT_ENABLE:
523 ms_debug_debug("Disable port\n");
524 hcd_reg_writel (u32Temp & ~PORTSC_PE, (U32)&pEhci->op_regs->portsc [u16Index]);
525 #if 0
526 // not in linux
527 //�˸m�Q�������ɭ� ����scheduler
528 hcd_reg_writel(hcd_reg_readl((U32)&pEhci->op_regs->usbcmd)&(~(USBCMD_ASE|USBCMD_PSE|USBCMD_IAAD)),(U32)&pEhci->op_regs->usbcmd);
529 #endif
530
531 #if 0 // not to reset EHCI at this time
532 //Halt HCD
533 ms_host_halt(pEhci);
534 ms_ehci_softrst(pEhci);
535 #endif
536 break;
537 case USB_PORT_FEAT_C_ENABLE:
538 hcd_reg_writel ((u32Temp /*& ~PORTSC_RWC_BITS*/) | PORTSC_PEC,
539 (U32)&pEhci->op_regs->portsc [u16Index]);
540 break;
541 case USB_PORT_FEAT_SUSPEND:
542 case USB_PORT_FEAT_C_SUSPEND:
543 break;
544 case USB_PORT_FEAT_POWER:
545 if (HCS_PPC (pEhci->hcs_params))
546 hcd_reg_writel (u32Temp & ~PORTSC_POWER,
547 (U32)&pEhci->op_regs->portsc [u16Index]);
548 break;
549 case USB_PORT_FEAT_C_CONNECTION:
550 /* for force HC Reset */
551 if(pEhci->u32MoreCSC)
552 {
553 diag_printf("[EHCI] clear more CSC\n");
554 pEhci->u32MoreCSC = false;
555 }
556 hcd_reg_writel ((u32Temp /*& ~PORTSC_RWC_BITS*/) | PORTSC_CSC,
557 (U32)&pEhci->op_regs->portsc [u16Index]);
558 break;
559 case USB_PORT_FEAT_C_OVER_CURRENT:
560 hcd_reg_writel ((u32Temp /*& ~PORTSC_RWC_BITS*/) | PORTSC_OCC,
561 (U32)&pEhci->op_regs->portsc [u16Index]);
562 break;
563 case USB_PORT_FEAT_C_RESET:
564 /* GetPortStatus clears reset */
565 break;
566 default:
567 goto error;
568 }
569 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd); /* unblock posted write */
570 break;
571 case Req_GetHubDescriptor:
572 ms_get_roothub_desc(pEhci, (struct usb_hub_descriptor *)
573 pBuf);
574 break;
575 case Req_GetHubStatus:
576 /* no hub-wide feature/u32Status u32Flags */
577 memset (pBuf, 0, 4);
578 //cpu_to_le32s ((U32 *) pBuf);
579 break;
580 case Req_GetPortStatus:
581 if (!u16Index || u16Index > iPorts)
582 goto error;
583 u16Index--;
584 u32Status = 0;
585 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc [u16Index]);
586 // old flow to patch hub polling
587 //if ( ((u32Temp & PORTSC_CONNECT) == 0) && ((u32Temp & PORTSC_CSC) == 0) )
588 //{
589 // if ((pHcd->pre_temp & PORTSC_CONNECT) != 0)
590 // {
591 // ms_debug_msg("<ms_hub_control> Req_GetPortStatus:Add CSC here, pStatus = %x\n", (unsigned int)u32Temp);
592 // u32Temp |= PORTSC_CSC;
593 // }
594 //}
595 //pHcd->pre_temp = u32Temp;
596
597 /* deal with wPortChange bits */
598 if (u32Temp & PORTSC_CSC)
599 {
600 u32Status |= 1 << USB_PORT_FEAT_C_CONNECTION;
601 }
602 else if(pEhci->u32MoreCSC)
603 {
604 diag_printf("[EHCI] retrun more CSC\n");
605 u32Status |= 1 << USB_PORT_FEAT_C_CONNECTION;
606 }
607 if (u32Temp & PORTSC_PEC)
608 u32Status |= 1 << USB_PORT_FEAT_C_ENABLE;
609 // USB_PORT_FEAT_C_SUSPEND
610 if (u32Temp & PORTSC_OCC)
611 u32Status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT;
612
613 if ((u32Temp & PORTSC_RESET)
614 && ms_time_after (jiffies,
615 pEhci->u32ResetEnd [u16Index]))
616 {
617 u32Status |= 1 << USB_PORT_FEAT_C_RESET;
618 pEhci->u32ResetEnd [u16Index] = 0; // patch from Linux 2.6.28
619 time_out=0;
620
621 writeb(UTMI_DISCON_LEVEL_2A ,(void*)(u32RegUTMI+0x2A*2)); // disconnect level
622 mdelay(20); // chirp patch
623
624 /* Do port reset until finish */
625 //hcd_reg_writel (u32Temp & ~PORTSC_RESET,
626 hcd_reg_writel (u32Temp & ~(PORTSC_RWC_BITS | PORTSC_RESET),
627 (U32)&pEhci->op_regs->portsc [u16Index]);
628 do {
629 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc [u16Index]);
630 udelay (10);
631 } while ((u32Temp&(PORTSC_RESET|PORTSC_CONNECT)) == (PORTSC_RESET|PORTSC_CONNECT)&&(time_out++<10000));
632
633 writeb( UTMI_EYE_SETTING_2C, (void*) (u32RegUTMI+0x2c*2)); // chirp patch
634 writeb( UTMI_EYE_SETTING_2D, (void*) (u32RegUTMI+0x2d*2-1)); // chirp patch
635 writeb( UTMI_EYE_SETTING_2E, (void*) (u32RegUTMI+0x2e*2)); // chirp patch
636 writeb( UTMI_EYE_SETTING_2F, (void*) (u32RegUTMI+0x2f*2-1)); // chirp patch
637 #ifdef ENABLE_TX_RX_RESET_CLK_GATING_ECO
638 // DO UTMI TX/RX RESET
639 writeb( readb((void*)(u32RegUTMI+0x06*2)) | 0x03, (void*) (u32RegUTMI+0x06*2));
640 writeb( readb((void*)(u32RegUTMI+0x06*2)) & ~0x03, (void*) (u32RegUTMI+0x06*2));
641 #endif
642
643 //Add time-out mechanism to cover HW BUG
644 //HW ISSUE?
645 if( time_out >= 10000 )
646 {
647 //Maybe HW bug ==> check it out
648 ms_debug_err("ERR: Port reset cannot force complete!!\n");//HW ISSUE?
649 ms_ehci_softrst(pEhci);
650 }
651 u32Speed = (hcd_reg_readl((U32)&pEhci->op_regs->bus_control) >> 9) & 0x3;
652 //ms_debug_msg("SPEED: %x\n", (unsigned int)u32Speed);
653 ms_debug_msg("RootHub SPEED: %s\n", speed_name_list[u32Speed]);
654
655 u32Temp2 = hcd_reg_readl((U32)&pEhci->op_regs->hcmisc) & 0xfffffff3;
656
657 /* unset UTMI force full speed hub driving timing */
658 ms_UTMI_ANDXBYTE_EX(0x03, (~BIT2), u32RegUTMI);
659
660 if (u32Speed == 2) // high u32Speed
661 {
662 ms_UTMI_ORXBYTE_EX(0x09, 0x80, u32RegUTMI); //HS rx robust enable
663 #if defined(ENABLE_16US_EOF1)
664 /* set EOF1 to 16us for babble prevention under hub case */
665 //diag_printf("[EHCI] set 16us EOF1\n ");
666 u32Temp2 |= (1 << 2);
667 #else
668 u32Temp2 |= (3 << 2);
669 #endif
670 }
671 else if (u32Speed == 0 ) //full u32Speed
672 {
673 /* set UTMI force full speed hub driving timing */
674 ms_UTMI_ORXBYTE_EX(0x03, BIT2, u32RegUTMI);
675 ms_UTMI_ANDXBYTE_EX(0x09, 0x7F, u32RegUTMI);
676 u32Temp2 |= (2 << 2);
677 }
678 else if (u32Speed == 1 ) //low u32Speed
679 {
680 ms_UTMI_ANDXBYTE_EX(0x09, 0x7F, u32RegUTMI);
681 u32Temp2 |= (2 << 2);
682 }
683 hcd_reg_writel (u32Temp2, (U32)&pEhci->op_regs->hcmisc); // misc, EOF1
684
685 /* patch from Linux 2.6.28 */
686 //u32Temp = ms_reset_complete (pEhci, u16Index, u32Temp);
687 u32Temp = ms_reset_complete (pEhci, u16Index,
688 hcd_reg_readl ((U32)&pEhci->op_regs->portsc [u16Index]));
689 pHcd->isRootHubPortReset = FALSE;
690 }
691
692 if (!(u32Temp & (PORTSC_RESUME|PORTSC_RESET))) // patch from Linux 2.6.28
693 pEhci->u32ResetEnd[u16Index] = 0;
694
695 // don't show wPortStatus if it's owned by a companion hc
696 /* patch from Linux 2.6.28, TT root hub */
697 //if (!(u32Temp & PORTSC_OWNER))
698 {
699 if (u32Temp & PORTSC_CONNECT)
700 {
701 u32Status |= USB_PORT_STAT_CONNECTION;
702 u32Bus_monitor=hcd_reg_readl ((U32)&pEhci->op_regs->bus_control);
703 u32Bus_monitor>>=9;
704 if (u32Bus_monitor==2)
705 u32Status |= USB_PORT_STAT_HIGH_SPEED;
706 else if (u32Bus_monitor==1)
707 u32Status |= USB_PORT_STAT_LOW_SPEED;
708 //else ==> full u32Speed don't set any bits
709
710 }
711 if (u32Temp & PORTSC_PE)
712 u32Status |= USB_PORT_STAT_ENABLE;
713 if (u32Temp & (PORTSC_SUSPEND | PORTSC_RESUME))
714 u32Status |= USB_PORT_STAT_SUSPEND;
715 if (u32Temp & PORTSC_OC)
716 u32Status |= USB_PORT_STAT_OVERCURRENT;
717 if (u32Temp & PORTSC_RESET)
718 u32Status |= USB_PORT_STAT_RESET;
719 if (u32Temp & PORTSC_POWER)
720 u32Status |= USB_PORT_STAT_POWER;
721 }
722
723 *pBuf = u32Status;
724 *(pBuf+1) = u32Status >> 8;
725 *(pBuf+2) = u32Status >> 16;
726 *(pBuf+3) = u32Status >> 24;
727 break;
728 case Req_SetHubFeature:
729 if ((u16Value != C_HUB_LOCAL_POWER)&&(u16Value != C_HUB_OVER_CURRENT))
730 goto error;
731 break;
732 case Req_SetPortFeature:
733 if (!u16Index || u16Index > iPorts)
734 goto error;
735 u16Index--;
736 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc [u16Index]);
737 #if 0 // MStar patch for Faraday IP
738 if (u32Temp & PORTSC_OWNER)
739 break;
740 #endif
741 // patch from Linux
742 u32Temp &= ~PORTSC_RWC_BITS;
743
744 switch (u16Value)
745 {
746 case USB_PORT_FEAT_SUSPEND:
747 ms_debug_msg("SetPortFeature suspend\n");
748 hcd_reg_writel (u32Temp | PORTSC_SUSPEND,
749 (U32)&pEhci->op_regs->portsc [u16Index]);
750 break;
751 case USB_PORT_FEAT_POWER:
752 if (HCS_PPC (pEhci->hcs_params))
753 hcd_reg_writel (u32Temp | PORTSC_POWER,
754 (U32)&pEhci->op_regs->portsc [u16Index]);
755 break;
756 case USB_PORT_FEAT_RESET:
757 //Do port reset only if device attaches to this port
758 if( u32Temp&PORTSC_CONNECT )
759 {
760 pHcd->isRootHubPortReset = TRUE;
761 ms_ehci_stoprun_setting(HOST20_Enable, pEhci);
762
763 writeb(0x10, (void*)(u32RegUTMI+0x2C*2)); // chirp patch
764 writeb(0x00, (void*)(u32RegUTMI+0x2D*2-1)); // chirp patch
765 writeb(0x00, (void*)(u32RegUTMI+0x2E*2)); // chirp patch
766 writeb(0x00, (void*)(u32RegUTMI+0x2F*2-1)); // chirp patch
767 // Chirp K detection level: 0x80 => 400mv, 0x20 => 575mv
768 writeb(0x80 ,(void*)(u32RegUTMI+0x2A*2)); // chirp patch
769
770 u32Temp |= PORTSC_RESET;
771 u32Temp &= ~PORTSC_PE;
772 /*
773 * 50 ms resets on root for usb spec.
774 */
775 pEhci->u32ResetEnd [u16Index] = jiffies
776 + ((50 /* msec */ * HZ) / 1000);
777 hcd_reg_writel (u32Temp, (U32)&pEhci->op_regs->portsc [u16Index]); // port reset
778 }
779 else
780 {
781 /* fail reset process, if device has gone */
782 diag_printf("[USB] device has gone before bus reset\n");
783 iRetval = -ENODEV;
784 }
785 break;
786 default:
787 goto error;
788 }
789 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd); /* unblock posted writes */
790 break;
791
792 default:
793 error:
794 /* issue stall */
795 iRetval = -EPIPE;
796 }
797 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
798 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
799 return iRetval;
800 }
801
802 /*------------------------------------------------------------------------------*/
803 #include "drvEHCI_MEM.cxx"
804
805 /*
806 * @brief fill qtd buffer from urb
807 *
808 * @param struct ehci_qtd *pQtd
809 * @param dma_addr_t tBufAddr
810 * @param size_t total
811 * @param int iToken
812 * @param int iMaxpkt
813 *
814 * @return u32Cnt
815 */
816 static int
ms_qtd_pack(struct ehci_qtd * pQtd,dma_addr_t tBufAddr,size_t total,int iToken,int iMaxpkt)817 ms_qtd_pack (struct ehci_qtd *pQtd, dma_addr_t tBufAddr, size_t total,
818 int iToken, int iMaxpkt)
819 {
820 U32 u32Cnt;
821 int i/*, lastnums = 0*/;
822 //unsigned char u8PageShift;
823
824 /* buffer must continuous, first page address may not on 4K boundary */
825
826 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
827 pQtd->hw_buffer [0] = tBufAddr;
828 u32Cnt = 0x1000 - (tBufAddr & 0x0fff); /* rest of that page */
829 if (total < u32Cnt) /* ... iff needed */
830 u32Cnt = total;
831 else
832 {
833 tBufAddr += 0x1000;
834 tBufAddr &= ~0x0fff;
835
836 /* pQtd buffer range : min 16K, max 20K */
837 for (i = 1; u32Cnt < total && i < 5; i++)
838 {
839 pQtd->hw_buffer [i] = tBufAddr;
840 //lastnums++;
841 tBufAddr += 0x1000;
842 u32Cnt = ((u32Cnt+0x1000) < total) ? (u32Cnt+0x1000) : total;
843 }
844
845 /* short packets on transfer end */
846 if (u32Cnt != total)
847 u32Cnt -= (u32Cnt % iMaxpkt);
848 }
849 pQtd->hw_token = (u32Cnt << 16) | iToken;
850 pQtd->length = u32Cnt;
851 /* un-patched base on linux code */
852 //if ((u32Cnt > 0) && (lastnums < 4))
853 //{
854 // for (u8PageShift = lastnums + 1;u8PageShift < 5; u8PageShift++)
855 // {
856 // pQtd->hw_buffer[u8PageShift] = pQtd->hw_buffer [lastnums];
857 // }
858 //}
859 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
860 return u32Cnt;
861 }
862
863 /*-------------------------------------------------------------------------*/
864 /*
865 * @brief refresh QH overlay, based on Linux 3.10.x
866 * merge qh_refresh and qh_update
867 *
868 * @param struct ehci_hcd *pEhci
869 * @param struct ehci_qh *pQh
870 *
871 * @return none
872 */
873
874 static void
ms_qh_refresh(struct ehci_hcd * pEhci,struct ehci_qh * pQh)875 ms_qh_refresh (struct ehci_hcd *pEhci, struct ehci_qh *pQh)
876 {
877 struct ehci_qtd *pQtd;
878
879 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
880 pQtd = entry_to_container(pQh->qtd_list.next, struct ehci_qtd, qtd_list);
881
882 if (pQh->hw_token & QTD_STS_ACT)
883 {
884 ms_debug_debug("[USB] QTD_STS_ACT, (%x,%x)\n", pQh->hw_next_qtd, pQtd->hw_next_qtd);
885 pQh->hw_next_qtd = pQtd->hw_next_qtd;
886 }
887 else {
888 if (pQh->qh_status != QH_STS_IDLE)
889 ms_debug_err("[USB] Not in IDLE state!\n");
890 pQh->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
891 pQh->hw_alt_next_qtd = EHCI_LIST_END;
892
893 if (!(pQh->hw_ep_state1 & QH_DTC_BIT)) {
894 unsigned is_out, epnum;
895
896 is_out = usb_pipeout(pQtd->urb->u32Pipe);
897 epnum = (pQh->hw_ep_state1 >> 8) & 0x0f;
898 if (!usb_gettoggle (pQh->dev, epnum, is_out)) {
899 pQh->hw_token &= ~QTD_TOGGLE;
900 usb_settoggle (pQh->dev, epnum, is_out, 1);
901 }
902 }
903
904 pQh->hw_token &= (QTD_TOGGLE | QTD_STS_PERR);
905 }
906
907 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
908 }
909
910 #ifndef ENABLE_QH_REFRESH // replaced by ms_qh_refresh()
911 /*-------------------------------------------------------------------------*/
912 /*
913 * @brief link qtd list to qh
914 *
915 * @param struct ehci_qh *pQh
916 * @param struct ehci_qtd *pQtd
917 *
918 * @return none
919 */
920
921 static __inline__ void
ms_qh_update_link(struct ehci_qh * pQh,struct ehci_qtd * pQtd)922 ms_qh_update_link (struct ehci_qh *pQh, struct ehci_qtd *pQtd)
923 {
924 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
925 pQh->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
926 pQh->hw_alt_next_qtd = EHCI_LIST_END;
927
928 /* HC must see latest pQtd and pQh data before we clear ACTIVE+HALT */
929 wmb ();
930 pQh->hw_token &= (QTD_TOGGLE | QTD_STS_PERR);
931 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
932 }
933 #endif
934
935 /*-------------------------------------------------------------------------*/
936 /*
937 * @brief check qtd status register
938 *
939 * @param struct urb *pUrb
940 * @param size_t length
941 * @param U32 u32Token
942 *
943 * @return none
944 */
945
ms_qtd_copy_status(struct urb * pUrb,size_t length,U32 u32Token)946 static void ms_qtd_copy_status (
947 struct urb *pUrb,
948 size_t length,
949 U32 u32Token
950 )
951 {
952 #ifdef USB_EHCI_TT
953 struct usb_hcd *hcd = pUrb->dev->bus->hcpriv;
954 #endif
955
956 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
957
958 if (QTD_PID (u32Token) != 2)
959 pUrb->u32ActualLength += length - QTD_BYTES (u32Token);
960
961 /* error codes ���n�h�復 */
962 if (pUrb->s32Status != -EINPROGRESS)
963 return;
964
965 /* force cleanup , may not a wrong */
966 if (IS_SHORT_READ (u32Token))
967 pUrb->s32Status = -MS_ERR_REMOTEIO;
968
969 if (u32Token & QTD_STS_HALT)
970 {
971 if (u32Token & QTD_STS_BABBLE)
972 {
973 diag_printf(" [ !!!! USB QTD_STS_BABBLE !!!!] \n "); // SHOULD BE PRINT
974 pUrb->s32Status = -MS_ERR_OVERFLOW;
975 }
976 else if (u32Token & QTD_STS_MISSMF)
977 {
978 diag_printf(" [ !!!! USB QTD_STS_MISSMF !!!!] \n "); // SHOULD BE PRINT
979 /* FS/LS transfer lost complete-split */
980 pUrb->s32Status = -MS_ERR_PROTOCAL;
981 }
982 else if (u32Token & QTD_STS_DATERR)
983 {
984 diag_printf(" [ !!!! USB QTD_STS_DATERR !!!!] \n "); // SHOULD BE PRINT
985 pUrb->s32Status = (QTD_PID (u32Token) == 1) /* Is IN token? */
986 ? -MS_ERR_RECEIVE /* HCD can't read data */
987 : -MS_ERR_SEND; /* HCD can't write data */
988 }
989 else if (u32Token & QTD_STS_XACTERR)
990 {
991 ms_debug_msg(" [ USB QTD_STS_XACTERR ] \n ");
992
993 if (QTD_CERR (u32Token)) /* ���~���Atimeout, bad crc, wrong PID */
994 pUrb->s32Status = -EPIPE;
995 else
996 {
997 ms_debug_warn ("devpath %s ep%d%s 3strikes\n",
998 pUrb->dev->devpath,
999 (int)usb_pipeendpoint (pUrb->u32Pipe),
1000 usb_pipein (pUrb->u32Pipe) ? "in" : "out");
1001 pUrb->s32Status = -MS_ERR_PROTOCAL;
1002 }
1003 /* �S��error bit ���O��halt, will stall */
1004 }
1005 else if (QTD_CERR (u32Token))
1006 pUrb->s32Status = -EPIPE;
1007 else /* ���������~ */
1008 pUrb->s32Status = -MS_ERR_PROTOCAL;
1009
1010 if( pUrb->s32Status < 0 )
1011 {
1012 ms_debug_warn("dev%d ep%d%s qtd token %08x --> status %d, len=%d\n",
1013 (int)usb_pipedevice (pUrb->u32Pipe),
1014 (int)usb_pipeendpoint (pUrb->u32Pipe),
1015 usb_pipein (pUrb->u32Pipe) ? "in" : "out",
1016 (unsigned int)u32Token, (int)pUrb->s32Status, (int)pUrb->u32TransferBufferLength);
1017 }
1018
1019
1020 /* Stall ��ܻݭn��error recovery */
1021 if (pUrb->s32Status == -EPIPE)
1022 {
1023 /* halt bit obsolete */
1024 //int pipe = pUrb->u32Pipe;
1025
1026 //if (!usb_pipecontrol (pipe))
1027 // usb_endpoint_halt (pUrb->dev, usb_pipeendpoint (pipe), usb_pipeout (pipe));
1028
1029 }
1030 /* if async CSPLIT failed, try cleaning out the TT buffer */
1031 /* patch from linux 2.6.28 */
1032 #ifdef USB_EHCI_TT
1033 else if (pUrb->dev->tt && !usb_pipeint (pUrb->u32Pipe)
1034 && ((u32Token & QTD_STS_MISSMF) != 0 || QTD_CERR(u32Token) == 0)
1035 && (pUrb->dev->tt->hub != hcd->self.root_hub))
1036 {
1037 //#ifdef DEBUG
1038 ms_debug_msg ("clear tt buffer port %d, a%d ep%d t%08x\n",
1039 pUrb->dev->u32TTPort, pUrb->dev->u32DevNum,
1040 usb_pipeendpoint (pUrb->u32Pipe), u32Token);
1041 //#endif
1042 ms_usb_hub_tt_clear_buffer (pUrb->dev, pUrb->u32Pipe);
1043 }
1044 #endif
1045 }
1046 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1047 }
1048
1049
1050 static void
ms_urb_done(struct ehci_hcd * pEhci,struct urb * pUrb,struct stPtRegs * pRegs)1051 ms_urb_done (struct ehci_hcd *pEhci, struct urb *pUrb, struct stPtRegs *pRegs)
1052 {
1053 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1054 if (pUrb->hcpriv != 0)
1055 {
1056 struct ehci_qh *qh = (struct ehci_qh *) pUrb->hcpriv;
1057 ms_qh_put (pEhci, qh);
1058 }
1059
1060 osapi_spin_lock (&pUrb->lock);
1061 pUrb->hcpriv = 0;
1062 switch (pUrb->s32Status)
1063 {
1064 case -EINPROGRESS: /* success */
1065 pUrb->s32Status = 0;
1066 default: /* fault */
1067 INCREASE (pEhci->stats.u32Complete);
1068 break;
1069 case -MS_ERR_REMOTEIO: /* fault or normal */
1070 if (!(pUrb->u32TransferFlags & MS_FLAG_URB_SHORT_NOT_OK))
1071 pUrb->s32Status = 0;
1072 INCREASE (pEhci->stats.u32Complete);
1073 break;
1074 case -ECONNRESET: /* canceled */
1075 case -ENOENT:
1076 INCREASE(pEhci->stats.u32Unlink);
1077 break;
1078 }
1079 osapi_spin_unlock (&pUrb->lock);
1080
1081 /* HCD run complete() funciton */
1082 osapi_spin_unlock (&pEhci->tHcdLock);
1083 ms_usb_hcd_giveback_urb (pUrb, pRegs);
1084 osapi_spin_lock (&pEhci->tHcdLock);
1085 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1086 }
1087
1088 /*
1089 * @brief free qtd list and run urb's complet function
1090 *
1091 * @param struct ehci_hcd *pEhci
1092 * @param struct ehci_qh *pQh
1093 * @param struct stPtRegs *pRegs
1094 *
1095 * @return u8Count
1096 */
1097
1098 #define HALT_BIT QTD_STS_HALT
1099 static unsigned
ms_qh_completions(struct ehci_hcd * pEhci,struct ehci_qh * pQh,struct stPtRegs * pRegs)1100 ms_qh_completions (struct ehci_hcd *pEhci, struct ehci_qh *pQh, struct stPtRegs *pRegs)
1101 {
1102 struct ehci_qtd *pLast = 0, *pEnd = pQh->pDummyQtd;
1103 struct list_head *entry, *tmp;
1104 int iStopped;
1105 unsigned u8Count = 0;
1106 int iDoStatus = 0;
1107 unsigned char u8State;
1108 //BOOL bIsPageOver = FALSE; // obsolete
1109
1110 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1111 if (ms_is_empty_list (&pQh->qtd_list))
1112 {
1113 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1114 return u8Count;
1115 }
1116
1117 u8State = pQh->qh_status;
1118 pQh->qh_status = QH_STS_COMPLETING;
1119 iStopped = (u8State == QH_STS_IDLE);
1120
1121 list_for_loop_ex (entry, tmp, &pQh->qtd_list)
1122 {
1123 struct ehci_qtd *pQtd;
1124 struct urb *pUrb;
1125 U32 u32Token = 0;
1126
1127 pQtd = entry_to_container (entry, struct ehci_qtd, qtd_list);
1128 //list_entry (entry, struct ehci_qtd,qtd_list, struct list_head,qtd);
1129 pUrb = pQtd->urb;
1130
1131 /* obsolete, no such hardware bug */
1132 //if ( ((pQtd->hw_token >> 12) & 0x7) > 5) //For patching H/W bug
1133 //{
1134 // bIsPageOver = TRUE;
1135 //}
1136
1137 /* free previous QTD ...*/
1138 if (pLast)
1139 {
1140 if (pLast->urb != pUrb)
1141 {
1142 ms_urb_done (pEhci, pLast->urb, pRegs);
1143 u8Count++;
1144 }
1145 ms_ehci_qtd_free (pEhci, pLast);
1146 pLast = 0;
1147 }
1148
1149 if (pQtd == pEnd)
1150 break;
1151
1152 /* HW implement qtds content copy */
1153 rmb ();
1154
1155 u32Token = pQtd->hw_token;
1156
1157 xacterr_retry:
1158 if ((u32Token & QTD_STS_ACT) == 0)
1159 {
1160 if ((u32Token & QTD_STS_HALT) != 0)
1161 {
1162 if ((u32Token & QTD_STS_XACTERR) &&
1163 QTD_CERR(u32Token) == 0 &&
1164 --pQh->xacterrs > 0 /*&& !urb->unlinked*/) {
1165 u32Token &= ~QTD_STS_HALT;
1166 u32Token |= QTD_STS_ACT | (MAX_CERR_CNT << 10);
1167 pQtd->hw_token = u32Token;
1168 wmb();
1169 pQh->hw_token = u32Token;
1170 goto xacterr_retry;
1171 }
1172 iStopped = 1;
1173 }
1174 else if (IS_SHORT_READ (u32Token)
1175 /* patch from linux */
1176 && !(pQtd->hw_alt_next_qtd & EHCI_LIST_END))
1177 // && (pQh->hw_alt_next_qtd & QTD_MASK)
1178 // == pEhci->stAsync->hw_alt_next_qtd)
1179 {
1180 iStopped = 1;
1181 goto halt;
1182 }
1183 }
1184 else if(!iStopped && HCD_IS_RUNNING (pEhci->hcd.state))
1185 {
1186 break;
1187 }
1188 else
1189 {
1190 iStopped = 1;
1191
1192 if (pUrb->s32Status == -EINPROGRESS)
1193 continue;
1194
1195 /* issue status for control transfer */
1196 if ((iDoStatus != 0)
1197 && QTD_PID (u32Token) == 0) //Check is OUT token?
1198 {
1199 iDoStatus = 0;
1200 continue;
1201 }
1202
1203 if (u8State == QH_STS_IDLE
1204 && pQtd->qtd_dma_addr
1205 == pQh->hw_current_qtd)
1206 u32Token = pQh->hw_token;
1207
1208 if ((HALT_BIT & pQh->hw_token) == 0)
1209 {
1210 halt:
1211 pQh->hw_token |= HALT_BIT;
1212 wmb ();
1213 }
1214 }
1215
1216
1217 /* remove it from the queue */
1218 osapi_spin_lock (&pUrb->lock);
1219 ms_qtd_copy_status (pUrb, pQtd->length, u32Token);
1220 /* obsolete, no such hardware bug */
1221 //if (bIsPageOver)
1222 //{
1223 // ms_debug_warn("urb error because C_Page > 5\n");
1224 // pUrb->s32Status = (QTD_PID (u32Token) == 1) /* Is IN token? */
1225 // ? -MS_ERR_RECEIVE /* HCD can't read data */
1226 // : -MS_ERR_SEND; /* HCD can't write data */
1227 //}
1228 iDoStatus = (pUrb->s32Status == -MS_ERR_REMOTEIO)
1229 && usb_pipecontrol (pUrb->u32Pipe);
1230 osapi_spin_unlock (&pUrb->lock);
1231
1232 if (iStopped && pQtd->qtd_list.prev != &pQh->qtd_list) {
1233 pLast = entry_to_container (pQtd->qtd_list.prev, struct ehci_qtd, qtd_list);
1234 //list_entry (qtd->qtd_list.prev,struct ehci_qtd,qtd_list, struct list_head,last);
1235 pLast->hw_next_qtd = pQtd->hw_next_qtd;
1236
1237 }
1238 ms_list_remove (&pQtd->qtd_list);
1239 pLast = pQtd;
1240
1241 pQh->xacterrs = QH_MAX_XACTRTT_RETRY;
1242 }
1243
1244 if (pLast != 0)
1245 {
1246 ms_urb_done (pEhci, pLast->urb, pRegs);
1247 u8Count++;
1248 ms_ehci_qtd_free (pEhci, pLast);
1249 pLast = 0;
1250 }
1251
1252 pQh->qh_status = u8State;
1253
1254 if ((iStopped != 0)
1255 /* avoid some old EHCI vendor will overlay dummy qtds */
1256 || pQh->hw_next_qtd == EHCI_LIST_END)
1257 {
1258 #ifdef ENABLE_QH_REFRESH
1259 /* patch from linux 2.6.x ~ 3.8.x */
1260 if (u8State == QH_STS_IDLE)
1261 ms_qh_refresh(pEhci, pQh);
1262 else if (u8State == QH_STS_LINKED) {
1263 /* patch base on linux 2.6.x */
1264 if ((pQh->hw_ep_state2 & QH_SMASK) != 0) {
1265 ms_intr_deschedule(pEhci, pQh);
1266 ms_qh_schedule(pEhci, pQh);
1267 }
1268 else
1269 ms_unlink_async(pEhci, pQh);
1270 }
1271 #else // replaced by linux code
1272 if (ms_is_empty_list (&pQh->qtd_list))
1273 pEnd = pQh->pDummyQtd;
1274 else
1275 {
1276 pEnd = entry_to_container (pQh->qtd_list.next,struct ehci_qtd, qtd_list);
1277 if (pEnd->qtd_dma_addr == pQh->hw_current_qtd)
1278 pEnd = 0;
1279 }
1280 if (pEnd)
1281 ms_qh_update_link (pQh, pEnd);
1282 #endif
1283 }
1284
1285 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1286 return u8Count;
1287 }
1288
1289 /*-------------------------------------------------------------------------*/
1290 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
1291 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
1292 // ... and packet size, for any kind of endpoint descriptor
1293 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1294
ms_qtd_register_free(struct ehci_hcd * pEhci,struct list_head * qtd_list)1295 static void ms_qtd_register_free (
1296 struct ehci_hcd *pEhci,
1297 struct list_head *qtd_list
1298 )
1299 {
1300 struct list_head *pEntry, *pTemp;
1301
1302 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1303 list_for_loop_ex (pEntry, pTemp, qtd_list)
1304 {
1305 struct ehci_qtd *pQtd;
1306
1307 pQtd = entry_to_container (pEntry, struct ehci_qtd, qtd_list);
1308 ms_list_remove (&pQtd->qtd_list);
1309 ms_ehci_qtd_free (pEhci, pQtd);
1310 }
1311 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1312 }
1313
1314 /*
1315 * @brief prepare and allocate qtd_list
1316 * fill buffer to qtd from urb
1317 *
1318 * @param struct ehci_hcd *pEhci
1319 * @param struct urb *pUrb
1320 * @param struct list_head *pHead
1321 * @param int iFlags
1322 *
1323 * @return struct list_head *
1324 */
1325
1326 static struct list_head *
ms_qh_urb_process(struct ehci_hcd * pEhci,struct urb * pUrb,struct list_head * pHead,int iFlags)1327 ms_qh_urb_process (
1328 struct ehci_hcd *pEhci,
1329 struct urb *pUrb,
1330 struct list_head *pHead,
1331 int iFlags
1332 )
1333 {
1334 struct ehci_qtd *pQtd, *pQtdPrev;
1335 dma_addr_t tBuf;
1336 int iLen, iMaxpkt;
1337 int iIsInput;
1338 U32 u32Token;
1339
1340 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1341 pQtd = ms_ehci_qtd_alloc (pEhci, iFlags);
1342 if (!pQtd)
1343 {
1344 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1345 return 0;
1346 }
1347 ms_insert_list_before (&pQtd->qtd_list, pHead);
1348 pQtd->urb = pUrb;
1349
1350 u32Token = QTD_STS_ACT;
1351 u32Token |= (MAX_CERR_CNT << 10);
1352 /* for split transactions, SplitXState initialized to zero */
1353
1354 iLen = pUrb->u32TransferBufferLength;
1355 iIsInput = usb_pipein (pUrb->u32Pipe);
1356 if (usb_pipecontrol (pUrb->u32Pipe))
1357 {
1358 ms_qtd_pack (pQtd, pUrb->tSetupDma, sizeof (struct usb_ctrlrequest),
1359 u32Token | PID_SETUP, 8);
1360
1361 /* ... and always at least one more pid */
1362 u32Token ^= QTD_TOGGLE;
1363 pQtdPrev = pQtd;
1364 pQtd = ms_ehci_qtd_alloc (pEhci, iFlags);
1365 if (!pQtd)
1366 goto cleanup;
1367 pQtd->urb = pUrb;
1368 pQtdPrev->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
1369 ms_insert_list_before (&pQtd->qtd_list, pHead);
1370 }
1371
1372 /*
1373 * data stage : prepare buffer
1374 */
1375
1376 if (iLen > 0)
1377 tBuf = pUrb->tTransferDma;
1378 else
1379 tBuf = 0;
1380
1381 if (!tBuf || iIsInput)
1382 u32Token |= PID_IN;
1383
1384 /* patch code from linux */
1385 iMaxpkt = max_packet(usb_maxpacket(pUrb->dev, pUrb->u32Pipe, !iIsInput));
1386 //if (usb_pipebulk(pUrb->u32Pipe))
1387 //{
1388 // switch (pUrb->dev->eSpeed)
1389 // {
1390 // case USB_FULL_SPEED:
1391 // iMaxpkt = max_packet(usb_maxpacket(pUrb->dev, pUrb->u32Pipe, !iIsInput));
1392 // break;
1393 // case USB_HIGH_SPEED:
1394 // default:
1395 // iMaxpkt = 512;
1396 // break;
1397 // }
1398 //}
1399 //else
1400 //{
1401 // iMaxpkt = max_packet(usb_maxpacket(pUrb->dev, pUrb->u32Pipe, !iIsInput));
1402 //}
1403
1404 for (;;)
1405 {
1406 int this_qtd_len;
1407
1408 this_qtd_len = ms_qtd_pack (pQtd, tBuf, iLen, u32Token, iMaxpkt);
1409 iLen -= this_qtd_len;
1410 tBuf += this_qtd_len;
1411 if (iIsInput)
1412 pQtd->hw_alt_next_qtd = pEhci->stAsync->hw_alt_next_qtd;
1413
1414 /* for control transaction, maybe needs switch it */
1415 if ((iMaxpkt & (this_qtd_len + (iMaxpkt - 1))) == 0)
1416 u32Token ^= QTD_TOGGLE;
1417
1418 if (iLen <= 0)
1419 break;
1420
1421 pQtdPrev = pQtd;
1422 pQtd = ms_ehci_qtd_alloc (pEhci, iFlags);
1423 if (!pQtd)
1424 goto cleanup;
1425 pQtd->urb = pUrb;
1426 pQtdPrev->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
1427 ms_insert_list_before (&pQtd->qtd_list, pHead);
1428 }
1429
1430 if ((pUrb->u32TransferFlags & MS_FLAG_URB_SHORT_NOT_OK) == 0
1431 || usb_pipecontrol (pUrb->u32Pipe))
1432 pQtd->hw_alt_next_qtd = EHCI_LIST_END;
1433
1434 //if (tBuf != 0)
1435 if (pUrb->u32TransferBufferLength != 0)
1436 {
1437 int one_more = 0;
1438
1439 if (usb_pipecontrol (pUrb->u32Pipe))
1440 {
1441 one_more = 1;
1442 u32Token ^= 0x0100; /* PID IN/OUT toggled */
1443 u32Token |= QTD_TOGGLE; /* set DATA1 */
1444 }
1445 //else if (usb_pipebulk (pUrb->u32Pipe)
1446 else if (usb_pipeout (pUrb->u32Pipe)
1447 && (pUrb->u32TransferFlags & MS_FLAG_URB_ZERO_PACKET)
1448 && !(pUrb->u32TransferBufferLength % iMaxpkt))
1449 {
1450 one_more = 1;
1451 }
1452
1453 if (one_more)
1454 {
1455 pQtdPrev = pQtd;
1456 pQtd = ms_ehci_qtd_alloc (pEhci, iFlags);
1457 if (!pQtd)
1458 goto cleanup;
1459 pQtd->urb = pUrb;
1460 pQtdPrev->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
1461 ms_insert_list_before (&pQtd->qtd_list, pHead);
1462
1463 /* make NULL packet */
1464 ms_qtd_pack (pQtd, 0, 0, u32Token, 0);
1465 }
1466 }
1467
1468 /* set interrupt enable when qtd completed */
1469 if (!(pUrb->u32TransferFlags & MS_FLAG_URB_NO_INTERRUPT))
1470 pQtd->hw_token |= QTD_IOC;
1471
1472 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1473 return pHead;
1474
1475 cleanup:
1476
1477 ms_qtd_register_free (pEhci, pHead);
1478 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1479 return 0;
1480 }
1481
1482 /*-------------------------------------------------------------------------*/
1483 /* Obsolete code */
1484 //static __inline__ void
1485 //ms_clear_toggle (struct usb_device *pUdev, int iEp, int is_out, struct ehci_qh *pQh)
1486 //{
1487 // ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1488 // ms_debug_msg ("clear toggle dev%d iEp 0x%x-%s\n",
1489 // (int)pUdev->u32DevNum, iEp, is_out ? "out" : "in");
1490 // pQh->hw_token &= ~(QTD_TOGGLE);
1491 //
1492 // usb_settoggle (pUdev, iEp, is_out, 1);
1493 // ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1494 //}
1495 /*
1496 * @brief allocate and make qh
1497 *
1498 * @param struct ehci_hcd *pEhci
1499 * @param struct urb *pUrb
1500 * @param int iFlags
1501 *
1502 * @return struct ehci_qh *
1503 */
1504
1505 static struct ehci_qh *
ms_qh_make(struct ehci_hcd * pEhci,struct urb * pUrb,int iFlags)1506 ms_qh_make (
1507 struct ehci_hcd *pEhci,
1508 struct urb *pUrb,
1509 int iFlags
1510 )
1511 {
1512 struct ehci_qh *pQh = ms_ehci_qh_alloc (pEhci, iFlags);
1513 U32 u32Info1 = 0, u32Info2 = 0;
1514 int iIsInput, iType;
1515 int iMaxpkt = 0;
1516
1517 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1518 if (!pQh)
1519 {
1520 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1521 return pQh;
1522 }
1523
1524 u32Info1 |= usb_pipeendpoint (pUrb->u32Pipe) << 8;
1525 u32Info1 |= usb_pipedevice (pUrb->u32Pipe) << 0;
1526
1527 iIsInput = usb_pipein (pUrb->u32Pipe);
1528 iType = usb_pipetype (pUrb->u32Pipe);
1529 iMaxpkt = usb_maxpacket (pUrb->dev, pUrb->u32Pipe, !iIsInput);
1530
1531 /* check if maximum packet size > 1024 bytes */
1532 if (max_packet(iMaxpkt) > 1024) {
1533 ms_debug_err("error maxp %d\n", max_packet(iMaxpkt));
1534 goto done;
1535 }
1536
1537 if (iType == EP_INTERRUPT)
1538 {
1539 pQh->u8Usecs = NS_2_US(ms_usb_calc_bus_time (USB_HIGH_SPEED, iIsInput,
1540 hb_mult (iMaxpkt) * max_packet (iMaxpkt)));
1541
1542 pQh->u16Start = NO_FRAME;
1543
1544 if (pUrb->dev->eSpeed == USB_HIGH_SPEED)
1545 {
1546 pQh->c_usecs = 0;
1547 pQh->u8Gap_uf = 0;
1548
1549 /* Warning, highspeed periods < 1 frame. */
1550 pQh->u16Period = pUrb->u32Interval >> 3;
1551 /* patch from linux, 2.6.28 and 3.10.86 different */
1552 //if (pQh->u16Period < 1)
1553 if (pQh->u16Period == 1 && pUrb->u32Interval != 1)
1554 {
1555 ms_debug_warn ("intr period %d uframes, NYET!", (int)pUrb->u32Interval);
1556 goto done;
1557 }
1558 }
1559 else
1560 {
1561
1562 /* FS/LS transfer times */
1563 pQh->u8Gap_uf = 1 + ms_usb_calc_bus_time (pUrb->dev->eSpeed,
1564 iIsInput, iMaxpkt) / (125 * 1000);
1565
1566 /* Warning, let SPLIT/CSPLIT times to close */
1567 if (iIsInput)
1568 { // SPLIT, gap, CSPLIT+DATA
1569 pQh->c_usecs = pQh->u8Usecs + HIGHSPEED_US (0);
1570 pQh->u8Usecs = (U8)HIGHSPEED_US (1);
1571 }
1572 else
1573 { // SPLIT+DATA, gap, CSPLIT
1574 pQh->u8Usecs += HIGHSPEED_US (1);
1575 pQh->c_usecs = (U8)HIGHSPEED_US (0);
1576 }
1577 pQh->u16Period = pUrb->u32Interval;
1578
1579 }
1580 }
1581
1582 /* patch from linux */
1583 pQh->dev = pUrb->dev;
1584
1585 /* merge code into the following switch case description */
1586 #if 0
1587 if (pUrb->dev->eSpeed == USB_HIGH_SPEED)
1588 {
1589 u32Info1 |= (2 << 12);
1590 }
1591 else if (pUrb->dev->eSpeed == USB_LOW_SPEED)
1592 {
1593 u32Info1 |= (1 << 12);
1594 }
1595 else
1596 {
1597 if (pUrb->dev->eSpeed != USB_FULL_SPEED)
1598 ms_debug_warn ("unknow speed %d", pUrb->dev->eSpeed);
1599 }
1600 #endif
1601
1602 /* Is TT? */
1603 switch (pUrb->dev->eSpeed)
1604 {
1605
1606 case USB_LOW_SPEED:
1607 //if (iType == EP_CONTROL)
1608 //{
1609 // u32Info1 |= 8 << 16; /* hard code maxpacket item */
1610 //}
1611 u32Info1 |= (1 << 12); /* EPS is 1.5 Mb/s */
1612
1613 case USB_FULL_SPEED:
1614 /* patch from linux, maxp applied */
1615 //if (iType == EP_CONTROL && (pUrb->dev->eSpeed == USB_FULL_SPEED) )
1616 //{
1617 // //info1 |= 64 << 16; // fixed maxpacket
1618 // u32Info1 |= max_packet (iMaxpkt) << 16; // PIPE_INTERRUPT,PIPE_BULK,PIPE_ISOCHRONOUS
1619 //}
1620 //if (iType != EP_CONTROL)
1621 //{
1622 // u32Info1 |= max_packet (iMaxpkt) << 16; // PIPE_INTERRUPT,PIPE_BULK,PIPE_ISOCHRONOUS
1623 //}
1624 u32Info1 |= iMaxpkt << 16;
1625 /* EPS 0 means "full" */
1626 // info1 |= (3 << 12); /* EPS "reserve" */
1627 if (iType != EP_INTERRUPT)
1628 u32Info1 |= (EHCI_RL_NAKCNT_TT << 28);
1629 if (iType == EP_CONTROL)
1630 {
1631 u32Info1 |= QH_C_BIT; /* for TT */
1632 u32Info1 |= QH_DTC_BIT; /* toggle from qtd */
1633 }
1634 u32Info2 |= (EHCI_HI_BW_MULT_TT << 30);
1635
1636 /* linux code always sets ttport, but not to set hubaddr iff roothub */
1637 u32Info2 |= pUrb->dev->u32TTPort << 23; /* Port Number */
1638 if (pUrb->dev->tt && pUrb->dev->tt->hub->u32DevNum != 1) // Skip the Root Hub devnum == 1
1639 {
1640 u32Info2 |= pUrb->dev->tt->hub->u32DevNum << 16; /* Hub Addr */
1641 ms_debug_debug("[USB] set TT and not root hub, (ttport, hubaddr) = (%d,%d)\n", pUrb->dev->u32TTPort, pUrb->dev->tt->hub->u32DevNum);
1642 }
1643 //if (pUrb->dev->tt->hub->u32DevNum != 1) // Skip the Root Hub devnum == 1
1644 //{
1645 // u32Info2 |= pUrb->dev->u32TTPort << 23; /* Port Number */
1646 // u32Info2 |= pUrb->dev->tt->hub->u32DevNum << 16; /* Hub Addr */
1647 //}
1648 /* NOTE: if (EP_INTERRUPT) { scheduler sets c-mask } */
1649 break;
1650 case USB_HIGH_SPEED: /* �P TT �L�� */
1651 u32Info1 |= (2 << 12); /* EPS is 480Mb/s */
1652
1653 if (iType == EP_CONTROL)
1654 {
1655 u32Info1 |= (EHCI_RL_NAKCNT << 28);
1656 u32Info1 |= 64 << 16; /* Endpoint (wMaxPacketSize) */
1657 u32Info1 |= QH_DTC_BIT; /* Data toggle control */
1658 u32Info2 |= (EHCI_HI_BW_MULT_HS << 30);
1659 }
1660 else if (iType == EP_BULK)
1661 {
1662 u32Info1 |= (EHCI_RL_NAKCNT << 28);
1663 u32Info1 |= max_packet (iMaxpkt) << 16; // Philips mp3 player endpoint descriptor bug
1664 u32Info2 |= (EHCI_HI_BW_MULT_HS << 30);
1665 }
1666 else
1667 { /* Other transation type */
1668 u32Info1 |= max_packet (iMaxpkt) << 16;
1669 u32Info2 |= hb_mult (iMaxpkt) << 30;
1670 }
1671 break;
1672 default:
1673 ms_debug_msg ("usb dev %p speed %d", pUrb->dev, pUrb->dev->eSpeed);
1674 done:
1675 ms_qh_put (pEhci, pQh);
1676 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1677 return 0;
1678 }
1679
1680 pQh->qh_status = QH_STS_IDLE;
1681 pQh->hw_ep_state1 = u32Info1;
1682 pQh->hw_ep_state2 = u32Info2;
1683 usb_settoggle (pUrb->dev, usb_pipeendpoint (pUrb->u32Pipe), !iIsInput, 1);
1684 #ifdef ENABLE_QH_REFRESH
1685 /* patch from linux 2.6.x ~ 3.8.x */
1686 ms_qh_refresh(pEhci, pQh);
1687 #else
1688 ms_qh_update_link (pQh, pQh->pDummyQtd); // replaced by ms_qh_refresh()
1689 #endif
1690 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1691 return pQh;
1692 }
1693
1694 /*-------------------------------------------------------------------------*/
1695 /*
1696 * @brief start async schedule
1697 *
1698 * @param struct ehci_hcd *pEhci
1699 * @param struct ehci_qh *pQh
1700 *
1701 * @return none
1702 */
1703
ms_qh_link_async(struct ehci_hcd * pEhci,struct ehci_qh * pQh)1704 static void ms_qh_link_async (struct ehci_hcd *pEhci, struct ehci_qh *pQh)
1705 {
1706 U32 u32DmaAddr = QH_NEXT (pQh->qh_dma_addr);
1707 struct ehci_qh *pHead;
1708
1709 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1710 pHead = pEhci->stAsync;
1711 ms_timer_action_done (pEhci, TIMER_ASYNC_OFF);
1712
1713 if (!pHead->qh_next.qh)
1714 {
1715 U32 cmd = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
1716 //If disable => restart it
1717 if (!(cmd & USBCMD_ASE))
1718 {
1719 (void) ms_check_status (&pEhci->op_regs->usbsts, USBSTS_ASS, 0, 150);
1720 cmd |= USBCMD_ASE | USBCMD_RUN; //asynchronous scheduler enable
1721 hcd_reg_writel (cmd, (U32)&pEhci->op_regs->usbcmd);
1722 pEhci->hcd.state = HCD_STATE_RUNNING;
1723 }
1724 }
1725
1726 /* patch from linux code */
1727 #ifdef ENABLE_QH_REFRESH
1728 /* clear toggle */
1729 if (pQh->qh_status == QH_STS_IDLE)
1730 ms_qh_refresh(pEhci, pQh);
1731 #else
1732 /* Don't write QH memory if not necessary */
1733 if(pQh->hw_token & HALT_BIT)
1734 pQh->hw_token &= ~HALT_BIT;
1735 #endif
1736
1737 pQh->qh_next = pHead->qh_next;
1738 pQh->hw_next_qh = pHead->hw_next_qh;
1739 wmb ();
1740
1741 pHead->qh_next.qh = pQh;
1742 pHead->hw_next_qh = u32DmaAddr;
1743
1744 /* note: qh descriptor needs to flush into the memory */
1745
1746 pQh->xacterrs = QH_MAX_XACTRTT_RETRY; // maximum xacterr retry count
1747 pQh->qh_status = QH_STS_LINKED;
1748 /* IRQ will report qtd completions event */
1749 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1750 }
1751
1752 /*-------------------------------------------------------------------------*/
1753
1754 #define QH_ADDR_MASK 0x7f
1755
ms_qh_append_tds(struct ehci_hcd * pEhci,struct urb * pUrb,struct list_head * qtd_list,int iEpNum,void ** ptr)1756 static struct ehci_qh *ms_qh_append_tds (
1757 struct ehci_hcd *pEhci,
1758 struct urb *pUrb,
1759 struct list_head *qtd_list,
1760 int iEpNum,
1761 void **ptr
1762 )
1763 {
1764 struct ehci_qh *pQh = 0;
1765 //int maxp;
1766
1767 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1768 pQh = (struct ehci_qh *) *ptr;
1769 if (pQh == 0)
1770 {
1771 pQh = ms_qh_make (pEhci, pUrb, GFP_ATOMIC);
1772 *ptr = pQh;
1773 }
1774
1775 if (pQh != 0)
1776 {
1777 struct ehci_qtd *pQtd;
1778
1779 if (ms_is_empty_list (qtd_list))
1780 pQtd = 0;
1781 else
1782 {
1783 pQtd = entry_to_container (qtd_list->next, struct ehci_qtd, qtd_list);
1784 //list_entry (qtd_list->next, struct ehci_qtd, qtd_list, struct list_head, qtd);
1785 }
1786
1787 /* control qh may need patching after enumeration */
1788 if (iEpNum == 0)
1789 {
1790 /* ep0 maxpacket will be updated here after HCD issue get_descriptor. */
1791 /* the purpose like usb_ep0_reinit */
1792 if (!(pQh->hw_ep_state1 & (0x3 << 12)))
1793 {
1794 int maxp, hw_maxp;
1795
1796 maxp = usb_maxpacket (pUrb->dev, pUrb->u32Pipe, !(usb_pipein (pUrb->u32Pipe)));
1797 hw_maxp = max_packet(pQh->hw_ep_state1 >> 16);
1798 if (maxp != hw_maxp)
1799 ms_debug_debug("[USB] hw_map(%x) <-> maxp(%x)\n", hw_maxp, maxp);
1800
1801 if (maxp > hw_maxp)
1802 {
1803 U32 u32Info = pQh->hw_ep_state1;
1804
1805 u32Info &= ~(0x07ff << 16);
1806 u32Info |= maxp << 16;
1807 pQh->hw_ep_state1 = u32Info;
1808 }
1809 }
1810
1811 /* usb_reset_device() back the device address to 0 */
1812 if (usb_pipedevice (pUrb->u32Pipe) == 0)
1813 pQh->hw_ep_state1 &= ~QH_ADDR_MASK;
1814 /* modify device address, the purpose like usb_ep0_reinit */
1815 else if ((pQh->hw_ep_state1 & QH_ADDR_MASK) == 0) {
1816 ms_debug_debug("[USB] qh device addr 0, append urb device addr %d\n", usb_pipedevice (pUrb->u32Pipe));
1817 pQh->hw_ep_state1 |= usb_pipedevice (pUrb->u32Pipe);
1818 }
1819 }
1820
1821 /* Obsolete code */
1822 //if ((!usb_gettoggle (pUrb->dev,
1823 // (iEpNum & 0x0f), !(iEpNum & 0x10)))
1824 // && !usb_pipecontrol (pUrb->u32Pipe))
1825 //{
1826 // /* "never happens": drivers do stall cleanup right */
1827 // if (pQh->qh_status != QH_STS_IDLE
1828 // && !ms_is_empty_list (&pQh->qtd_list)
1829 // && pQh->qh_status != QH_STS_COMPLETING)
1830 // ms_debug_msg ("clear toggle dev%d ep%d%s: not idle\n", (int)usb_pipedevice (pUrb->u32Pipe), iEpNum & 0x0f, usb_pipein (pUrb->u32Pipe) ? "in" : "out");
1831 // ms_clear_toggle (pUrb->dev, iEpNum & 0x0f, !(iEpNum & 0x10), pQh);
1832 // diag_printf("[USB] clear toggle called!!!\n");
1833 //}
1834
1835 if (pQtd != 0)
1836 {
1837 struct ehci_qtd *dummy;
1838 dma_addr_t tDmaAddr;
1839 U32 pToken;
1840
1841 pToken = pQtd->hw_token;
1842 pQtd->hw_token = HALT_BIT;
1843 wmb ();
1844 dummy = pQh->pDummyQtd;
1845 /* Copy qtd's data to dummy except dummy->qtd_dma */
1846 tDmaAddr = dummy->qtd_dma_addr;
1847 *dummy = *pQtd;
1848 dummy->qtd_dma_addr = tDmaAddr;
1849
1850 ms_list_remove (&pQtd->qtd_list);
1851 ms_insert_list_after (&dummy->qtd_list, qtd_list);
1852 ms_list_join (qtd_list, pQh->qtd_list.prev);
1853
1854 ms_ehci_qtd_init (pQtd, pQtd->qtd_dma_addr);
1855 pQh->pDummyQtd = pQtd;
1856
1857 /* hc must see the new dummy at list end */
1858 tDmaAddr = pQtd->qtd_dma_addr;
1859 pQtd = entry_to_container (pQh->qtd_list.prev, struct ehci_qtd, qtd_list);
1860 //list_entry (qh->qtd_list.prev, struct ehci_qtd, qtd_list,struct list_head, qtd);
1861 //the last qtd of qh before spliceing qtd_list
1862 pQtd->hw_next_qtd = (U32)(tDmaAddr);
1863
1864 /* let the hc process these next qtds */
1865 wmb ();
1866 dummy->hw_token = pToken;
1867
1868 pUrb->hcpriv = ms_qh_get (pQh);
1869 }
1870 }
1871 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1872 return pQh;
1873 }
1874
1875 /*-------------------------------------------------------------------------*/
1876 static int
ms_submit_async(struct ehci_hcd * pEhci,struct urb * pUrb,struct list_head * qtd_list)1877 ms_submit_async (
1878 struct ehci_hcd *pEhci,
1879 struct urb *pUrb,
1880 struct list_head *qtd_list
1881 )
1882 {
1883 //struct ehci_qtd *pQtd;
1884 struct s_hcd_dev *pDev;
1885 int iEpNum;
1886 U32 u32Flags;
1887 struct ehci_qh *pQh = 0;
1888
1889 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1890 /* only urb trace code needs qtd information */
1891 //pQtd = entry_to_container (qtd_list->next, struct ehci_qtd, qtd_list);
1892 //list_entry (qtd_list->next, struct ehci_qtd, qtd_list, struct list_head, qtd);
1893 pDev = (struct s_hcd_dev *)pUrb->dev->hcpriv;
1894 iEpNum = usb_pipeendpoint (pUrb->u32Pipe);
1895 if (usb_pipein (pUrb->u32Pipe) && !usb_pipecontrol (pUrb->u32Pipe))
1896 iEpNum |= 0x10;
1897
1898 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
1899 pQh = ms_qh_append_tds (pEhci, pUrb, qtd_list, iEpNum, &pDev->ep [iEpNum]);
1900 /* EP Control/bulk �g�L TT ���ݭn scheduling */
1901 if (pQh != 0)
1902 {
1903 if (pQh->qh_status == QH_STS_IDLE)
1904 ms_qh_link_async (pEhci, ms_qh_get (pQh));
1905 }
1906
1907 Chip_Flush_Memory();
1908
1909 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
1910 if (pQh == 0)
1911 {
1912 ms_qtd_register_free (pEhci, qtd_list);
1913 return -ENOMEM;
1914 }
1915 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1916 return 0;
1917 }
1918
1919 /*-------------------------------------------------------------------------*/
1920
1921 static void ms_start_unlink_async (struct ehci_hcd *pEhci, struct ehci_qh *pQh);
ms_end_unlink_async(struct ehci_hcd * pEhci,struct stPtRegs * pRegs)1922 static void ms_end_unlink_async (struct ehci_hcd *pEhci, struct stPtRegs *pRegs)
1923 {
1924 struct ehci_qh *pQh = pEhci->stReclaim;
1925 struct ehci_qh *pNext;
1926
1927 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1928 if(pQh == NULL)
1929 {
1930 ms_debug_err("--[%s] reclaim NULL\n", __FUNCTION__);
1931 return;
1932 }
1933
1934 //ms_timer_action_done (pEhci, TIMER_IAA_WATCHDOG);
1935 ms_iaa_watchdog_done(pEhci);
1936
1937 Chip_Read_Memory(); // 20121218, 20121225
1938
1939 pQh->qh_status = QH_STS_IDLE;
1940 pQh->qh_next.qh = 0;
1941 ms_qh_put (pEhci, pQh); // pQh is directed to reclaim
1942
1943 pNext = pQh->pReclaimQh;
1944 pEhci->stReclaim = pNext;
1945 //pEhci->iReclaimReady = 0;
1946 pQh->pReclaimQh = 0;
1947
1948 ms_qh_completions (pEhci, pQh, pRegs);
1949
1950 if (!ms_is_empty_list (&pQh->qtd_list)
1951 && HCD_IS_RUNNING (pEhci->hcd.state))
1952 ms_qh_link_async (pEhci, pQh);
1953 else
1954 {
1955 ms_qh_put (pEhci, pQh); // pQh is directed from async list
1956
1957 if (HCD_IS_RUNNING (pEhci->hcd.state)
1958 && pEhci->stAsync->qh_next.qh == 0)
1959 ms_timer_action (pEhci, TIMER_ASYNC_OFF);
1960 }
1961
1962 if (pNext)
1963 {
1964 pEhci->stReclaim = 0;
1965 ms_start_unlink_async (pEhci, pNext);
1966 }
1967 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1968 }
1969
ms_start_unlink_async(struct ehci_hcd * pEhci,struct ehci_qh * pQh)1970 static void ms_start_unlink_async (struct ehci_hcd *pEhci, struct ehci_qh *pQh)
1971 {
1972 int iUsbCmd = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
1973 struct ehci_qh *pPrev;
1974
1975 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
1976 #ifdef DEBUG
1977 if (pEhci->stReclaim
1978 || (pQh->qh_status != QH_STS_LINKED
1979 && pQh->qh_status != QH_STS_UNLINK_WAIT)
1980 // If support SMP, needs to check locked
1981 // || !spin_is_locked (&pEhci->tHcdLock)
1982 )
1983 USB_ASSERT(0, "BUG()!\n");
1984 #endif
1985
1986 if (pQh == pEhci->stAsync)
1987 {
1988 if (pEhci->hcd.state != HCD_STATE_HALT && !pEhci->stReclaim)
1989 {
1990 /* stop async schedule */
1991 hcd_reg_writel (iUsbCmd & ~USBCMD_ASE, (U32)&pEhci->op_regs->usbcmd);
1992 wmb ();
1993 // handshake later, if we need to
1994 ms_timer_action_done (pEhci, TIMER_ASYNC_OFF);
1995 }
1996 return;
1997 }
1998
1999 pQh->qh_status = QH_STS_UNLINK;
2000 pEhci->stReclaim = pQh = ms_qh_get (pQh);
2001
2002 pPrev = pEhci->stAsync;
2003 while (pPrev->qh_next.qh != pQh)
2004 pPrev = pPrev->qh_next.qh;
2005
2006 #ifdef _USB_ENABLE_BDMA_PATCH // BDMA SW patch
2007 if (get_64bit_OBF_cipher()) {
2008 m_BDMA_write(pQh->qh_dma_addr, pPrev->qh_dma_addr);
2009 USB_ASSERT(pPrev->hw_next_qh == pQh->hw_next_qh,
2010 "[BDMA] hw_next not matched!\n");
2011 }
2012 else
2013 pPrev->hw_next_qh = pQh->hw_next_qh;
2014 #else
2015 pPrev->hw_next_qh = pQh->hw_next_qh;
2016 #endif
2017 pPrev->qh_next = pQh->qh_next;
2018 wmb ();
2019
2020 Chip_Flush_Memory(); // (20140827 to push the pipe)
2021
2022 //if (pEhci->hcd.state == HCD_STATE_HALT)
2023 if (!HCD_IS_RUNNING(pEhci->hcd.state))
2024 {
2025 ms_end_unlink_async (pEhci, NULL);
2026 ms_debug_err("HCD not running, end unlink directly\n");
2027 return;
2028 }
2029 //inform HC thar something has been removed from asyn. schedule
2030 //pEhci->iReclaimReady = 0;
2031 #if 1 // For bug 125MHz copy error (HALT)
2032 //if (!pEhci->uDontSendIAA) // 20130110 no need flag control
2033 {
2034 iUsbCmd |= USBCMD_IAAD;
2035 hcd_reg_writel (iUsbCmd, (U32)&pEhci->op_regs->usbcmd);
2036 }
2037 #endif
2038 //ms_timer_action (pEhci, TIMER_IAA_WATCHDOG);
2039 ms_iaa_watchdog_begin(pEhci);
2040 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2041 }
2042
ms_unlink_async(struct ehci_hcd * pEhci,struct ehci_qh * pQh)2043 static void ms_unlink_async (struct ehci_hcd *pEhci, struct ehci_qh *pQh)
2044 {
2045 if (!HCD_IS_RUNNING (pEhci->hcd.state) && pEhci->stReclaim)
2046 ms_end_unlink_async (pEhci, NULL);
2047
2048 if (pQh->qh_status != QH_STS_LINKED)
2049 ;
2050 else if (pEhci->stReclaim)
2051 {
2052 struct ehci_qh *pLast;
2053
2054 for (pLast = pEhci->stReclaim;
2055 pLast->pReclaimQh;
2056 pLast = pLast->pReclaimQh)
2057 continue;
2058 pQh->qh_status = QH_STS_UNLINK_WAIT;
2059 pLast->pReclaimQh = pQh;
2060 /* bypass IAA if the hc can't care */
2061 diag_printf("[EHCI] set QH_STS_UNLINK_WAIT\n");
2062 }
2063 else
2064 ms_start_unlink_async (pEhci, pQh);
2065 }
2066
2067 /*-------------------------------------------------------------------------*/
2068 /*
2069 * @brief free qtd list but kept qh for plug test shall cause some problems
2070 *
2071 * @param struct ehci_hcd *pEhci
2072 * @param struct stPtRegs *pRegs
2073 *
2074 * @return none
2075 */
2076
2077 static void
ms_scan_async(struct ehci_hcd * pEhci,struct stPtRegs * pRegs)2078 ms_scan_async (struct ehci_hcd *pEhci, struct stPtRegs *pRegs)
2079 {
2080 struct ehci_qh *pQh;
2081 enum ehci_timer_event eAction = TIMER_IO_WATCHDOG;
2082
2083 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2084 if (!++(pEhci->u32Stamp))
2085 pEhci->u32Stamp++;
2086 ms_timer_action_done (pEhci, TIMER_ASYNC_SHRINK);
2087 rescan:
2088 pQh = pEhci->stAsync->qh_next.qh;
2089 if (pQh != 0)
2090 {
2091 do
2092 {
2093 /* free qtd for this qh */
2094 if (!ms_is_empty_list (&pQh->qtd_list)
2095 && pQh->u32Stamp != pEhci->u32Stamp)
2096 {
2097 int temp;
2098
2099 pQh = ms_qh_get (pQh);
2100 pQh->u32Stamp = pEhci->u32Stamp;
2101 temp = ms_qh_completions (pEhci, pQh, pRegs);
2102 ms_qh_put (pEhci, pQh);
2103 if (temp != 0)
2104 {
2105 goto rescan;
2106 }
2107 }
2108
2109 //FIXME: #if 1 is correct procedure but it will cause some problems when do plug testing
2110 //Watchdog timer will be unlink for unknow reason ==> Therefore, qHD can not be
2111 //unlinked from async list. (qh->state == USB_STATE_LINKED but HCD_STATE_HALT)
2112 //So when disconnect attached device ep1in (Bulk in) cannot be released.
2113 #if 1
2114 #if 0
2115 if (ms_is_empty_list (&pQh->qtd_list))
2116 {
2117 if (pQh->u32Stamp == pEhci->u32Stamp)
2118 eAction = TIMER_ASYNC_SHRINK;
2119 else if (!pEhci->stReclaim
2120 && pQh->qh_status == QH_STS_LINKED)
2121 ms_start_unlink_async (pEhci, pQh);
2122 }
2123 #else
2124 #define MS_QH_SHRINK_FRAMES 5
2125 if (ms_is_empty_list (&pQh->qtd_list) && (pQh->qh_status == QH_STS_LINKED))
2126 {
2127 if (!pEhci->stReclaim
2128 && ((pEhci->u32Stamp - pQh->u32Stamp) & 0x1fff) >= MS_QH_SHRINK_FRAMES * 8)
2129 {
2130 //diag_printf("[USB][%d] %s start_unlink sts1:%x\n",
2131 // jiffies, __func__, pQh->hw_ep_state1);
2132 ms_start_unlink_async (pEhci, pQh);
2133 }
2134 else
2135 {
2136 //diag_printf("[USB] TIMER_ASYNC_SHRINK qh_sts:0x%x\n", pQh->hw_ep_state1);
2137 eAction = TIMER_ASYNC_SHRINK;
2138 }
2139 }
2140 #endif
2141 #else
2142 if (ms_is_empty_list (&pQh->qtd_list))
2143 {
2144 if (!pEhci->stReclaim && pQh->qh_status == QH_STS_LINKED)
2145 ms_start_unlink_async (pEhci, pQh);
2146 }
2147 #endif
2148 pQh = pQh->qh_next.qh;
2149 } while (pQh);
2150 }
2151 if (eAction == TIMER_ASYNC_SHRINK)
2152 ms_timer_action (pEhci, TIMER_ASYNC_SHRINK);
2153 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2154 }
2155
2156 #ifdef EHCI_TD_DEBUG
dbg_timeout_async(struct usb_hcd * hcd)2157 void dbg_timeout_async(struct usb_hcd *hcd)
2158 {
2159 #if defined(CPU_TYPE_MIPS)
2160 #define PA2VA(a) (0xA0000000+(a))
2161 #elif defined(CPU_TYPE_ARM)
2162 #define PA2VA(a) (0x20000000+(a))
2163 #endif
2164 #define HW_NEXT(a) ((a) & 0xffffffe0)
2165 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
2166 struct ehci_qh *qh;
2167 unsigned int *hw_p;
2168 unsigned int hw_next;
2169
2170 /* print out async register */
2171 hw_next = hcd_reg_readl ((U32)&ehci->op_regs->asynclistaddr);
2172 diag_printf("[EHCI] async register %x\n", hw_next);
2173 /* print out hardware asynchronous qh link */
2174 hw_next = (U32)ehci->stAsync;
2175 diag_printf("--> %8x", hw_next);
2176 diag_printf("--> %8x", hw_next+0x80);
2177 diag_printf("--> %8x", hw_next+0x100);
2178 diag_printf("--> %8x\n", hw_next+0x180);
2179
2180 hw_p = (unsigned int *)hw_next;
2181 diag_printf("--> %8x", *hw_p);
2182 hw_next += 0x80;
2183 hw_p = (unsigned int *)hw_next;
2184 diag_printf("--> %8x", *hw_p);
2185 hw_next += 0x80;
2186 hw_p = (unsigned int *)hw_next;
2187 diag_printf("--> %8x", *hw_p);
2188 hw_next += 0x80;
2189 hw_p = (unsigned int *)hw_next;
2190 diag_printf("--> %8x", *hw_p);
2191 diag_printf("\n");
2192
2193 /* print out asynchronous qh list */
2194 qh = ehci->stAsync->qh_next.qh;
2195 if (qh == 0) {
2196 diag_printf("[EHCI] no QH list\n");
2197 return;
2198 }
2199 do {
2200 unsigned int c_qtd;
2201 int cqtd_n_list = 1;
2202
2203 diag_printf("qh status %d, dummy_qtd %x\n",
2204 qh->qh_status, (unsigned int)qh->pDummyQtd);
2205 Dump_TD((unsigned int)qh, 1);
2206 c_qtd = (unsigned int)PA2VA(qh->hw_current_qtd);
2207 if (!ms_is_empty_list (&qh->qtd_list)) {
2208 struct list_head *entry, *tmp;
2209
2210 list_for_loop_ex (entry, tmp, &qh->qtd_list) {
2211 struct ehci_qtd *qtd;
2212
2213 qtd = entry_to_container (entry, struct ehci_qtd, qtd_list);
2214 Dump_TD((unsigned int)qtd, 0);
2215 if (c_qtd == (unsigned int)qtd)
2216 cqtd_n_list = 0;
2217 }
2218 }
2219 if (cqtd_n_list) {
2220 diag_printf(" CURRENT QTD\n");
2221 Dump_TD((unsigned int)PA2VA(qh->hw_current_qtd), 0);
2222 }
2223 qh = qh->qh_next.qh;
2224 } while (qh);
2225 }
2226 #endif
2227
2228 #include "drvEHCI_SCHD.cxx"
2229
2230 /*-------------------------------------------------------------------------*/
2231
2232 static void ms_ehci_work(struct ehci_hcd *ehci, struct stPtRegs *regs);
ms_ehci_iaa_watchdog(U32 u32Param)2233 static void ms_ehci_iaa_watchdog(U32 u32Param)
2234 {
2235 struct ehci_hcd *pEhci = (struct ehci_hcd *) u32Param;
2236 unsigned long u32Flags;
2237
2238 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2239 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
2240
2241 /* see Linux 2.6.28.9 ehci_iaa_watchdog description
2242 */
2243 if (pEhci->stReclaim
2244 && !ms_timer_pending(&pEhci->stiaa_Watchdog)
2245 && HCD_IS_RUNNING(pEhci->hcd.state)) {
2246 U32 u32Cmd, u32Status;
2247
2248 u32Cmd = hcd_reg_readl((U32)&pEhci->op_regs->usbcmd);
2249 if (u32Cmd & USBCMD_IAAD)
2250 hcd_reg_writel(u32Cmd & ~USBCMD_IAAD,
2251 (U32)&pEhci->op_regs->usbcmd);
2252
2253 u32Status = hcd_reg_readl((U32)&pEhci->op_regs->usbsts);
2254 if ((u32Status & USBSTS_IAA) || !(u32Cmd & USBCMD_IAAD)) {
2255 INCREASE (pEhci->stats.u32LostIAA);
2256 ms_debug_err("IAA watchdog (lost IAA): status %x cmd %x\n",
2257 u32Status, u32Cmd);
2258 hcd_reg_writel(USBSTS_IAA, (U32)&pEhci->op_regs->usbsts);
2259 }
2260
2261 ms_debug_func("IAA watchdog: status %x cmd %x\n",
2262 u32Status, u32Cmd);
2263 ms_end_unlink_async(pEhci, NULL);
2264 }
2265
2266 osapi_spin_unlock_irqrestore(&pEhci->tHcdLock, u32Flags);
2267 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2268 }
2269
ms_ehci_watchdog(U32 u32Param)2270 static void ms_ehci_watchdog (U32 u32Param)
2271 {
2272 struct ehci_hcd *pEhci = (struct ehci_hcd *) u32Param;
2273 U32 u32Flags;
2274
2275 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2276 ms_debug_func("[%s] action: 0x%08X\n", __FUNCTION__, (U32)pEhci->u32Actions);
2277 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
2278
2279 #if 0 // old reclaim flow
2280 /* avoid vt8235 lost IAA irqs */
2281 if (pEhci->stReclaim)
2282 {
2283 U32 status = hcd_reg_readl ((U32)&pEhci->op_regs->usbsts);
2284
2285 if (status & USBSTS_IAA)
2286 {
2287 INCREASE(pEhci->stats.u32LostIAA);
2288 hcd_reg_writel (USBSTS_IAA, (U32)&pEhci->op_regs->usbsts);
2289 pEhci->iReclaimReady = 1;
2290 }
2291 else if ( (hcd_reg_readl((U32)&pEhci->op_regs->usbcmd)&USBCMD_IAAD) && !(status & USBSTS_IAA))
2292 {
2293 ms_debug_warn ("Something wrong ==>lost IAA\n");//HW ISSUE?
2294 pEhci->iReclaimReady = 1;
2295 }
2296 }
2297 #endif
2298
2299 /* stop async processing after it's idled a bit */
2300 //Periodic schedule issue was fixed, so reopen it
2301 if (ms_test_bit (TIMER_ASYNC_OFF, &pEhci->u32Actions))
2302 ms_start_unlink_async (pEhci, pEhci->stAsync);
2303
2304 /* pEhci could run by timer, without IRQs ... */
2305 //if (ms_test_bit (TIMER_IO_WATCHDOG, &pEhci->u32Actions))
2306 ms_ehci_work(pEhci, NULL);
2307
2308 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
2309 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2310
2311 }
2312
ms_ehci_init(struct usb_hcd * pHcd)2313 int ms_ehci_init (struct usb_hcd *pHcd)
2314 {
2315 struct ehci_hcd *ehci = hcd_to_ehci (pHcd);
2316
2317 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2318 osapi_spin_lock_init (&ehci->tHcdLock);
2319
2320 ehci->u32MoreCSC = false;
2321 ehci->ehci_port_not_change_cnt = 0;
2322
2323 ehci->cap_regs = (struct ehci_cap_regs *) pHcd->uhc_regs;
2324 ehci->op_regs = (struct ehci_op_regs *) ( (U32)pHcd->uhc_regs +
2325 (U32)hcd_reg_readb ((U32)&ehci->cap_regs->caplength));
2326
2327 ehci->hcs_params = hcd_reg_readl ((U32)&ehci->cap_regs->hcsparams);
2328 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2329 return ms_ehci_halt (ehci);
2330 }
2331
2332 /*
2333 * @brief start ehci controller
2334 *
2335 * @param struct usb_hcd *hcd
2336 *
2337 * @return error code
2338 */
2339
2340 extern void ms_hcd_poll_rh_status(struct usb_hcd *pHcd);
2341 extern MS_U8 MDrv_SYS_GetChipRev(void);
ms_ehci_begin(struct usb_hcd * hcd)2342 int ms_ehci_begin (struct usb_hcd *hcd)
2343 {
2344 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
2345 U32 u32Temp;
2346 struct usb_device *pUdev;
2347 struct usb_bus *pBus;
2348 int iRetval;
2349 U32 u32HccParams;
2350
2351 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2352
2353 ehci->u32PeriodicSize = DEFAULT_I_TDPS;
2354 if ((iRetval = ms_ehci_mem_init (ehci, SLAB_KERNEL)) < 0)
2355 return iRetval;
2356
2357 u32HccParams = hcd_reg_readl ((U32)&ehci->cap_regs->hcc_params);
2358 if (HCC_ISO_CACHE (u32HccParams)) // full frame cache
2359 ehci->u32IThresh = 8;
2360 else // N microframes cached
2361 ehci->u32IThresh = 2 + HCC_ISO_THRES (u32HccParams);
2362
2363 ehci->stReclaim = 0;
2364 ehci->iNextUframe = -1;
2365
2366 if ((iRetval = ms_ehci_reset (ehci)) != 0)
2367 {
2368 ms_ehci_mem_cleanup (ehci);
2369 return iRetval;
2370 }
2371
2372 hcd_reg_writel (INTR_MASK, (U32)&ehci->op_regs->usbintr);
2373 u32Temp=hcd_reg_readl((U32)&ehci->op_regs->bus_control);
2374 // temp|=INT_POLAR+HALF_SPEED;
2375 u32Temp|=INT_POLAR;
2376 u32Temp&=~VBUS_OFF;
2377 hcd_reg_writel(u32Temp,(U32)&ehci->op_regs->bus_control); //set intr high active
2378 hcd_reg_writel (ehci->tPeriodicDma, (U32)&ehci->op_regs->periodiclistbase);
2379
2380 ehci->stAsync->qh_next.qh = 0;
2381 ehci->stAsync->hw_next_qh = QH_NEXT (ehci->stAsync->qh_dma_addr);
2382 ehci->stAsync->hw_ep_state1 = QH_H_BIT;
2383 ehci->stAsync->hw_token = QTD_STS_HALT;
2384 ehci->stAsync->hw_next_qtd = EHCI_LIST_END;
2385 ehci->stAsync->qh_status = QH_STS_LINKED;
2386 ehci->stAsync->hw_alt_next_qtd = (U32)(ehci->stAsync->pDummyQtd->qtd_dma_addr);
2387 ms_debug_msg("qh dma addr: %p\n", (void *)ehci->stAsync->qh_dma_addr);
2388 hcd_reg_writel ((U32)ehci->stAsync->qh_dma_addr, (U32)&ehci->op_regs->asynclistaddr);
2389
2390 if (HCC_64BIT_ADDR_CAP (u32HccParams))
2391 {
2392 hcd_reg_writel (0, (U32)&ehci->op_regs->ctrldssegment);
2393 }
2394
2395 u32Temp = hcd_reg_readl ((U32)&ehci->op_regs->usbcmd) & 0x0fff;
2396 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2397 log2_irq_thresh = 0;
2398 u32Temp |= 1 << (16 + log2_irq_thresh);
2399
2400 #if defined(CHIP_K2)
2401 // K2 U02 & Newer IC
2402 if (MDrv_SYS_GetChipRev() >= 0x01)
2403 {
2404 park_eco = 3;
2405 }
2406 #endif
2407
2408 if (park_eco && HCC_ASPC(u32HccParams))
2409 {
2410 ms_debug_msg("[EHCI] Enable Park Mode: %d\n", (int)park_eco);
2411 u32Temp |= USBCMD_PARK;
2412 u32Temp |= park_eco << 8;
2413 }
2414
2415 if (HCC_PFLF (u32HccParams))
2416 {
2417 u32Temp &= ~(3 << 2);
2418 u32Temp |= (EHCI_PERIODIC_FLS << 2);
2419 switch (EHCI_PERIODIC_FLS)
2420 {
2421 case 0: ehci->u32PeriodicSize = 1024; break;
2422 case 1: ehci->u32PeriodicSize = 512; break;
2423 case 2: ehci->u32PeriodicSize = 256; break;
2424 default: USB_ASSERT(0, "Not alllowed periodic frame list size\n");
2425 }
2426 }
2427 u32Temp &= ~(USBCMD_IAAD | USBCMD_ASE | USBCMD_PSE),
2428
2429 // Only make HC run when device connects to bus
2430 u32Temp |= USBCMD_RUN;
2431 hcd_reg_writel (u32Temp, (U32)&ehci->op_regs->usbcmd);
2432
2433 /* initialize watchdog timer function */
2434
2435 ms_init_timer (&ehci->stWatchdog);
2436 ehci->stWatchdog.function = ms_ehci_watchdog;
2437 ehci->stWatchdog.data = (U32) ehci;
2438
2439 ms_init_timer (&ehci->stiaa_Watchdog);
2440 ehci->stiaa_Watchdog.function = ms_ehci_iaa_watchdog;
2441 ehci->stiaa_Watchdog.data = (U32) ehci;
2442
2443 pBus = (struct usb_bus *)(&hcd->self);
2444 pBus->root_hub = pUdev = ms_usb_alloc_dev (NULL, pBus);
2445 if (!pUdev)
2446 {
2447 done2:
2448 ms_ehci_mem_cleanup (ehci);
2449 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2450 return -ENOMEM;
2451 }
2452
2453 ehci->hcd.state = HCD_STATE_RUNNING;
2454 u32Temp = hcd_reg_readl ((U32)&ehci->op_regs->usbcmd); /* unblock posted write */
2455
2456 u32Temp = hcd_reg_readw ((U32)&ehci->cap_regs->hciversion);
2457 ms_debug_msg ("EHCI %x.%02x, driver %s\n",
2458 (unsigned int)u32Temp >> 8, (unsigned int)u32Temp & 0xff, DRIVER_VERSION);
2459
2460 pUdev->eSpeed = USB_HIGH_SPEED;
2461 if (ms_register_root_hub(hcd) != 0)
2462 {
2463 if (hcd->state == HCD_STATE_RUNNING)
2464 ms_ehci_quiesce(ehci);
2465 ms_ehci_reset (ehci);
2466 pBus->root_hub = 0;
2467 ms_usb_put_dev (pUdev);
2468 iRetval = -ENODEV;
2469 goto done2;
2470 }
2471
2472 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2473 return 0;
2474 }
2475
2476 /*
2477 * @brief stop ehci controller
2478 *
2479 * @param struct usb_hcd *hcd
2480 *
2481 * @return none
2482 */
2483
ms_ehci_end(struct usb_hcd * hcd)2484 void ms_ehci_end (struct usb_hcd *hcd)
2485 {
2486 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
2487
2488 ms_debug_func("[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2489
2490 ms_del_timer_sync (&ehci->stWatchdog);
2491 ms_del_timer_sync (&ehci->stiaa_Watchdog);
2492
2493 osapi_spin_lock_irq (&ehci->tHcdLock);
2494 if (hcd->state == HCD_STATE_RUNNING)
2495 ms_ehci_quiesce(ehci);
2496 // need to turn off all ports?
2497 ms_ehci_reset (ehci);
2498 //osapi_spin_unlock_irq (&ehci->tHcdLock);
2499
2500 //osapi_spin_lock_irq (&ehci->tHcdLock);
2501 if (ehci->stAsync) // patch from Linux 3.1.10
2502 ms_ehci_work(ehci, NULL);
2503 osapi_spin_unlock_irq (&ehci->tHcdLock);
2504 ms_ehci_mem_cleanup (ehci);
2505
2506 #ifdef EHCI_STATS
2507 ms_debug_msg ("[EHCI DEBUG] irq normal %ld err %ld reclaim %ld (lost %ld) ",
2508 ehci->stats.u32Normal, ehci->stats.u32Error, ehci->stats.u32Reclaim,
2509 ehci->stats.u32LostIAA);
2510 ms_debug_msg ("complete %ld unlink %ld\n",
2511 ehci->stats.u32Complete, ehci->stats.u32Unlink);
2512 #endif
2513
2514 }
2515
ms_ehci_get_frame_idx(struct usb_hcd * hcd)2516 int ms_ehci_get_frame_idx (struct usb_hcd *hcd)
2517 {
2518 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
2519 ms_debug_func("[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2520 return (hcd_reg_readl ((U32)&ehci->op_regs->frindex) >> 3) % ehci->u32PeriodicSize;
2521 }
2522
2523 /*-------------------------------------------------------------------------*/
2524
ms_ehci_suspend(struct usb_hcd * hcd,U32 state)2525 int ms_ehci_suspend (struct usb_hcd *hcd, U32 state)
2526 {
2527 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
2528 int iPorts;
2529 int i;
2530
2531 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2532
2533 iPorts = HCS_N_PORTS (ehci->hcs_params);
2534
2535 if (hcd->state == HCD_STATE_RUNNING)
2536 ms_ehci_quiesce(ehci);
2537 ms_debug_msg("ms_ehci_suspend\n");
2538 hcd_reg_writel(hcd_reg_readl ((U32)&ehci->op_regs->usbcmd) & ~USBCMD_RUN, (U32)&ehci->op_regs->usbcmd);
2539 while((hcd_reg_readl((U32)&ehci->op_regs->usbsts)&USBSTS_HALT) == 0);
2540
2541 /* suspend each port, then stop the hc */
2542 for (i = 0; i < iPorts; i++) {
2543 int temp = hcd_reg_readl ((U32)&ehci->op_regs->portsc [i]);
2544 if ((temp & PORTSC_PE) == 0
2545 /* || (temp & PORTSC_OWNER) != 0 */)
2546 continue;
2547 ms_debug_msg ("suspend port %d", i);
2548 temp |= PORTSC_SUSPEND;
2549 hcd_reg_writel (temp, (U32)&ehci->op_regs->portsc [i]);
2550 }
2551 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2552 return 0;
2553 }
2554
ms_ehci_resume(struct usb_hcd * hcd)2555 int ms_ehci_resume (struct usb_hcd *hcd)
2556 {
2557 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
2558 int iPorts;
2559 int i;
2560 //U32 U32Tmp;
2561
2562 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2563
2564 iPorts = HCS_N_PORTS (ehci->hcs_params);
2565 hcd->state = HCD_STATE_RUNNING;
2566 for (i = 0; i < iPorts; i++)
2567 {
2568 int temp = hcd_reg_readl ((U32)&ehci->op_regs->portsc [i]);
2569 if ((temp & PORTSC_PE) == 0
2570 || (temp & PORTSC_SUSPEND) != 0)
2571 continue;
2572 ms_debug_msg ("resume port %d", i);
2573 temp |= PORTSC_SUSPEND;
2574 hcd_reg_writel (temp, (U32)&ehci->op_regs->portsc [i]);
2575 /*U32Tmp = */hcd_reg_readl ((U32)&ehci->op_regs->usbcmd); /* unblock posted writes */
2576 wait_ms (20);
2577 temp &= ~PORTSC_SUSPEND;
2578 hcd_reg_writel (temp, (U32)&ehci->op_regs->portsc [i]);
2579 }
2580 /*U32Tmp = */hcd_reg_readl ((U32)&ehci->op_regs->usbcmd); /* unblock posted writes */
2581 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2582 return 0;
2583 }
2584
2585 /*-------------------------------------------------------------------------*/
2586 /*
2587 * @brief scan asynchronous qh chain and periodic frame list
2588 *
2589 * @param struct ehci_hcd *pEhci
2590 * @param struct stPtRegs *regs
2591 *
2592 * @return none
2593 */
ms_ehci_work(struct ehci_hcd * pEhci,struct stPtRegs * regs)2594 static void ms_ehci_work(struct ehci_hcd *pEhci, struct stPtRegs *regs)
2595 {
2596 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2597 ms_timer_action_done (pEhci, TIMER_IO_WATCHDOG);
2598 Chip_Read_Memory(); // 20121218, 20121225
2599
2600 #if 0 // old reclaim flow
2601 // This sequence will release Host task befor USB DSR complete.
2602 if (pEhci->iReclaimReady)
2603 {
2604 ms_end_unlink_async (pEhci, regs);
2605 ms_scan_async (pEhci, regs);
2606 //ms_end_unlink_async (pEhci, regs); // move 2 lines ahead for IAA issue. 20140408
2607 }
2608 #endif
2609
2610 if (pEhci->iScanning)
2611 return;
2612 pEhci->iScanning = 1;
2613 ms_scan_async (pEhci, regs);
2614 if (pEhci->iNextUframe != -1)
2615 ms_scan_periodic (pEhci, regs);
2616 pEhci->iScanning = 0;
2617
2618 if (HCD_IS_RUNNING(pEhci->hcd.state) &&
2619 ((pEhci->stAsync->qh_next.ptr != 0) || (pEhci->u32PeriodicSched != 0)))
2620 ms_timer_action (pEhci, TIMER_IO_WATCHDOG);
2621 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2622 }
2623
2624 /*-------------------------------------------------------------------------*/
2625 /*
2626 * @brief process ehci controller interrupt events
2627 *
2628 * @param struct usb_hcd *pHcd
2629 * @param struct stPtRegs *pRegs
2630 *
2631 * @return none
2632 */
ms_ehci_irq(struct usb_hcd * pHcd,struct stPtRegs * pRegs)2633 void ms_ehci_irq (struct usb_hcd *pHcd, struct stPtRegs *pRegs)
2634 {
2635 struct ehci_hcd *pEhci= hcd_to_ehci (pHcd);
2636 U32 u32Status, int_status;
2637 int bh;
2638 U32 u32Cmd;
2639
2640 osapi_spin_lock (&pEhci->tHcdLock);
2641
2642 int_status = u32Status = hcd_reg_readl ((U32)&pEhci->op_regs->usbsts);
2643
2644 if (u32Status == ~(U32) 0)
2645 {
2646 ms_debug_msg ("reg usbsts is 0xffff, device removed\n");
2647 goto dead;
2648 }
2649
2650 u32Status &= INTR_MASK;
2651 if (!u32Status) /* No any our interrupt event */
2652 {
2653 diag_printf("ms_ehci_irq status: %x, intr_enable: %x\n", (unsigned int)int_status, hcd_reg_readw((U32)&pEhci->op_regs->usbintr));
2654 goto done;
2655 }
2656
2657 hcd_reg_writel (u32Status, (U32)&pEhci->op_regs->usbsts);
2658 u32Cmd = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
2659 bh = 0;
2660 //pEhci->uDontSendIAA = 0;
2661
2662 /* Notify controller for advance async schedule */
2663 /* USBSTS_INT for normal completion, see 4.15.1.2
2664 USBSTS_ERR for error completion, see 4.15.1.1 */
2665 if ((u32Status & (USBSTS_INT|USBSTS_ERR)) != 0)
2666 {
2667 #if 0 // old reclaim flow
2668 // Enable the interrupt for Async Advance Enable
2669 pEhci->iReclaimReady = 0;
2670 int cmd = hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
2671 cmd |= USBCMD_IAAD;
2672 hcd_reg_writel (cmd, (U32)&pEhci->op_regs->usbcmd);
2673 (void) hcd_reg_readl ((U32)&pEhci->op_regs->usbcmd);
2674 //pEhci->uDontSendIAA = 1;
2675 #endif
2676 if ((u32Status & USBSTS_ERR) == 0)
2677 {
2678 INCREASE(pEhci->stats.u32Normal);
2679 }
2680 else
2681 {
2682 INCREASE(pEhci->stats.u32Error);
2683 //bh = 1; //Note, remove for command stall
2684 }
2685 bh = 1;
2686 }
2687
2688 /* IAA is used for complete the unlinking of qh */
2689 if (u32Status & USBSTS_IAA)
2690 {
2691 #if 0 // old reclaim flow
2692 INCREASE(pEhci->stats.u32Reclaim);
2693 pEhci->iReclaimReady = 1;
2694 //pEhci->uDontSendIAA = 1;
2695 bh = 1;
2696 #endif
2697 if (u32Cmd & USBCMD_IAAD)
2698 {
2699 hcd_reg_writel (u32Cmd & ~USBCMD_IAAD, (U32)&pEhci->op_regs->usbcmd);
2700 ms_debug_err("[EHCI] IAAD not clear?\n");
2701 }
2702 if (pEhci->stReclaim)
2703 {
2704 INCREASE(pEhci->stats.u32Reclaim);
2705 ms_end_unlink_async(pEhci, pRegs);
2706 }
2707 else
2708 ms_debug_err("reclaim but with nothing there!\n");
2709 }
2710
2711 /* See [4.3.1] */
2712 if (u32Status & USBSTS_PCD)
2713 {
2714 // Only support one port
2715 int iPsc/*, masked_psc*/;
2716 int isHalt = 0;
2717
2718 iPsc = hcd_reg_readl((U32)&pEhci->op_regs->portsc [0]);
2719
2720 /* new patch, root hub not run */
2721 if (iPsc == pHcd->saved_ehci_state.iPsc &&
2722 pEhci->u32ResetEnd[0] == pHcd->saved_ehci_state.reset_done &&
2723 u32Cmd == pHcd->saved_ehci_state.usbcmd &&
2724 (u32Cmd & USBCMD_RUN) == 0)
2725 {
2726 ++pEhci->ehci_port_not_change_cnt;
2727 if (pEhci->ehci_port_not_change_cnt > 7)
2728 isHalt = 1;
2729 }
2730 else
2731 pEhci->ehci_port_not_change_cnt = 0;
2732 pHcd->saved_ehci_state.iPsc = iPsc;
2733 pHcd->saved_ehci_state.reset_done = pEhci->u32ResetEnd[0];
2734 pHcd->saved_ehci_state.usbcmd = u32Cmd;
2735 if (isHalt)
2736 {
2737 diag_printf("[EHCI] PCD not clear, reset UHC to get new CURRENT usbsts\n");
2738 if(iPsc & PORTSC_CSC)
2739 {
2740 diag_printf("[EHCI] set more CSC\n");
2741 pEhci->u32MoreCSC = true;
2742 }
2743 ms_ehci_softrst(pEhci);
2744 goto done;
2745 }
2746
2747 // root hub not run
2748 #if 0 // NUSED
2749 if ((u32Cmd & USBCMD_RUN) == 0)
2750 {
2751 //u32Cmd |= USBCMD_RUN;
2752 //hcd_reg_writel(u32Cmd, (U32)&pEhci->op_regs->usbcmd);
2753 //while(hcd_reg_readw ((U32)&pEhci->op_regs->usbsts) & USBSTS_HALT);
2754 isHalt = 1;
2755 //hcd_reg_writel (u32Status, (U32)&pEhci->op_regs->usbsts);
2756 //diag_printf("clear USBSTS_PCD (0x%x) again\n", hcd_reg_readw ((U32)&pEhci->op_regs->usbsts));
2757 }
2758
2759 masked_psc = iPsc & 0xf;
2760 //if ((masked_psc == 0xa /*|| masked_psc == 0xf */) && pEhci->u32ResetEnd[0] == 0)
2761 if ((masked_psc == 0xb))
2762 {
2763 if (isHalt)
2764 {
2765 //ms_ehci_softrst(pEhci);
2766 //diag_printf("PCD not clear, reset UHC to get new CURRENT usbsts = 0x%x\n", hcd_reg_readl ((U32)&pEhci->op_regs->usbsts));
2767 }
2768 }
2769 #endif
2770
2771 /* Clear port enable bit when root device disconnect */
2772 /* Patch for hub+device hot plug frequency then lost disconnect event */
2773 if ((iPsc & PORTSC_CSC) && (iPsc & PORTSC_CONNECT)==0)
2774 {
2775 iPsc &= ~(PORTSC_PEC | PORTSC_PE | PORTSC_CSC);
2776 hcd_reg_writel(iPsc, (U32)&pEhci->op_regs->portsc[0]);
2777 //diag_printf("<irq> clear PORTSC_PE\n");
2778 }
2779 #if 0 // un-patch since not to support suspend
2780 if ((((iPsc & PORTSC_RESUME) ||
2781 !(iPsc & PORTSC_SUSPEND)) &&
2782 (iPsc & PORTSC_PE) &&
2783 pEhci->u32ResetEnd[0] == 0))
2784 {
2785 /* The root hub port active 20 msec resume signal,
2786 * PORTSC_SUSPEND to stop resume signal.
2787 */
2788 pEhci->u32ResetEnd [0] = jiffies + ((20 /* msec */ * HZ) / 1000);
2789 ms_debug_msg ("port 1 remote wakeup\n");
2790 ms_update_timer(&pHcd->roothub_timer, pEhci->u32ResetEnd[0], 0);
2791 }
2792 #endif
2793 }
2794
2795
2796 /* See [4.15.2.4] */
2797
2798 if ((u32Status & USBSTS_FATAL) != 0)
2799 {
2800 ms_debug_err ("[EHCI] fatal error\n");
2801 dead:
2802 //ms_ehci_reset (pEhci);
2803 ms_ehci_softrst(pEhci);
2804 /* uses ms_ehci_end to clean up the rest */
2805 bh = 1;
2806 }
2807
2808 if (bh ||
2809 (pEhci->u32PeriodicSched != 0) //If we has periodic transactions in Schedule, we must scan periodic when USBSTS_INT
2810 )
2811 ms_ehci_work(pEhci, pRegs);
2812 done:
2813 osapi_spin_unlock (&pEhci->tHcdLock);
2814 if (u32Status & USBSTS_PCD)
2815 ms_hcd_poll_rh_status(pHcd);
2816
2817 }
2818
2819 /*-------------------------------------------------------------------------*/
2820 /*
2821 * @brief transforms urb into qh+qtd list and submit to HCD hardware
2822 *
2823 * @param struct usb_hcd *pHcd
2824 * @param struct urb *pUrb
2825 * @param int iMem_flags
2826 *
2827 * @return error code
2828 */
ms_urb_enqueue(struct usb_hcd * pHcd,struct urb * pUrb,int iMem_flags)2829 int ms_urb_enqueue (
2830 struct usb_hcd *pHcd,
2831 struct urb *pUrb,
2832 int iMem_flags
2833 )
2834 {
2835 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
2836 struct list_head qtd_list;
2837 int iRetVal;
2838
2839 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2840 #ifdef ENABLE_DISCONNECT_FAST_RESPONSE
2841 if( (hcd_reg_readl ((U32)&pEhci->op_regs->portsc[0])&PORTSC_CONNECT) == 0 )
2842 {
2843 iRetVal = -ENODEV;
2844 goto urb_enqueue_fail;
2845 }
2846 #endif
2847 ms_list_init (&qtd_list);
2848
2849 switch (usb_pipetype (pUrb->u32Pipe))
2850 {
2851 case EP_CONTROL:
2852 case EP_BULK:
2853 if (!ms_qh_urb_process (pEhci, pUrb, &qtd_list, iMem_flags))
2854 {
2855 iRetVal = -ENOMEM;
2856 goto urb_enqueue_fail;
2857 }
2858 iRetVal = ms_submit_async (pEhci, pUrb, &qtd_list);
2859 break;
2860
2861 case EP_INTERRUPT:
2862 if (!ms_qh_urb_process (pEhci, pUrb, &qtd_list, iMem_flags))
2863 {
2864 iRetVal = -ENOMEM;
2865 goto urb_enqueue_fail;
2866 }
2867 iRetVal = ms_intr_submit (pEhci, pUrb, &qtd_list);
2868 break;
2869
2870 default:
2871 ms_debug_msg ("no support the transaction type!!\n");
2872 iRetVal = -ENOSYS;
2873 }
2874
2875 urb_enqueue_fail:
2876 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2877 return iRetVal;
2878 }
2879
2880 /*
2881 * @brief remove qh from HW content
2882 * will happen a completion event
2883 *
2884 * @param struct usb_hcd *pHcd
2885 * @param struct urb *pUrb
2886 *
2887 * @return error code
2888 */
ms_urb_dequeue(struct usb_hcd * pHcd,struct urb * pUrb)2889 int ms_urb_dequeue (struct usb_hcd *pHcd, struct urb *pUrb)
2890 {
2891 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
2892 struct ehci_qh *pQh = (struct ehci_qh *) pUrb->hcpriv;
2893 U32 u32Flags;
2894 int iStatus = 0;
2895
2896 if (!pQh)
2897 return 0;
2898
2899 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
2900 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
2901 switch (usb_pipetype (pUrb->u32Pipe))
2902 {
2903 /*
2904 // case EP_CONTROL:
2905 // case EP_BULK:
2906 */
2907 default:
2908 /* patch the old flow */
2909 switch (pQh->qh_status) {
2910 case QH_STS_LINKED:
2911 case QH_STS_COMPLETING:
2912 #ifdef ENABLE_DISCONNECT_FAST_RESPONSE
2913 /* remove (20150422) */
2914 /* do fast unlink if HCD halt */
2915 //if ( (hcd_reg_readw ((U32)&pEhci->op_regs->usbcmd)&USBCMD_RUN) == 0 )
2916 // pEhci->hcd.state = HCD_STATE_HALT;
2917 #endif
2918 /* base on linux 2.6.28, 3.1.10 */
2919 /*** unlink_async ***/
2920 ms_unlink_async(pEhci, pQh);
2921 break;
2922 case QH_STS_UNLINK:
2923 case QH_STS_UNLINK_WAIT:
2924 /* had started */
2925 break;
2926 case QH_STS_IDLE:
2927 diag_printf("[USB] dequeue idle qh\n");
2928 break;
2929 }
2930 #if 0 // renewed old flow
2931 /* if we need to use IAA and it's busy, defer */
2932 if (pQh->qh_status == QH_STS_LINKED
2933 && pEhci->stReclaim
2934 && HCD_IS_RUNNING (pEhci->hcd.state)
2935 )
2936 {
2937 struct ehci_qh *pLast;
2938
2939 for (pLast = pEhci->stReclaim;
2940 pLast->pReclaimQh;
2941 pLast = pLast->pReclaimQh)
2942 continue;
2943 pQh->qh_status = QH_STS_UNLINK_WAIT;
2944 pLast->pReclaimQh = pQh;
2945 /* bypass IAA if the hc can't care */
2946 }
2947 else if (!HCD_IS_RUNNING (pEhci->hcd.state) && pEhci->stReclaim)
2948 ms_end_unlink_async (pEhci, NULL);
2949
2950 /* something else might have unlinked the qh by now */
2951 if (pQh->qh_status == QH_STS_LINKED)
2952 ms_start_unlink_async (pEhci, pQh);
2953 #endif
2954 //FIXME: cover FOTG200 bug
2955 // NUSED, not proper hardware patch
2956 //if( (hcd_reg_readw ((U32)&pEhci->op_regs->portsc[0])&PORTSC_CONNECT) == 0 )
2957 //{
2958 // diag_printf("[urb_dequeue] connect bit = 0 \n");
2959 // //Finish ullinking procedure
2960 // ms_end_unlink_async (pEhci, NULL);
2961 // //Reset HC to ensure FOTG200 work correctly at the next time
2962 // ms_hub_port_disable(pEhci->hcd.self.root_hub,0);
2963 //}
2964 //else if ( (hcd_reg_readw ((U32)&pEhci->op_regs->usbcmd)&USBCMD_RUN) == 0 )
2965 //{
2966 // diag_printf("Something wrong (script auto running?) ==> Check it out\n");
2967 // //Finish ullinking procedure
2968 // ms_end_unlink_async (pEhci, NULL);
2969 // //Reset HC to ensure FOTG200 work correctly at the next time
2970 // ms_hub_port_disable(pEhci->hcd.self.root_hub,0);
2971 //}
2972 break;
2973 case EP_INTERRUPT:
2974 /* patch from Linux 2.6.28 */
2975 switch (pQh->qh_status)
2976 {
2977 case QH_STS_LINKED:
2978 //case QH_STS_COMPLETING:
2979 ms_intr_deschedule (pEhci, pQh);
2980 /* revise to fall through */
2981 //break;
2982 case QH_STS_IDLE:
2983 ms_qh_completions (pEhci, pQh, NULL);
2984 break;
2985 default:
2986 ms_debug_err("bogus qh %p state %d\n",
2987 pQh, pQh->qh_status);
2988 goto done;
2989 }
2990 break;
2991 #if 0 // renewed old one
2992 if (pQh->qh_status == QH_STS_LINKED)
2993 {
2994 /* messy, can spin or block a microframe ... */
2995 ms_intr_deschedule (pEhci, pQh, 1);
2996 /* qh_state == IDLE */
2997 }
2998 ms_qh_completions (pEhci, pQh, NULL);
2999 #endif
3000
3001 /* reschedule QH iff another request is queued */
3002 if (!ms_is_empty_list (&pQh->qtd_list)
3003 && HCD_IS_RUNNING (pEhci->hcd.state))
3004 {
3005 //int iStatus;
3006
3007 iStatus = ms_qh_schedule (pEhci, pQh);
3008 //osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
3009 if (iStatus != 0)
3010 {
3011 // Warning happened
3012 ms_debug_err ("can't reschedule pQh %p, err %d", pQh, iStatus);
3013 }
3014 //ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3015 //return iStatus;
3016 }
3017 break;
3018 }
3019 done:
3020 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
3021 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3022 return iStatus;
3023 }
3024
3025 /*-------------------------------------------------------------------------*/
3026
3027 /*
3028 * @brief wait qh unlink complete then free qtd list.
3029 *
3030 * @param struct usb_hcd *pHcd
3031 * @param struct s_hcd_dev *pDev
3032 * @param int iEp
3033 *
3034 * @return none
3035 */
3036
3037 void
ms_ehci_disable_ep(struct usb_hcd * pHcd,struct s_hcd_dev * pDev,int iEp)3038 ms_ehci_disable_ep (struct usb_hcd *pHcd, struct s_hcd_dev *pDev, int iEp)
3039 {
3040 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
3041 int iEpnum;
3042 U32 u32Flags;
3043 struct ehci_qh *pQh, *tmp;
3044 int numRescan = 100;
3045
3046 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3047 iEpnum = iEp & USB_ENDPOINT_NUMBER_MASK;
3048 if (iEpnum != 0 && (iEp & USB_DIR_IN))
3049 iEpnum |= 0x10;
3050
3051 rescan:
3052 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
3053 pQh = (struct ehci_qh *) pDev->ep[iEpnum];
3054 if (!pQh)
3055 goto done;
3056
3057 if (!HCD_IS_RUNNING (pEhci->hcd.state))
3058 pQh->qh_status = QH_STS_IDLE;
3059 switch (pQh->qh_status)
3060 {
3061 case QH_STS_LINKED:
3062 for (tmp = pEhci->stAsync->qh_next.qh;
3063 tmp && tmp != pQh; tmp = tmp->qh_next.qh)
3064 continue;
3065 if (!tmp)
3066 goto bad;
3067 /* base on linux 2.6.28, 3.1.10 */
3068 /*** unlink_async ***/
3069 ms_unlink_async(pEhci, pQh);
3070 //break;
3071 /* to disable endpoint, unlink continued */
3072 case QH_STS_UNLINK:
3073 case QH_STS_UNLINK_WAIT:
3074 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
3075 osapi_schedule_timeout (1);
3076 if (--numRescan)
3077 goto rescan;
3078 diag_printf("[UM-DEP] rescan 100 times, qh state %d, HCD state %x\n", pQh->qh_status, pEhci->hcd.state);
3079 osapi_spin_lock_irqsave (&pEhci->tHcdLock, u32Flags);
3080 case QH_STS_IDLE:
3081 if (ms_is_empty_list (&pQh->qtd_list))
3082 {
3083 ms_qh_put (pEhci, pQh);
3084 break;
3085 }
3086 default:
3087 bad:
3088 //if ( !ms_is_empty_list (&pQh->qtd_list))
3089 {
3090 ms_debug_err ("<%s> pQh %p (ep#%d) state %d%s\n",
3091 __FUNCTION__, pQh, iEpnum, pQh->qh_status,
3092 ms_is_empty_list (&pQh->qtd_list) ? "" : "(has tds)");
3093 }
3094 break;
3095 }
3096 if (numRescan)
3097 pDev->ep[iEpnum] = 0;
3098 done:
3099 osapi_spin_unlock_irqrestore (&pEhci->tHcdLock, u32Flags);
3100 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3101 return;
3102 }
3103
3104 /*-------------------------------------------------------------------------*/
3105
ms_ehci_stoprun_setting(MS_U8 bOption,struct ehci_hcd * ehci)3106 void ms_ehci_stoprun_setting(MS_U8 bOption, struct ehci_hcd *ehci)
3107 {
3108 U32 temp;
3109
3110 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3111 if (bOption==HOST20_Enable)
3112 {
3113 temp = hcd_reg_readl((U32)&ehci->op_regs->usbcmd);
3114 if (temp & USBCMD_RUN)
3115 {
3116 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3117 return;
3118 }
3119 temp |= USBCMD_RUN;
3120 hcd_reg_writel(temp, (U32)&ehci->op_regs->usbcmd);
3121 do
3122 {
3123 temp = hcd_reg_readl((U32)&ehci->op_regs->usbcmd);
3124 } while ((temp & USBCMD_RUN) == 0);
3125 ehci->hcd.state = HCD_STATE_RUNNING;
3126 }
3127 else if (bOption==HOST20_Disable)
3128 {
3129 temp = hcd_reg_readl((U32)&ehci->op_regs->usbcmd);
3130 if ((temp & USBCMD_RUN) == 0)
3131 return;
3132
3133 temp &= ~USBCMD_RUN;
3134 hcd_reg_writel(temp, (U32)&ehci->op_regs->usbcmd);
3135 do {
3136 temp = hcd_reg_readl((U32)&ehci->op_regs->usbcmd);
3137 } while ((temp & USBCMD_RUN) > 0);
3138 ehci->hcd.state = HCD_STATE_HALT;
3139 }
3140 else
3141 USB_ASSERT(0, "??? Input Error 'ms_ehci_stoprun_setting'...");
3142
3143 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3144 }
3145
ms_qh_ehci_reinit(struct usb_hcd * pHcd,int not_fix)3146 void ms_qh_ehci_reinit(struct usb_hcd *pHcd, int not_fix)
3147 {
3148 struct ehci_hcd *pEhci = hcd_to_ehci (pHcd);
3149 U32 u32Temp;
3150 int is_empty_qtd = 0;
3151
3152 if( pEhci->stAsync->qh_next.qh != 0 )
3153 {
3154 ms_debug_err("[reinit] MAY Not only cantain one qHD in asyn. scheduler (%p)\n", pEhci->stAsync);
3155 ms_debug_err("[reinit] async hw_next_qh %x\n", pEhci->stAsync->hw_next_qh);
3156 #if 0
3157 struct ehci_qh *pQh = pEhci->stAsync->qh_next.qh;
3158 while(pQh) {
3159 ms_debug_err("qh %p\n=============\n", pQh);
3160 ms_debug_err("[UM] status %d\n", pQh->qh_status);
3161 ms_debug_err("[UM] hw ep %d\n", (pQh->hw_ep_state1 >> 8) & 0xf);
3162 ms_debug_err("[UM] qtd_list %s\n", !ms_is_empty_list (&pQh->qtd_list) ? "there": "none");
3163 ms_debug_err("[UM] refcnt %d\n", pQh->tRefCnt);
3164 if (ms_is_empty_list (&pQh->qtd_list))
3165 is_empty_qtd = 1;
3166 pQh = pQh->qh_next.qh;
3167 }
3168 ms_debug_err("=============\n");
3169 #endif
3170 }
3171
3172 if (not_fix || is_empty_qtd)
3173 return;
3174
3175 u32Temp = hcd_reg_readl ((U32)&pEhci->op_regs->portsc [0]);
3176 u32Temp = u32Temp & ~PORTSC_RWC_BITS;
3177 hcd_reg_writel (u32Temp & ~PORTSC_PE, (U32)&pEhci->op_regs->portsc [0]);
3178 //�˸m�Q�������ɭ� ����scheduler
3179 hcd_reg_writel(hcd_reg_readl((U32)&pEhci->op_regs->usbcmd)&(~(USBCMD_ASE|USBCMD_PSE|USBCMD_IAAD)),(U32)&pEhci->op_regs->usbcmd);
3180 /* recover periodic size setting at STR off/on */
3181 u32Temp = hcd_reg_readl((U32)&pEhci->op_regs->usbcmd);
3182 u32Temp &= ~(3 << 2);
3183 u32Temp |= (EHCI_PERIODIC_FLS << 2);
3184 hcd_reg_writel(u32Temp,(U32)&pEhci->op_regs->usbcmd);
3185
3186 if( pEhci->stAsync->qh_next.qh != 0 )
3187 {
3188 struct ehci_qh *pQh = pEhci->stAsync->qh_next.qh;
3189
3190 do {
3191 struct ehci_qh *qh_rm;
3192
3193 qh_rm = pQh;
3194 pQh = pQh->qh_next.qh;
3195 qh_rm->qh_next.qh = NULL;
3196 qh_rm->tRefCnt = 1; // forced to be 1
3197 ms_qh_put(pEhci, qh_rm);
3198 } while(pQh);
3199
3200 /* re-init head QH */
3201 pEhci->stAsync->qh_next.qh = NULL;
3202 pEhci->stAsync->hw_next_qh = QH_NEXT (pEhci->stAsync->qh_dma_addr);
3203 pEhci->stAsync->hw_ep_state1 = QH_H_BIT;
3204 pEhci->stAsync->hw_token = QTD_STS_HALT;
3205 pEhci->stAsync->hw_next_qtd = EHCI_LIST_END;
3206 pEhci->stAsync->qh_status = QH_STS_LINKED;
3207 pEhci->stAsync->hw_alt_next_qtd = (U32)(pEhci->stAsync->pDummyQtd->qtd_dma_addr);
3208 }
3209 }
3210
3211 #ifdef USB_SYSTEM_STR_SUPPORT
ms_ehci_periodic_size_init(struct usb_hcd * hcd)3212 void ms_ehci_periodic_size_init (struct usb_hcd *hcd)
3213 {
3214 struct ehci_hcd *pEhci = hcd_to_ehci (hcd);
3215 U32 u32Temp;
3216
3217 /* recover periodic size setting at STR off/on */
3218 u32Temp = hcd_reg_readl((U32)&pEhci->op_regs->usbcmd);
3219 u32Temp &= ~(3 << 2);
3220 u32Temp |= (EHCI_PERIODIC_FLS << 2);
3221 hcd_reg_writel(u32Temp,(U32)&pEhci->op_regs->usbcmd);
3222 }
3223 #endif
3224
3225 #if USB_IF_EHSET_SUPPORT // Embedded host electrical test procedure
3226 struct list_head *
ms_qh_urb_transaction_EHSET(struct ehci_hcd * ehci,struct urb * urb,struct list_head * head,int iFlags,int iStage)3227 ms_qh_urb_transaction_EHSET (
3228 struct ehci_hcd *ehci,
3229 struct urb *urb,
3230 struct list_head *head,
3231 int iFlags,
3232 int iStage
3233 )
3234 {
3235 struct ehci_qtd *pQtd, *pQtdPrev;
3236 dma_addr_t tBufAddr;
3237 int iLen, iMaxpkt;
3238 int iIsInput;
3239 U32 u32Token;
3240
3241 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3242 pQtd = ms_ehci_qtd_alloc (ehci, iFlags);
3243 if (!pQtd)
3244 {
3245 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3246 return 0;
3247 }
3248 ms_insert_list_before (&pQtd->qtd_list, head);
3249 pQtd->urb = urb;
3250
3251 u32Token = QTD_STS_ACT;
3252 u32Token |= (MAX_CERR_CNT << 10);
3253
3254 iLen = urb->u32TransferBufferLength;
3255 iIsInput = usb_pipein (urb->u32Pipe);
3256 if (!iStage)
3257 {
3258 if (usb_pipecontrol (urb->u32Pipe))
3259 {
3260 ms_qtd_pack (pQtd, urb->tSetupDma, sizeof (struct usb_ctrlrequest),
3261 u32Token | (2 /* "setup" */ << 8), 8);
3262 pQtd->hw_alt_next_qtd = EHCI_LIST_END; // EHSET
3263 u32Token ^= QTD_TOGGLE;
3264 }
3265
3266 if (!(urb->u32TransferFlags & MS_FLAG_URB_NO_INTERRUPT))
3267 pQtd->hw_token |= QTD_IOC; // EHSET
3268 return head;
3269 }
3270 else
3271 u32Token ^= QTD_TOGGLE;
3272
3273 tBufAddr = (iLen > 0) ? urb->tTransferDma : 0;
3274
3275 if (!tBufAddr || iIsInput)
3276 u32Token |= (1 /* "in" */ << 8);
3277 if (usb_pipebulk(urb->u32Pipe))
3278 {
3279 switch (urb->dev->eSpeed)
3280 {
3281 case USB_FULL_SPEED:
3282 iMaxpkt = max_packet(usb_maxpacket(urb->dev, urb->u32Pipe, !iIsInput));
3283 break;
3284 case USB_HIGH_SPEED:
3285 default:
3286 iMaxpkt = 512;
3287 break;
3288 }
3289 }
3290 else
3291 {
3292 iMaxpkt = max_packet(usb_maxpacket(urb->dev, urb->u32Pipe, !iIsInput));
3293 }
3294
3295 for (;;)
3296 {
3297 int iThisQtdLen;
3298
3299 iThisQtdLen = ms_qtd_pack (pQtd, tBufAddr, iLen, u32Token, iMaxpkt);
3300 iLen -= iThisQtdLen;
3301 tBufAddr += iThisQtdLen;
3302 if (iIsInput)
3303 pQtd->hw_alt_next_qtd = ehci->stAsync->hw_alt_next_qtd;
3304
3305 if ((iMaxpkt & (iThisQtdLen + (iMaxpkt - 1))) == 0)
3306 u32Token ^= QTD_TOGGLE;
3307
3308 if (iLen <= 0)
3309 break;
3310
3311 pQtdPrev = pQtd;
3312 pQtd = ms_ehci_qtd_alloc (ehci, iFlags);
3313 if (!pQtd)
3314 goto cleanup;
3315 pQtd->urb = urb;
3316 pQtdPrev->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
3317 ms_insert_list_before (&pQtd->qtd_list, head);
3318 }
3319
3320 if ((urb->u32TransferFlags & MS_FLAG_URB_SHORT_NOT_OK) == 0
3321 || usb_pipecontrol (urb->u32Pipe))
3322 pQtd->hw_alt_next_qtd = EHCI_LIST_END;
3323
3324 if (tBufAddr != 0)
3325 {
3326 int iOneMore = 0;
3327
3328 if (usb_pipecontrol (urb->u32Pipe))
3329 {
3330 iOneMore = 1;
3331 u32Token ^= 0x0100; /* "in" <--> "out" */
3332 u32Token |= QTD_TOGGLE; /* force DATA1 */
3333 }
3334 else if (usb_pipebulk (urb->u32Pipe)
3335 && (urb->u32TransferFlags & MS_FLAG_URB_ZERO_PACKET)
3336 && !(urb->u32TransferBufferLength % iMaxpkt)) {
3337 iOneMore = 1;
3338 }
3339 if (iOneMore)
3340 {
3341 pQtdPrev = pQtd;
3342 pQtd = ms_ehci_qtd_alloc (ehci, iFlags);
3343 if (!pQtd)
3344 goto cleanup;
3345 pQtd->urb = urb;
3346 pQtdPrev->hw_next_qtd = (U32)(pQtd->qtd_dma_addr);
3347 ms_insert_list_before (&pQtd->qtd_list, head);
3348
3349 ms_qtd_pack (pQtd, 0, 0, u32Token, 0);
3350 }
3351 }
3352
3353 if (!(urb->u32TransferFlags & MS_FLAG_URB_NO_INTERRUPT))
3354 pQtd->hw_token |= QTD_IOC;
3355
3356 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3357 return head;
3358
3359 cleanup:
3360
3361 ms_qtd_register_free (ehci, head);
3362 ms_debug_func("--[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3363 return 0;
3364 }
3365
ms_submit_async_EHSET(struct ehci_hcd * ehci,struct urb * urb,struct list_head * qtd_list,int mem_flags)3366 inline int ms_submit_async_EHSET (
3367 struct ehci_hcd *ehci,
3368 struct urb *urb,
3369 struct list_head *qtd_list,
3370 int mem_flags
3371 ) {
3372 ms_debug_func("++[%s] line:[%d]\n", __FUNCTION__, __LINE__);
3373 return ms_submit_async(ehci, urb, qtd_list);
3374 }
3375 #endif
3376