333 …writeb(readb((void*)(USBC_base+0x0A*2)) | 0x40, (void*) (USBC_base+0x0A*2)); //enable short packet…  in U4_series_usb_init()
689 	writeb(readb((void*)(regUHC+0x10*2)) | 0x1, (void*)(regUHC+0x10*2)); //Set UHC run  in PortReset()
692 	writeb(0x10, (void*)(regUTMI+0x2C*2));  in PortReset()
693 	writeb(0x00, (void*)(regUTMI+0x2D*2-1));  in PortReset()
694 	writeb(0x00, (void*)(regUTMI+0x2F*2-1));  in PortReset()
695 	writeb(0x80 ,(void*)(regUTMI+0x2A*2));  in PortReset()
700 	writeb(readb((void*)(regUTMI+0x13*2-1))|0x70, (void*)(regUTMI+0x13*2-1));  in PortReset()
704 	writeb(readb((void*)(regUHC+0x31*2-1)) | 0x01,(void*)(regUHC+0x31*2-1));  in PortReset()
707 	writeb(0x0 ,(void*)(regUTMI+0x2A*2));  in PortReset()
712 	writeb(readb((void*)(regUHC+0x31*2-1)) & 0xfe,(void*)(regUHC+0x31*2-1));  in PortReset()
726                writeb(readb((void*)(regUHC+0x10*2)) | 0x2,(void*)(regUHC+0x10*2));  in PortReset()
736 	writeb(readb((void*)(regUTMI+0x2c*2)) |0x10, (void*) (regUTMI+0x2c*2));  in PortReset()
737 	writeb(readb((void*)(regUTMI+0x2d*2-1)) |0x02, (void*) (regUTMI+0x2d*2-1));  in PortReset()
738 	writeb(readb((void*)(regUTMI+0x2f*2-1)) |0x81, (void*) (regUTMI+0x2f*2-1));  in PortReset()
742 	writeb(readb((void*)(regUTMI+0x13*2-1))&0x8F, (void*)(regUTMI+0x13*2-1));  in PortReset()
745     writeb(readb((void*)(regUTMI+0x06*2))|0x03, (void*)(regUTMI+0x06*2)); //reset UTMI  in PortReset()
746     writeb(readb((void*)(regUTMI+0x06*2))&(~0x03), (void*)(regUTMI+0x06*2)); //reset UTMI  in PortReset()
748     writeb(readb((void*)(regUHC+0x10*2)) | 0x1, (void*)(regUHC+0x10*2)); //Set UHC run  in PortReset()