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Searched refs:u32FQEng (Results 1 – 25 of 56) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DhalFQ.c146 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
154 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
158 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
163 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h114 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize);
115 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
116 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
117 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
118 void HAL_FQ_Read_Enable(MS_U32 u32FQEng, MS_BOOL bEnable);
119 void HAL_FQ_BurstLen(MS_U32 u32FQEng, MS_BOOL bRead, MS_U16 u16BurstLen);
120 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
121 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
122 void HAL_FQ_BypassFilein(MS_U32 u32FQEng, MS_BOOL bBypass);
123 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c147 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
154 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
156 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
159 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
161 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
164 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
168 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
171 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 void HAL_FQ_Timestamp_Sel(MS_U32 u32FQEng, MS_BOOL bSet);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c146 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
154 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
158 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
163 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 void HAL_FQ_Timestamp_Sel(MS_U32 u32FQEng, MS_BOOL bSet);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c146 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
154 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
158 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
163 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
166 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
170 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 void HAL_FQ_Timestamp_Sel(MS_U32 u32FQEng, MS_BOOL bSet);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DhalFQ.c173 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
176 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
177 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
178 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
181 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
183 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
186 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
190 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 void HAL_FQ_Timestamp_Sel(MS_U32 u32FQEng, MS_BOOL bSet);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DhalFQ.c188 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
192 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyStartAddr); in HAL_FQ_PVR_SetBuf()
194 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) … in HAL_FQ_PVR_SetBuf()
195 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ((MS_U32)(phyEndAddr-_phyFQMiuOffset[u32FQEng])) & … in HAL_FQ_PVR_SetBuf()
196 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) &… in HAL_FQ_PVR_SetBuf()
199 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr) in HAL_FQ_PVR_SetRushAddr() argument
201 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyRushAddr); in HAL_FQ_PVR_SetRushAddr()
202 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
205 void _HAL_FQ_PVR_Reset(MS_U32 u32FQEng, MS_BOOL bReset) in _HAL_FQ_PVR_Reset() argument
209 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
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H A DhalFQ.h128 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize);
129 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr);
130 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
131 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
132 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
133 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
134 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
135 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
136 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath);
137 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DhalFQ.c188 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
192 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyStartAddr); in HAL_FQ_PVR_SetBuf()
194 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) … in HAL_FQ_PVR_SetBuf()
195 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ((MS_U32)(phyEndAddr-_phyFQMiuOffset[u32FQEng])) & … in HAL_FQ_PVR_SetBuf()
196 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) &… in HAL_FQ_PVR_SetBuf()
199 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr) in HAL_FQ_PVR_SetRushAddr() argument
201 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyRushAddr); in HAL_FQ_PVR_SetRushAddr()
202 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
205 void _HAL_FQ_PVR_Reset(MS_U32 u32FQEng, MS_BOOL bReset) in _HAL_FQ_PVR_Reset() argument
209 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
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H A DhalFQ.h128 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize);
129 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr);
130 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
131 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
132 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
133 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
134 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
135 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
136 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath);
137 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DhalFQ.c189 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
193 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyStartAddr); in HAL_FQ_PVR_SetBuf()
195 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) … in HAL_FQ_PVR_SetBuf()
196 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ((MS_U32)(phyEndAddr-_phyFQMiuOffset[u32FQEng])) & … in HAL_FQ_PVR_SetBuf()
197 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) &… in HAL_FQ_PVR_SetBuf()
200 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr) in HAL_FQ_PVR_SetRushAddr() argument
202 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyRushAddr); in HAL_FQ_PVR_SetRushAddr()
203 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
206 void _HAL_FQ_PVR_Reset(MS_U32 u32FQEng, MS_BOOL bReset) in _HAL_FQ_PVR_Reset() argument
210 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
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H A DhalFQ.h128 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize);
129 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr);
130 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
131 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
132 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
133 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
134 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
135 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
136 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath);
137 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DhalFQ.c189 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
193 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyStartAddr); in HAL_FQ_PVR_SetBuf()
195 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) … in HAL_FQ_PVR_SetBuf()
196 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ((MS_U32)(phyEndAddr-_phyFQMiuOffset[u32FQEng])) & … in HAL_FQ_PVR_SetBuf()
197 …FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ((MS_U32)(phyStartAddr-_phyFQMiuOffset[u32FQEng])) &… in HAL_FQ_PVR_SetBuf()
200 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr) in HAL_FQ_PVR_SetRushAddr() argument
202 _phyFQMiuOffset[u32FQEng] = _HAL_FQ_MIU_OFFSET(phyRushAddr); in HAL_FQ_PVR_SetRushAddr()
203 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
206 void _HAL_FQ_PVR_Reset(MS_U32 u32FQEng, MS_BOOL bReset) in _HAL_FQ_PVR_Reset() argument
210 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
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H A DhalFQ.h128 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHY phyStartAddr, MS_U32 u32BufSize);
129 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr);
130 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
131 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
132 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
133 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
134 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
135 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
136 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath);
137 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/
H A DhalFQ.c164 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_U32 u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
167 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
168 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
169 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
172 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_U32 u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
174 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
177 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
180 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
184 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_U32 u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_U32 u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
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/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/
H A DhalFQ.c161 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_U32 u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
164 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
165 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
166 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
169 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_U32 u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
171 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
174 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
177 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
178 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
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H A DhalFQ.h110 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_U32 u32StartAddr, MS_U32 u32BufSize);
111 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_U32 u32RushAddr);
112 void HAL_FQ_PVR_Start(MS_U32 u32FQEng);
113 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng);
114 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng);
115 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass);
116 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset);
117 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode);
118 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
119 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng);
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/utopia/UTPA2-700.0.x/modules/dmx/drv/fq/
H A DdrvFQ.c153 static void _FQ_RegStateReset(MS_U32 u32FQEng) in _FQ_RegStateReset() argument
155 HAL_FQ_PVR_SetBuf(u32FQEng, 0, 0); in _FQ_RegStateReset()
156 HAL_FQ_SkipRushData(u32FQEng, FIQ_CFG11_SKIP_RUSH_DATA_PATH_NON); in _FQ_RegStateReset()
157 HAL_FQ_PVR_SetRushAddr(u32FQEng, 0); in _FQ_RegStateReset()
160 static void _FQ_Init(MS_U32 u32FQEng, MS_U8 u8AddrMode) in _FQ_Init() argument
162 HAL_FQ_SWReset(u32FQEng, FALSE); in _FQ_Init()
163 HAL_FQ_Bypass(u32FQEng, FALSE); in _FQ_Init()
164 HAL_FQ_AddrMode(u32FQEng, u8AddrMode); in _FQ_Init()
167 static void _FQ_Exit(MS_U32 u32FQEng) in _FQ_Exit() argument
169 HAL_FQ_SWReset(u32FQEng, TRUE); in _FQ_Exit()
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H A DdrvFQ.h119 FQ_Result MDrv_FQ_Init(MS_U32 u32FQEng, MS_U8 u8AddrMode);
120 FQ_Result MDrv_FQ_Exit(MS_U32 u32FQEng);
123 FQ_Result MDrv_FQ_IsInit(MS_U32 u32FQEng, MS_BOOL* pbIsInit);
124 FQ_Result MDrv_FQ_SetBuffer(MS_U32 u32FQEng, MS_PHY phyBufStart, MS_U32 u32BufSize);
125 FQ_Result MDrv_FQ_Start(MS_U32 u32FQEng, MS_BOOL bStart);
126 FQ_Result MDrv_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath);
127 FQ_Result MDrv_FQ_RushEnable(MS_U32 u32FQEng);
128 FQ_Result MDrv_FQ_TimeStampSetRecordStamp(MS_U32 u32FQEng, MS_U32 u32Stamp);
129 FQ_Result MDrv_FQ_TimeStampGetRecordStamp(MS_U32 u32FQEng, MS_U32* u32Stamp);
130 FQ_Result MDrv_FQ_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr);
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/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DdrvFQ.h119 FQ_Result MDrv_FQ_Init(MS_U32 u32FQEng, MS_U8 u8AddrMode);
120 FQ_Result MDrv_FQ_Exit(MS_U32 u32FQEng);
123 FQ_Result MDrv_FQ_IsInit(MS_U32 u32FQEng, MS_BOOL* pbIsInit);
124 FQ_Result MDrv_FQ_SetBuffer(MS_U32 u32FQEng, MS_PHYADDR u32BufStart, MS_U32 u32BufSize);
125 FQ_Result MDrv_FQ_Start(MS_U32 u32FQEng, MS_BOOL bStart);
126 FQ_Result MDrv_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr);
127 FQ_Result MDrv_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath);
128 FQ_Result MDrv_FQ_RushEnable(MS_U32 u32FQEng);
129 FQ_Result MDrv_FQ_TimeStampSetRecordStamp(MS_U32 u32FQEng, MS_U32 u32Stamp);
130 FQ_Result MDrv_FQ_TimeStampGetRecordStamp(MS_U32 u32FQEng, MS_U32* u32Stamp);

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