Lines Matching refs:u32FQEng
173 void HAL_FQ_PVR_SetBuf(MS_U32 u32FQEng, MS_PHYADDR u32StartAddr, MS_U32 u32BufSize) in HAL_FQ_PVR_SetBuf() argument
176 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
177 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_tail), MIU_FQ(u32EndAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
178 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(u32StartAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
181 void HAL_FQ_PVR_SetRushAddr(MS_U32 u32FQEng, MS_PHYADDR u32RushAddr) in HAL_FQ_PVR_SetRushAddr() argument
183 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
186 void HAL_FQ_PVR_Start(MS_U32 u32FQEng) in HAL_FQ_PVR_Start() argument
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
190 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
196 void HAL_FQ_PVR_Stop(MS_U32 u32FQEng) in HAL_FQ_PVR_Stop() argument
198 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
201 void HAL_FQ_Rush_Enable(MS_U32 u32FQEng) in HAL_FQ_Rush_Enable() argument
203 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
207 void HAL_FQ_Bypass(MS_U32 u32FQEng, MS_U8 u8Bypass) in HAL_FQ_Bypass() argument
211 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
215 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
219 void HAL_FQ_SWReset(MS_U32 u32FQEng, MS_U8 u8Reset) in HAL_FQ_SWReset() argument
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
227 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
231 void HAL_FQ_AddrMode(MS_U32 u32FQEng, MS_U8 u8AddrMode) in HAL_FQ_AddrMode() argument
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
239 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
243 MS_U32 HAL_FQ_GetRead(MS_U32 u32FQEng) in HAL_FQ_GetRead() argument
245 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
248 return (_HAL_REG32_R(&(_REGFIQ[u32FQEng].Fiq2mi2_radr_r)) << MIU_BUS); in HAL_FQ_GetRead()
251 MS_U32 HAL_FQ_GetWrite(MS_U32 u32FQEng) in HAL_FQ_GetWrite() argument
253 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
256 return (_HAL_REG32_R(&(_REGFIQ[u32FQEng].str2mi2_wadr_r)) << MIU_BUS); in HAL_FQ_GetWrite()
266 void HAL_FQ_SkipRushData(MS_U32 u32FQEng, MS_U16 u16SkipPath) in HAL_FQ_SkipRushData() argument
268 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
269 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
272 void HAL_FQ_INT_Enable(MS_U32 u32FQEng, MS_U16 u16Mask) in HAL_FQ_INT_Enable() argument
274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
277 void HAL_FQ_INT_Disable(MS_U32 u32FQEng, MS_U16 u16Mask) in HAL_FQ_INT_Disable() argument
279 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
282 MS_U16 HAL_FQ_INT_GetHW(MS_U32 u32FQEng) in HAL_FQ_INT_GetHW() argument
284 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
287 void HAL_FQ_INT_ClrHW(MS_U32 u32FQEng, MS_U16 u16Mask) in HAL_FQ_INT_ClrHW() argument
289 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
292 void HAL_FQ_Timestamp_Sel(MS_U32 u32FQEng, MS_BOOL bSet) //0: 90K , 1: 27M in HAL_FQ_Timestamp_Sel() argument
296 …FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),… in HAL_FQ_Timestamp_Sel()
300 …FQ16_W(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].REG_FIQ0_CFG2)),… in HAL_FQ_Timestamp_Sel()
304 MS_U32 HAL_FQ_GetPVRTimeStamp(MS_U32 u32FQEng) in HAL_FQ_GetPVRTimeStamp() argument
308 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_GetPVRTimeStamp()
309 u32Timestamp = _HAL_REG32_R(&(_REGFIQ[u32FQEng].lpcr1)); in HAL_FQ_GetPVRTimeStamp()
310 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_GetPVRTimeStamp()
315 void HAL_FQ_SetPVRTimeStamp(MS_U32 u32FQEng , MS_U32 u32Stamp) in HAL_FQ_SetPVRTimeStamp() argument
317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SetPVRTimeStamp()
318 FQ32_W(&(_REGFIQ[u32FQEng].lpcr1), u32Stamp); in HAL_FQ_SetPVRTimeStamp()
319 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SetPVRTimeStamp()