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Searched refs:msWriteBit (Results 1 – 25 of 57) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/vif/hal/maldives/vif/
H A DhalVIF.c1351 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1370 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1525 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1526 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1527 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1528 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1530 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1531 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1532 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1533 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/mustang/vif/
H A DhalVIF.c1359 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1378 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1622 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1623 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1624 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1625 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1627 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1628 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1629 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1630 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/manhattan/vif/
H A DhalVIF.c1341 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1360 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1538 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1539 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1540 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1541 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1543 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1544 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1545 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1546 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/mainz/vif/
H A DhalVIF.c1337 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1356 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1536 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1537 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1538 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1539 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1541 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1542 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1543msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1544 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/messi/vif/
H A DhalVIF.c1337 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1356 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1536 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1537 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1538 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1539 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1541 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1542 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1543msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1544 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/mooney/vif/
H A DhalVIF.c1360 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1379 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1635 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1636 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1637 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1638 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1640 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1641 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1642msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1643 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/maxim/vif/
H A DhalVIF.c1550 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1569 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1823 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1824 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1825 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1826 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1828 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1829 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1830 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1831 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/M7621/vif/
H A DhalVIF.c1550 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1569 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1814 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1815 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1816 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1817 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1819 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1820 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1821 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1822 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/macan/vif/
H A DhalVIF.c1546 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1565 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1809 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1810 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1811 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1812 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1814 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1815 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1816 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1817 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/maserati/vif/
H A DhalVIF.c1550 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1569 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1813 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1814 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1815 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1816 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1818 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1819 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1820 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1821 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/vif/hal/M7821/vif/
H A DhalVIF.c1550 void msWriteBit(U32 u32Reg, BOOL bEnable, U8 u8Mask) in msWriteBit() function
1569 msWriteBit(u32Reg, bEnable, u8Mask); in HAL_VIF_WriteBit()
1813 msWriteBit(RFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1814 msWriteBit(RFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1815 msWriteBit(RFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1816 msWriteBit(OREN_RFAGC, 0, _BIT5); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
1818 msWriteBit(IFAGC_SEL_SECONDER, 1, _BIT6); // 0: 1st order; 1: 2nd order in msVifAdcInitial()
1819 msWriteBit(IFAGC_DITHER_EN, 1, _BIT7); // dither disable in msVifAdcInitial()
1820 msWriteBit(IFAGC_POLARITY, 1, _BIT4); // RFAGC polarity 0: negative logic in msVifAdcInitial()
1821 msWriteBit(OREN_IFAGC, 0, _BIT6); // RFAGC 0: BB control; 1: I2C control in msVifAdcInitial()
[all …]
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mainz/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maxim/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maserati/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mustang/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mooney/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/kano/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/macan/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6lite/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A DMsDBC_LIB_Group_DTV2.h141 #define msWriteBit(_reg_, _val_, _pos_) MDrv_WriteRegBit(_reg_, _val_, _pos_) macro

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